mirror of
https://github.com/mist-devel/mist-board.git
synced 2026-02-06 08:04:41 +00:00
[QL] Added second microdrive support. ROM now selectable.
This commit is contained in:
Squid
@@ -83,7 +83,9 @@ always@(posedge sck, posedge ss) begin
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if(sdi) begin
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// download rom to address 0, microdrive image to 16MB+
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if(index == 0) laddr <= 25'h0 - 25'd1;
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else laddr <= 25'h800000 - 25'd1;
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if(index == 1) laddr <= 25'h800000 - 25'd1; //mdv1_
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if(index == 2) laddr <= 25'h900000 - 25'd1; //mdv2_
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if(index == 3) laddr <= 25'h0 - 25'd1; //Additional ROM bios selection
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downloading_reg <= 1'b1;
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end else
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@@ -25,8 +25,10 @@ module mdv (
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input reset,
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input reverse,
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input sel,
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input mdv_drive,
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input sel, // select microdrive 1 or 2
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// control bits
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output gap,
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@@ -46,8 +48,9 @@ module mdv (
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input [15:0] mem_din
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);
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localparam BASE_ADDR = 25'h800000;
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// mdv1_ image stored at h800000, mdv2_ image stored at address h900000
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wire [24:0] BASE_ADDR = (mdv_drive == 1)?25'h800000:25'h900000;
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// a gap is permanently present if no mdv is inserted or if
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// there's a gap on the inserted one. This is the signal that triggers
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// the irq and can be seen by the cpu
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@@ -118,7 +121,7 @@ always @(posedge mdv_clk) begin
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mdv_bit_cnt <= mdv_bit_cnt + 4'd1;
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if(mdv_bit_cnt == 15) begin
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mdv_data <= mdv_din;
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mdv_data_valid <= !mdv_gap_active &&
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mdv_data_valid <= !mdv_gap_active &&
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// don't generate data_valid for first 12 bytes (preamble)
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(mdv_gap_cnt > 5) &&
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// and also not for the sector internal preamble
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@@ -126,8 +129,9 @@ always @(posedge mdv_clk) begin
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mdv_next_word <= 1'b1;
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// reset counters when address is out of range
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if((mem_addr > mdv_end)||(mem_addr < 25'h800000)) begin
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// reset counters when address is out of range
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if((mem_addr > mdv_end)||(mem_addr < BASE_ADDR)) begin
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mem_addr <= BASE_ADDR;
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// assume we start at the end of a post-sector/pre-header gap
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@@ -70,7 +70,9 @@ module ql (
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// it to control the menu on the OSD
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parameter CONF_STR = {
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"QL;;",
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"F1,MDV;",
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"F,MDV,Load MDV1;",
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"F,MDV,Load MDV2;",
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"F,ROM;",
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"O2,MDV direction,normal,reverse;",
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"O3,RAM,128k,640k;",
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"O4,Video mode,PAL,NTSC;",
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@@ -78,7 +80,7 @@ parameter CONF_STR = {
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"T6,Reset"
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};
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parameter CONF_STR_LEN = 4+7+32+17+23+20+8;
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parameter CONF_STR_LEN = 4+16+16+6+32+17+23+20+8;
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// the status register is controlled by the on screen display (OSD)
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wire [7:0] status;
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@@ -206,8 +208,10 @@ wire sys_wr = dio_download?dio_write:(cpu_wr && cpu_ram);
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wire sys_oe = dio_download?1'b0:(cpu_rd && cpu_mem);
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// microdrive emulation and video share the video cycle time slot
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wire [24:0] video_cycle_addr = mdv_read?mdv_addr:{6'd0, video_addr};
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wire video_cycle_rd = mdv_read?1'b1:video_rd;
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// only one drive at a time is accessed
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wire [24:0] video_cycle_addr = (mdv_read || mdv2_read)?(mdv_seldrive?mdv2_addr:mdv_addr):{6'd0, video_addr};
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wire video_cycle_rd = (mdv_read || mdv2_read)?1'b1:video_rd;
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// video and CPU/data_io time share the sdram bus
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wire [24:0] sdram_addr = video_cycle?video_cycle_addr:sys_addr;
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@@ -352,7 +356,7 @@ osd #(12,0,5) osd (
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// -------------------------------------- reset ------------------------------------
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// ---------------------------------------------------------------------------------
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wire rom_download = dio_download && (dio_index == 0);
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wire rom_download = dio_download && (dio_index == 0 || dio_index == 3);
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reg [11:0] reset_cnt;
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wire reset = (reset_cnt != 0);
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always @(posedge clk2) begin
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@@ -370,10 +374,15 @@ wire zx8302_sel = cpu_cycle && cpu_io && !cpu_addr[6];
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wire [1:0] zx8302_addr = {cpu_addr[5], cpu_addr[1]};
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wire [15:0] zx8302_dout;
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wire mdv_download = (dio_index == 1) && dio_download;
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wire mdv_men;
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wire mdv_download = (dio_index == 1) && dio_download; //signal for active download from SD
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wire mdv2_download = (dio_index == 2) && dio_download; //signal for active download from SD
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wire mdv_men; //signal telling mdv emulation that it may use the video
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wire mdv_read;
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wire mdv2_read;
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wire [24:0] mdv_addr;
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wire [24:0] mdv2_addr;
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wire mdv_seldrive; //1 for MDV2_ active, 0 for MDV1_ active or nothing
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wire audio;
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assign AUDIO_L = audio;
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@@ -397,7 +406,7 @@ zx8302 zx8302 (
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.cpu_addr ( zx8302_addr ),
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.cpu_ds ( cpu_ds ),
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.cpu_din ( cpu_dout ),
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.cpu_dout ( zx8302_dout ),
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.cpu_dout ( zx8302_dout ),
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// joysticks
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.js0 ( js0[4:0] ),
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@@ -410,15 +419,22 @@ zx8302 zx8302 (
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// microdrive sdram interface
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.mdv_addr ( mdv_addr ),
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.mdv2_addr ( mdv2_addr ),
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.mdv_din ( sdram_dout ),
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.mdv_read ( mdv_read ),
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.mdv2_read ( mdv2_read ),
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.mdv_men ( mdv_men ),
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.video_cycle ( video_cycle ),
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.mdv_reverse ( status[2] ),
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.mdv_download ( mdv_download ),
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.mdv2_download ( mdv2_download ),
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.mdv_seldrive ( mdv_seldrive) ,
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.mdv_dl_addr ( dio_addr )
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);
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// ---------------------------------------------------------------------------------
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@@ -32,14 +32,19 @@ module zx8302 (
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// sdram interface for microdrive emulation
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output [24:0] mdv_addr,
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output [24:0] mdv2_addr,
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input [15:0] mdv_din,
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output mdv_read,
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output mdv2_read,
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input mdv_men,
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input video_cycle,
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// interface to watch MDV cartridge upload
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input [24:0] mdv_dl_addr,
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input mdv_download,
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input mdv2_download,
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output mdv_seldrive,
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input mdv_reverse,
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output led,
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@@ -127,8 +132,10 @@ end
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// bit 7 COMDATA
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wire [7:0] io_status = { zx8302_comdata_in, ipc_busy, 2'b00,
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mdv_gap, mdv_rx_ready, mdv_tx_empty, 1'b0 };
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(mdv_seldrive?mdv2_gap:mdv_gap),
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(mdv_seldrive?mdv2_rx_ready:mdv_rx_ready),
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(mdv_seldrive?mdv2_tx_empty:mdv_tx_empty), 1'b0 };
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assign cpu_dout =
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// 18000/18001 and 18002/18003
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(cpu_addr == 2'b00)?rtc[47:32]:
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@@ -136,7 +143,7 @@ assign cpu_dout =
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// 18020/18021 and 18022/18023
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(cpu_addr == 2'b10)?{io_status, irq_pending}:
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(cpu_addr == 2'b11)?{mdv_byte, mdv_byte}:
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(cpu_addr == 2'b11)?(mdv_seldrive?{mdv2_byte, mdv2_byte}:{mdv_byte, mdv_byte}):
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16'h0000;
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@@ -213,7 +220,7 @@ always @(posedge vs or posedge vsync_irq_reset) begin
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end
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// toggling the mask will also trigger irqs ...
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wire gap_irq_in = mdv_gap && irq_mask[0];
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wire gap_irq_in = (mdv_seldrive?mdv2_gap:mdv_gap) && irq_mask[0];
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reg gap_irq;
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wire gap_irq_reset = reset || irq_ack[0];
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always @(posedge gap_irq_in or posedge gap_irq_reset) begin
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@@ -236,16 +243,22 @@ end
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// ---------------------------------------------------------------------------------
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wire mdv_gap;
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wire mdv2_gap;
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wire mdv_tx_empty;
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wire mdv2_tx_empty;
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wire mdv_rx_ready;
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wire mdv2_rx_ready;
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wire [7:0] mdv_byte;
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wire [7:0] mdv2_byte;
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assign led = !mdv_sel[0];
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assign led = !(mdv_sel[0] || mdv_sel[1]);
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mdv mdv (
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.clk ( clk ),
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.reset ( init ),
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.mdv_drive (1), //This is MDV1_
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.sel ( mdv_sel[0] ),
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.reverse ( mdv_reverse ),
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@@ -268,12 +281,47 @@ mdv mdv (
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.mem_din ( mdv_din )
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);
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mdv mdv2 (
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.clk ( clk ),
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.reset ( init ),
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.mdv_drive ( 2 ), //This is MDV2_
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.sel ( mdv_sel[1] ),
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.reverse ( mdv_reverse ),
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// control bits
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.gap ( mdv2_gap ),
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.tx_empty ( mdv2_tx_empty ),
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.rx_ready ( mdv2_rx_ready ),
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.dout ( mdv2_byte ),
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.download ( mdv2_download ),
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.dl_addr ( mdv_dl_addr ),
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// ram interface to read image
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.mem_ena ( mdv_men ),
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.mem_cycle( video_cycle ),
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.mem_clk ( clk_bus ),
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.mem_addr ( mdv2_addr ),
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.mem_read ( mdv2_read ),
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.mem_din ( mdv_din )
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);
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// the microdrive control register mctrl generates the drive selection
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// mdv_sel = 1 for mdv1_, mdv_sel = 2 for mdv2_
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reg [7:0] mdv_sel;
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always @(negedge mctrl[1])
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mdv_sel <= { mdv_sel[6:0], mctrl[0] };
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// 0 for MDV1_ or nothing and 1 for MDV2_
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// Only one microdrive can be accessed at a time, this allows
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// switching between them.
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assign mdv_seldrive = mdv_sel[1]?1'b1:1'b0;
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// ---------------------------------------------------------------------------------
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// -------------------------------------- RTC --------------------------------------
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// ---------------------------------------------------------------------------------
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