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[C16] Send tape motor enable to UART_TX

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This commit is contained in:
Gyorgy Szombathelyi
2019-05-02 22:58:10 +02:00
parent 80f2a2c0e7
commit e16e9b23e9
2 changed files with 7 additions and 2 deletions
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2
cores/c16/c16_mist.qsf
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@@ -119,6 +119,7 @@ set_location_assignment PIN_59 -to SDRAM_nCS
set_location_assignment PIN_33 -to SDRAM_CKE
set_location_assignment PIN_43 -to SDRAM_CLK
set_location_assignment PIN_31 -to UART_RX
set_location_assignment PIN_46 -to UART_TX
# Classic Timing Assignments
# ==========================
@@ -337,6 +338,7 @@ set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SPI_DO
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to CONF_DATA0
set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to UART_TX
set_global_assignment -name VERILOG_INPUT_VERSION VERILOG_2001
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name ENABLE_DRC_SETTINGS OFF

7
cores/c16/c16_mist.v
View File

@@ -56,7 +56,8 @@ module c16_mist (
output [5:0] VGA_G,
output [5:0] VGA_B,
input UART_RX
input UART_RX,
output UART_TX
);
// -------------------------------------------------------------------------
@@ -96,6 +97,8 @@ always @(posedge clk28) begin
uart_rxD2 <= uart_rxD;
end
assign UART_TX = ~cass_motor;
// the status register is controlled by the on screen display (OSD)
wire [31:0] status;
wire tv15khz;
@@ -144,7 +147,7 @@ wire [15:0] sdram_din = { mux_sdram_data, mux_sdram_data };
wire [14:0] sdram_addr_64k = mux_sdram_addr[15:1]; // 64k mapping
wire [14:0] sdram_addr_16k = { 1'b0, mux_sdram_addr[13:7], 1'b0, mux_sdram_addr[6:1] }; // 16k
wire [23:0] sdram_addr = (clkref | (~clkref & prg_download)) ?
{ 10'h00, memory_16k?sdram_addr_16k:sdram_addr_64k } :
{ 9'd0, memory_16k?sdram_addr_16k:sdram_addr_64k } :
(tap_sdram_oe ? tap_play_addr[24:1] : ioctl_sdram_addr[24:1]);
wire sdram_wr = mux_sdram_wr;