Merge pull request #10 from emard/master

ESA11 fix the detection of user_io core

Makefile

@@ -1,4 +1,6 @@
-BASE ?= /opt/arm-none-eabi/bin/arm-none-eabi
+#BASE ?= /opt/arm-none-eabi/bin/arm-none-eabi
+BASE ?= arm-none-eabi
+
 CC      = $(BASE)-gcc
 LD      = $(BASE)-gcc
 AS      = $(BASE)-as
@@ -20,8 +22,9 @@ LINKMAP  = AT91SAM7S256-ROM.ld
 LIBDIR   = 
 
 # Commandline options for each tool.
+# for ESA11 add -DEMIST
 DFLAGS  = -I. -Iusb -DMIST
-CFLAGS  = $(DFLAGS) -c -fno-common -O2 -fsigned-char -DVDATE=\"`date +"%y%m%d"`\"
+CFLAGS  = $(DFLAGS) -c -fno-common -O2 --std=gnu99 -fsigned-char -DVDATE=\"`date +"%y%m%d"`\"
 AFLAGS  = -ahls -mapcs-32
 LFLAGS  = -nostartfiles -Wl,-Map,$(PRJ).map -T$(LINKMAP) $(LIBDIR)
 CPFLAGS = --output-target=ihex
@@ -37,18 +40,19 @@ all: $(PRJ).hex $(PRJ).upg
 clean:
 	rm -f *.d *.o *.hex *.elf *.map *.lst core *~ */*.d */*.o $(MKUPG) *.bin *.upg *.exe
 
-INTERFACE=olimex-arm-usb-tiny-h
-#INTERFACE=busblaster
+INTERFACE=interface/olimex-arm-usb-tiny-h.cfg
+#INTERFACE=interface/busblaster.cfg
+#INTERFACE=openocd/interface/esa11-ft4232-generic.cfg
 ADAPTER_KHZ=10000
 
 reset:
-	openocd -f interface/$(INTERFACE).cfg -f target/at91sam7sx.cfg --command "adapter_khz $(ADAPTER_KHZ); init; reset init; resume; shutdown"
+	openocd -f $(INTERFACE) -f target/at91sam7sx.cfg --command "adapter_khz $(ADAPTER_KHZ); init; reset init; resume; shutdown"
 
 $(MKUPG): $(MKUPG).c
 	gcc  -o $@ $<
 
 flash: $(PRJ).hex $(PRJ).upg $(PRJ).bin
-	openocd -f interface/$(INTERFACE).cfg -f target/at91sam7sx.cfg --command "adapter_khz $(ADAPTER_KHZ); init; reset init;  flash protect 0 0 7 off; sleep 1; arm7_9 fast_memory_access enable; flash write_bank 0 $(PRJ).bin 0x0; resume; shutdown"
+	openocd -f $(INTERFACE) -f target/at91sam7sx.cfg --command "adapter_khz $(ADAPTER_KHZ); init; reset init;  flash protect 0 0 7 off; sleep 1; arm7_9 fast_memory_access enable; flash write_bank 0 $(PRJ).bin 0x0; resume; shutdown"
 
 flash_sam: $(PRJ).hex
 	Sam_I_Am -x flash_sam_i_am

fpga.c

@@ -155,7 +155,7 @@ RAMFUNC unsigned char ConfigureFpga(char *name)
 
     if(!name)
     //  name = "CORE    BIN";
-		name = "XESM38  BIN";
+		name = "X7A102T BIN";
 
     // open bitstream file
     if (FileOpen(&file, name) == 0)
@@ -209,8 +209,8 @@ RAMFUNC unsigned char ConfigureFpga(char *name)
     }
     while (t < n);
 
-    // disable outputs
-    *AT91C_PIOA_ODR = XILINX_CCLK | XILINX_DIN | XILINX_PROG_B;
+    // return outputs to a state suitable for user_io.c
+    *AT91C_PIOA_SODR = XILINX_CCLK | XILINX_DIN | XILINX_PROG_B;
 
     iprintf("]\r");
     iprintf("FPGA bitstream loaded\r");

openocd/interface/esa11-ft4232-generic.cfg

@@ -0,0 +1,8 @@
+#
+# ESA11 onboard FT4232
+#
+
+interface ftdi
+ftdi_device_desc "Quad RS232-HS"
+ftdi_vid_pid 0x0403 0x6011
+ftdi_layout_init 0x3088 0x1f8b

user_io.c

@@ -195,19 +195,40 @@ static void user_io_read_core_name() {
 
 void user_io_detect_core_type() {
   core_name[0] = 0;
+  int retry = 0;
 
-  EnableIO();
-  core_type = SPI(0xff);
-  DisableIO();
+  // make sure to have SPI initialized
+  // and cycle enable/disable all other
+  // SPI devices which could be possibly left enabled
+  // and cause the contention of the shared SPI bus
+  spi_init();
+  EnableCard();
+  DisableCard();
+  EnableFpga();
+  DisableFpga();
+  EnableOsd();
+  DisableOsd();
+  EnableDMode();
+  DisableDMode();
 
-  if((core_type != CORE_TYPE_DUMB) &&
-     (core_type != CORE_TYPE_MINIMIG) &&
-     (core_type != CORE_TYPE_MINIMIG2) &&
-     (core_type != CORE_TYPE_PACE) &&
-     (core_type != CORE_TYPE_MIST) &&
-     (core_type != CORE_TYPE_ARCHIE) &&
-     (core_type != CORE_TYPE_8BIT))
-    core_type = CORE_TYPE_UNKNOWN;
+  core_type = CORE_TYPE_UNKNOWN;
+  while(retry++ < 15 && core_type == CORE_TYPE_UNKNOWN)
+  {
+    TIMER_wait(100);
+    EnableIO();
+    core_type = SPI(0xff);
+    DisableIO();
+    iprintf("Detecting core type (0x%02x), retry %d\n", core_type, retry);
+
+    if((core_type != CORE_TYPE_DUMB) &&
+       (core_type != CORE_TYPE_MINIMIG) &&
+       (core_type != CORE_TYPE_MINIMIG2) &&
+       (core_type != CORE_TYPE_PACE) &&
+       (core_type != CORE_TYPE_MIST) &&
+       (core_type != CORE_TYPE_ARCHIE) &&
+       (core_type != CORE_TYPE_8BIT))
+      core_type = CORE_TYPE_UNKNOWN;
+  }
 
   switch(core_type) {
   case CORE_TYPE_UNKNOWN: