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Document serv_ctrl

This commit is contained in:
Olof Kindgren
2020-08-26 16:45:22 +02:00
parent 25e86fdd3c
commit 0d5bc0c3c1
2 changed files with 8 additions and 1 deletions

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@@ -77,7 +77,14 @@ serv_ctrl
.. image:: serv_ctrl.png
serv_ctrl keeps track of the current PC and contains the logic needed to calculate the next PC.
serv_ctrl keeps track of the current PC and contains the logic needed to calculate the next PC. The PC is stored in shift register with a parellel output connected to the instruction bus. New instructions are fetched by asserting o_ibus_cyc until there is a response on i_ibus_ack. Instruction fetches occur when the reset signal is deasserted, which is what gets SERV started, or when the PC has finished updating its value.
The new PC can come from three sources. For normal instructions, it is incremented by four, which is the next 32-bit address. Jumps can be absolute or relative to the current PC. Absolute jumps are precalculated in serv_bufreg and written directly to the PC. PC relative jumps have the offset part precalculated in serv_bufreg which gets added to the current PC before storing as the new PC. The third source for the new PC comes from the CSR registers when entering or returning traps.
Some operations (LUI, AUIPC, jumps, entering or returning from traps) also update the destination register through o_rd. In the case of misaligned instruction traps, the invalid PC is written to o_bad_pc to be passed to mtval.
.. image:: serv_ctrl_int.png
serv_decode
^^^^^^^^^^^

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