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Guarantee at least 2 cycles of o_rst after PLL locked.

This commit is contained in:
Eric Brombaugh
2022-08-08 12:17:56 -07:00
committed by Olof Kindgren
parent cb4276e8b2
commit 5cc7b0cbe1

View File

@@ -11,8 +11,8 @@ module ice40_pll
reg [1:0] rst_reg;
always @(posedge o_clk)
rst_reg <= {!locked, rst_reg[1]};
assign o_rst = rst_reg[0];
rst_reg <= {rst_reg[0],locked};
assign o_rst = ~rst_reg[1];
generate
if (PLL == "ICE40_CORE") begin