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https://github.com/olofk/serv.git
synced 2026-02-08 08:41:16 +00:00
Add UART decoder
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@@ -25,21 +25,33 @@ void INThandler(int signal)
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int main(int argc, char **argv, char **env)
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{
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vluint64_t sample_time = 0;
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uint32_t insn = 0;
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uint32_t ex_pc = 0;
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int baud_rate = 0;
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int baud_t = 0;
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int uart_state = 0;
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char uart_ch = 0;
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Verilated::commandArgs(argc, argv);
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Vserv_wrapper* top = new Vserv_wrapper;
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const char *arg = Verilated::commandArgsPlusMatch("uart_baudrate=");
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if (arg[0]) {
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baud_rate = atoi(arg+15);
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if (baud_rate) {
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baud_t = 1000*1000*1000/baud_rate;
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}
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}
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VerilatedVcdC * tfp = 0;
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const char *vcd = Verilated::commandArgsPlusMatch("vcd=");
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//if (vcd[0]) == '\0' || atoi(arg + 11) != 0)
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Verilated::traceEverOn(true);
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VerilatedVcdC* tfp = new VerilatedVcdC;
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top->trace (tfp, 99);
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tfp->open ("trace.vcd");
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if (vcd[0]) {
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Verilated::traceEverOn(true);
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tfp = new VerilatedVcdC;
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top->trace (tfp, 99);
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tfp->open ("trace.vcd");
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}
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signal(SIGINT, INThandler);
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@@ -47,14 +59,47 @@ int main(int argc, char **argv, char **env)
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bool q = top->q;
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while (!(done || Verilated::gotFinish())) {
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top->eval();
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tfp->dump(main_time);
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/*if (q != top->q) {
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q = top->q;
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printf("%lu output is %s\n", main_time, q ? "ON" : "OFF");
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if (tfp)
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tfp->dump(main_time);
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if (baud_rate) {
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if (uart_state == 0) {
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if (!top->q) {
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sample_time = main_time + baud_t/2;
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uart_state++;
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}
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}
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else if(uart_state == 1) {
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if (main_time > sample_time) {
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sample_time += baud_t;
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uart_ch = 0;
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uart_state++;
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}
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}
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else if (uart_state < 10) {
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if (main_time > sample_time) {
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sample_time += baud_t;
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uart_ch |= top->q << (uart_state-2);
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uart_state++;
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}
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}
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else {
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if (main_time > sample_time) {
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sample_time += baud_t;
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putchar(uart_ch);
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uart_state=0;
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}
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}
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}
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/*else {
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if (q != top->q) {
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q = top->q;
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printf("%lu output q is %s\n", main_time, q ? "ON" : "OFF");
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}
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}*/
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top->wb_clk = !top->wb_clk;
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main_time+=31.25;
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}
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tfp->close();
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if (tfp)
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tfp->close();
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exit(0);
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}
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