csr, verilator, traps

serv.core

@@ -5,7 +5,6 @@ name : ::serv:0
 filesets:
   core:
     files:
-      - rtl/camd_ram.v
       - rtl/serv_params.vh : {is_include_file : true}
       - rtl/shift_reg.v
       - rtl/ser_add.v
@@ -13,38 +12,37 @@ filesets:
       - rtl/ser_lt.v
       - rtl/ser_shift.v
       - rtl/serv_alu.v
+      - rtl/serv_csr.v
       - rtl/serv_ctrl.v
       - rtl/serv_decode.v
       - rtl/serv_mem_if.v
       - rtl/serv_regfile.v
       - rtl/serv_top.v
     file_type : verilogSource
-    depend : [wb_ram]
 
-  ser_add_tb:
-    files:
-      - ser_add_tb.v
-    file_type : verilogSource
-    depend : [vlog_tb_utils]
-
-  serv_ctrl_tb:
-    files:
-      - bench/serv_ctrl_tb.v : {file_type : verilogSource}
-    depend : [vlog_tb_utils]
-
-  serv_decode_tb:
-    files: [bench/serv_decode_tb.v : {file_type : verilogSource}]
-    depend : [vlog_tb_utils]
   serv_top_tb:
     files:
-      - firmware.hex : {copyto : firmware.hex, file_type : user}
-      - testprint.v
       - bench/serv_top_tb.v
     file_type : verilogSource
-    depend : [vlog_tb_utils, wb_intercon, "yosys:techlibs:ice40"]
+    depend : [vlog_tb_utils, "yosys:techlibs:ice40"]
+
+  wrapper:
+    files:
+      - testhalt.v
+      - testprint.v
+      - rtl/riscv_timer.v
+      - bench/serv_wrapper.v
+    file_type : verilogSource
+    depend : [wb_intercon, wb_ram]
 
   pcf:
     files: [data/dummy.pcf : {file_type : PCF}]
+
+  verilator_tb:
+    files:
+      - bench/serv_soc_tb.cpp : {file_type : verilogSource}
+    depend : ["yosys:techlibs:ice40"]
+
 targets:
   default:
     filesets : [core]
@@ -54,6 +52,7 @@ targets:
     default_tool : icestorm
     filesets : [core, pcf]
     toplevel : serv_top
+
   lint:
     default_tool : verilator
     filesets : [core]
@@ -61,33 +60,37 @@ targets:
       verilator:
         mode : lint-only
     toplevel : serv_top
-  ser_add_tb:
-    default_tool : icarus
-    filesets: [core, ser_add_tb]
-    toplevel: ser_add_tb
-
-  serv_ctrl_tb:
-    default_tool: icarus
-    filesets : [core, serv_ctrl_tb]
-    toplevel : serv_ctrl_tb
-
-  serv_decode_tb:
-    default_tool: icarus
-    filesets : [core, serv_decode_tb]
-    toplevel : serv_decode_tb
 
   serv_top_tb:
     default_tool: icarus
-    filesets : [core, serv_top_tb]
+    filesets : [core, wrapper, serv_top_tb]
     generate : [wb_intercon]
-    parameters : [RISCV_FORMAL=true]
+    parameters : [RISCV_FORMAL=true, firmware]
     toplevel : serv_top_tb
 
+  verilator_tb:
+    default_tool: verilator
+    filesets : [core, wrapper, verilator_tb]
+    generate : [wb_intercon]
+    parameters : [RISCV_FORMAL=true, firmware, signature]
+    tools:
+      verilator:
+        verilator_options : [-Wno-fatal, --trace]
+    toplevel : serv_wrapper
+
 parameters:
   RISCV_FORMAL:
     datatype  : bool
     paramtype : vlogdefine
 
+  firmware:
+    datatype : file
+    paramtype : plusarg
+
+  signature:
+    datatype : file
+    paramtype : plusarg
+
 generate:
   wb_intercon:
     generator: wb_intercon_gen
@@ -96,15 +99,17 @@ generate:
         cpu_ibus:
           slaves : [mem]
         cpu_dbus:
-          slaves : [mem, testprint, testpassed]
+          slaves : [mem, testprint, testhalt, timer]
       slaves:
         mem:
-          offset : 0
+          offset : 0x80000000
           size   : 65536
         testprint:
           offset : 0x10000000
           size   : 4
-        testpassed:
+        testhalt:
           offset : 0x20000000
           size   : 4
-    
+        timer:
+          offset : 0xf00fff40
+          size   : 16