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Avoid releasing trap signal too early
The trap signal is used my the mux in serv_rf_if to decide which registers to write to. If the trap signal is dropped too early, the destination address changes while the register is still being written to.
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@@ -541,7 +541,7 @@ module serv_top
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.i_clk (clk),
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.i_rst (i_rst),
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//State
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.i_init (init),
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.i_trig_irq (wb_ibus_ack),
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.i_en (cnt_en),
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.i_cnt0to3 (cnt0to3),
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.i_cnt3 (cnt3),
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