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6 Commits

Author SHA1 Message Date
Olof Kindgren
8cd9742b53 Use two write ports for RF/CSR RAM 2019-09-13 23:30:46 +02:00
Olof Kindgren
a0ba84096a Simplify csr stuff 2019-09-13 23:30:46 +02:00
Olof Kindgren
16c93a58ee Move mepc and mtval into RF memory 2019-07-08 07:49:58 +02:00
Olof Kindgren
fe9d2677ba Add SERV_CLEAR_RAM parameter 2019-06-24 13:18:34 +02:00
Olof Kindgren
bad78b0bd7 Declare wires before use 2019-06-24 13:18:34 +02:00
Olof Kindgren
42ac1e5e4d Store CSR in RF RAM
Since FPGA uses fixed-size RAM, it's better in most cases to store
the CSR in unused memory positions in that RAM.

Since the decoding is made more complex, the old register file
implementation is kept around since that is more efficient when we
don't want CSR and potentially when the FPGA support hardware
shift registers.
2019-06-07 19:39:18 +02:00