5 Commits

Author	SHA1	Message	Date
Olof Kindgren	40000cbeb9	Fix IRQ ... This contains a lot of fixes as IRQ support was broken on both RTL and zephyr side * Interrupts are now synced to instruction lifetimes * Interrupts are disabled on traps and mie is pushed to mpie * Zephyr applications regenerated from rewritten Zephyr port * Timer is 32-bit to avoid wrapping around too often * MEPC was not read properly from CSR storage	2019-11-19 11:06:50 +01:00
Olof Kindgren	7fabafa9cf	Add sync example	2018-11-26 23:15:53 +01:00
Olof Kindgren	cd983190b3	Interrupts working. Adding philosophers example	2018-11-26 23:03:40 +01:00
Olof Kindgren	4649b7073f	Update example applications	2018-11-26 18:00:29 +01:00
Olof Kindgren	12039dec0e	Add support for setting memory contents during synthesis	2018-11-26 09:49:08 +01:00