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17 lines
278 B
Verilog
17 lines
278 B
Verilog
`default_nettype none
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module serv_top_tb;
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parameter firmware = "firmware.hex";
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reg wb_clk = 1'b1;
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reg wb_rst = 1'b1;
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always #5 wb_clk <= !wb_clk;
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initial #100 wb_rst = 1'b0;
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vlog_tb_utils vtu();
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serv_wrapper #(firmware) dut(wb_clk, wb_rst);
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endmodule
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