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mirror of https://github.com/open-simh/simh.git synced 2026-01-13 23:37:13 +00:00

KA10: Regular update. Code cleanup and minor enhancements.

This commit is contained in:
Richard Cornwell 2019-11-03 22:11:23 -05:00
parent bbfa391924
commit 178968a621
16 changed files with 1130 additions and 406 deletions

View File

@ -54,7 +54,7 @@
static int pia = 0;
static int status = 0;
t_value auxcpu_base = 03000000;
int auxcpu_base = 03000000;
static t_stat auxcpu_devio(uint32 dev, t_uint64 *data);
static t_stat auxcpu_svc (UNIT *uptr);
@ -187,7 +187,7 @@ static t_stat auxcpu_svc (UNIT *uptr)
auxcpu_ldsc.rcve = 1;
uptr->wait = AUXCPU_POLL;
}
sim_activate (uptr, uptr->wait);
sim_clock_coschedule (uptr, uptr->wait);
return SCPE_OK;
}
@ -407,13 +407,13 @@ static t_stat auxcpu_set_base (UNIT *uptr, int32 val, CONST char *cptr, void *de
if (r != SCPE_OK)
return SCPE_ARG;
auxcpu_base = x;
auxcpu_base = (int)x;
return SCPE_OK;
}
static t_stat auxcpu_show_base (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, "Base: %llo", auxcpu_base);
fprintf (st, "Base: %06o", auxcpu_base);
return SCPE_OK;
}
#endif

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@ -430,8 +430,8 @@ t_stat ch10_attach (UNIT *uptr, CONST char *cptr)
if (peer[0] == '\0')
return sim_messagef (SCPE_2FARG, "Must set Chaosnet PEER \"SET CH PEER=host:port\"\n");
snprintf (linkinfo, sizeof(linkinfo), "Buffer=%d,UDP,%s,PACKET,Connect=%s,Line=0",
(int)sizeof tx_buffer, cptr, peer);
snprintf (linkinfo, sizeof(linkinfo), "Buffer=%d,UDP,%s,PACKET,Connect=%.*s,Line=0",
(int)sizeof tx_buffer, cptr, (int)(sizeof(linkinfo) - (45 + strlen(cptr))), peer);
r = tmxr_attach (&ch10_tmxr, uptr, linkinfo);
if (r != SCPE_OK) {
sim_debug (DBG_ERR, &ch10_dev, "TMXR error opening master\n");

View File

@ -86,7 +86,7 @@ static int dpk_ird = 0;
static int dpk_iwr = 0;
UNIT dpk_unit[] = {
{UDATA(dpk_svc, TT_MODE_8B|UNIT_ATTABLE|UNIT_DISABLE, 0)}, /* 0 */
{UDATA(dpk_svc, TT_MODE_8B|UNIT_IDLE|UNIT_ATTABLE, 0)}, /* 0 */
};
DIB dpk_dib = {DPK_DEVNUM, 1, &dpk_devio, NULL};
@ -249,8 +249,10 @@ static int dpk_output (int port, TMLN *lp)
}
ch = ildb (&M[dpk_base + 2*port + 1]);
ch = sim_tt_outcvt(ch & 0377, TT_GET_MODE (dpk_unit[0].flags));
tmxr_putc_ln (lp, ch);
if (lp->conn) {
ch = sim_tt_outcvt(ch & 0377, TT_GET_MODE (dpk_unit[0].flags));
tmxr_putc_ln (lp, ch);
}
count = M[dpk_base + 2*port] - 1;
M[dpk_base + 2*port] = count & 0777777777777LL;
@ -264,7 +266,7 @@ static t_stat dpk_svc (UNIT *uptr)
int i;
/* 16 ports at 4800 baud, rounded up. */
sim_activate_after (uptr, 200);
sim_clock_coschedule (uptr, 200);
i = tmxr_poll_conn (&dpk_desc);
if (i >= 0) {
@ -308,6 +310,8 @@ static t_stat dpk_svc (UNIT *uptr)
static t_stat dpk_reset (DEVICE *dptr)
{
int i;
sim_debug(DEBUG_CMD, &dpk_dev, "Reset\n");
if (dpk_unit->flags & UNIT_ATT)
sim_activate (dpk_unit, tmxr_poll);
@ -321,6 +325,11 @@ static t_stat dpk_reset (DEVICE *dptr)
memset (dpk_port, 0, sizeof dpk_port);
clr_interrupt(DPK_DEVNUM);
for (i = 0; i < DPK_LINES; i++) {
tmxr_set_line_unit (&dpk_desc, i, dpk_unit);
tmxr_set_line_output_unit (&dpk_desc, i, dpk_unit);
}
return SCPE_OK;
}
@ -333,9 +342,6 @@ static t_stat dpk_attach (UNIT *uptr, CONST char *cptr)
for (i = 0; i < DPK_LINES; i++) {
dpk_ldsc[i].rcve = 0;
dpk_ldsc[i].xmte = 0;
/* Clear txdone so tmxr_txdone_ln will not return return true
on the first call. */
dpk_ldsc[i].txdone = 0;
}
if (stat == SCPE_OK)
sim_activate (uptr, tmxr_poll);

View File

@ -1,6 +1,6 @@
/* ka10_tk10.c: MTY, Morton multiplex box: Terminal multiplexor.
Copyright (c) 2018, Lars Brinkhoff
Copyright (c) 2018-2019, Lars Brinkhoff
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -37,6 +37,7 @@
#define MTY_NAME "MTY"
#define MTY_DEVNUM 0400
#define MTY_LINES 32
#define MTY_FIRST C1 /* Frist character in output word. */
#define MTY_PIA 0000007 /* PI channel assignment */
#define MTY_RQINT 0000010 /* Request interrupt. */
@ -50,7 +51,8 @@
#define MTY_CONO_BITS (MTY_PIA | MTY_LINE)
static t_stat mty_devio(uint32 dev, uint64 *data);
static t_stat mty_svc (UNIT *uptr);
static t_stat mty_input_svc (UNIT *uptr);
static t_stat mty_output_svc (UNIT *uptr);
static t_stat mty_reset (DEVICE *dptr);
static t_stat mty_attach (UNIT *uptr, CONST char *cptr);
static t_stat mty_detach (UNIT *uptr);
@ -59,13 +61,18 @@ static t_stat mty_help (FILE *st, DEVICE *dptr, UNIT *uptr,
int32 flag, const char *cptr);
extern int32 tmxr_poll;
static uint32 mty_active_bitmask;
static uint64 mty_output_word[MTY_LINES];
static int32 mty_input_character;
TMLN mty_ldsc[MTY_LINES] = { 0 };
TMXR mty_desc = { MTY_LINES, 0, 0, mty_ldsc };
static uint64 status = 0;
UNIT mty_unit[] = {
{UDATA(mty_svc, TT_MODE_7B|UNIT_ATTABLE|UNIT_DISABLE, 0)}, /* 0 */
{UDATA(mty_input_svc, TT_MODE_7B|UNIT_IDLE|UNIT_ATTABLE, 0)}, /* 0 */
{UDATA(mty_output_svc, UNIT_DIS|UNIT_IDLE, 0)}, /* 0 */
};
DIB mty_dib = {MTY_DEVNUM, 1, &mty_devio, NULL};
@ -85,7 +92,7 @@ MTAB mty_mod[] = {
DEVICE mty_dev = {
MTY_NAME, mty_unit, NULL, mty_mod,
1, 8, 0, 1, 8, 36,
2, 8, 0, 1, 8, 36,
NULL, NULL, mty_reset, NULL, mty_attach, mty_detach,
&mty_dib, DEV_DISABLE | DEV_DIS | DEV_DEBUG, 0, dev_debug,
NULL, NULL, mty_help, NULL, NULL, mty_description
@ -97,7 +104,6 @@ static t_stat mty_devio(uint32 dev, uint64 *data)
TMLN *lp;
int line;
uint64 word;
int ch;
switch(dev & 07) {
case CONO:
@ -107,9 +113,6 @@ static t_stat mty_devio(uint32 dev, uint64 *data)
line = (status & MTY_LINE) >> 12;
if (*data & MTY_STOP) {
status &= ~MTY_ODONE;
/* Set txdone so future calls to tmxr_txdone_ln will
return -1 rather than 1. */
mty_ldsc[line].txdone = 1;
sim_debug(DEBUG_CMD, &mty_dev, "Clear output done line %d\n",
line);
}
@ -130,30 +133,21 @@ static t_stat mty_devio(uint32 dev, uint64 *data)
line = (status & MTY_LINE) >> 12;
word = *data;
sim_debug(DEBUG_DATAIO, &mty_dev, "DATAO line %d -> %012llo\n",
line, *data);
line, word);
lp = &mty_ldsc[line];
if (!mty_ldsc[line].conn)
/* If the line isn't connected, clear txdone to force
tmxr_txdone_ln to return 1 rather than -1. */
mty_ldsc[line].txdone = 0;
/* Write up to five characters extracted from a word. NUL can
only be in the first character. */
ch = (word >> 29) & 0177;
tmxr_putc_ln (lp, sim_tt_outcvt(ch, TT_GET_MODE (mty_unit[0].flags)));
while ((ch = (word >> 22) & 0177) != 0) {
tmxr_putc_ln (lp, sim_tt_outcvt(ch, TT_GET_MODE (mty_unit[0].flags)));
word <<= 7;
}
mty_output_word[line] = word | MTY_FIRST;
mty_active_bitmask |= 1 << line;
sim_activate_abs (&mty_unit[1], 0);
status &= ~MTY_ODONE;
break;
case DATAI:
line = (status & MTY_LINE) >> 12;
lp = &mty_ldsc[line];
*data = tmxr_getc_ln (lp) & 0177;
*data = mty_input_character;
sim_debug(DEBUG_DATAIO, &mty_dev, "DATAI line %d -> %012llo\n",
line, *data);
status &= ~MTY_IDONE;
sim_activate_abs (&mty_unit[0], 0);
break;
}
@ -165,52 +159,38 @@ static t_stat mty_devio(uint32 dev, uint64 *data)
return SCPE_OK;
}
static t_stat mty_svc (UNIT *uptr)
static t_stat mty_input_svc (UNIT *uptr)
{
static int scan = 0;
int32 ch;
int i;
/* High speed device, poll every 0.1 ms. */
sim_activate_after (uptr, 100);
sim_clock_coschedule (uptr, 1000);
i = tmxr_poll_conn (&mty_desc);
if (i >= 0) {
mty_ldsc[i].conn = 1;
mty_ldsc[i].rcve = 1;
mty_ldsc[i].xmte = 1;
/* Set txdone so tmxr_txdone_ln will not return return 1 on
the first call after a new connection. */
mty_ldsc[i].txdone = 1;
sim_debug(DEBUG_CMD, &mty_dev, "Connect %d\n", i);
}
tmxr_poll_rx (&mty_desc);
tmxr_poll_tx (&mty_desc);
for (i = 0; i < MTY_LINES; i++) {
/* Round robin scan 32 lines. */
scan = (scan + 1) & 037;
/* 1 means the line became ready since the last check. Ignore
-1 which means "still ready". */
if (tmxr_txdone_ln (&mty_ldsc[scan]) == 1) {
sim_debug(DEBUG_DETAIL, &mty_dev, "Output ready line %d\n", scan);
status &= ~MTY_LINE;
status |= scan << 12;
status |= MTY_ODONE;
set_interrupt(MTY_DEVNUM, status & MTY_PIA);
break;
}
if (!mty_ldsc[scan].conn)
continue;
if (tmxr_input_pending_ln (&mty_ldsc[scan])) {
ch = tmxr_getc_ln (&mty_ldsc[scan]);
if (ch & TMXR_VALID) {
mty_input_character = ch & 0177;
sim_debug(DEBUG_DETAIL, &mty_dev, "Input ready line %d\n", scan);
status &= ~MTY_LINE;
status |= scan << 12;
status |= MTY_IDONE;
set_interrupt(MTY_DEVNUM, status & MTY_PIA);
/* No more scanning until DATAI has read this character. */
sim_cancel (&mty_unit[0]);
break;
}
}
@ -218,17 +198,74 @@ static t_stat mty_svc (UNIT *uptr)
return SCPE_OK;
}
static t_stat mty_output_svc (UNIT *uptr)
{
static int scan = 0;
uint64 word;
int i, ch;
int32 txdone;
for (i = 0; i < MTY_LINES; i++) {
/* Round robin scan 32 lines. */
scan = (scan + 1) & 037;
if ((mty_active_bitmask & (1 << scan)) == 0 ||
(txdone = tmxr_txdone_ln (&mty_ldsc[scan])) == 0)
continue;
/* Write up to five characters extracted from a word. NUL
can only be in the first character. */
word = mty_output_word[scan];
if (word != 0) {
ch = (word >> 29) & 0177;
ch = sim_tt_outcvt(ch, TT_GET_MODE (mty_unit[0].flags));
if (tmxr_putc_ln (&mty_ldsc[scan], ch) != SCPE_STALL)
mty_output_word[scan] = (word << 7) & FMASK;
} else if (txdone == 1) {
sim_debug(DEBUG_DETAIL, &mty_dev, "Output ready line %d\n", scan);
status &= ~MTY_LINE;
status |= scan << 12;
status |= MTY_ODONE;
set_interrupt(MTY_DEVNUM, status & MTY_PIA);
mty_active_bitmask &= ~(1 << scan);
/* Stop scanning; can only signal output done for one line
at a time. */
break;
}
}
tmxr_poll_tx (&mty_desc);
/* SIMH will actually schedule this UNIT when output is due
according to the line speed. */
sim_activate_after (uptr, 1000000);
return SCPE_OK;
}
static t_stat mty_reset (DEVICE *dptr)
{
int i;
sim_debug(DEBUG_CMD, &mty_dev, "Reset\n");
if (mty_unit->flags & UNIT_ATT)
if (mty_unit->flags & UNIT_ATT) {
sim_activate (mty_unit, tmxr_poll);
else
sim_cancel (mty_unit);
sim_activate_after (&mty_unit[1], 100);
} else {
sim_cancel (&mty_unit[0]);
sim_cancel (&mty_unit[1]);
}
status = 0;
clr_interrupt(MTY_DEVNUM);
for (i = 0; i < MTY_LINES; i++) {
tmxr_set_line_unit (&mty_desc, i, &mty_unit[0]);
tmxr_set_line_output_unit (&mty_desc, i, &mty_unit[1]);
tmxr_set_line_speed(&mty_ldsc[i], "80000");
}
return SCPE_OK;
}
@ -241,14 +278,12 @@ static t_stat mty_attach (UNIT *uptr, CONST char *cptr)
for (i = 0; i < MTY_LINES; i++) {
mty_ldsc[i].rcve = 0;
mty_ldsc[i].xmte = 0;
/* Set txdone so tmxr_txdone_ln will not return return 1 on
the first call. */
mty_ldsc[i].txdone = 1;
}
if (stat == SCPE_OK) {
status = 0;
sim_activate (uptr, tmxr_poll);
}
mty_active_bitmask = 0;
return stat;
}
@ -262,7 +297,8 @@ static t_stat mty_detach (UNIT *uptr)
mty_ldsc[i].xmte = 0;
}
status = 0;
sim_cancel (uptr);
sim_cancel (&mty_unit[0]);
sim_cancel (&mty_unit[1]);
return stat;
}

View File

@ -42,14 +42,24 @@
#define PD_DEVNUM 0500
#define PD_OFF (1 << DEV_V_UF)
#define PIA_CH u3
#define PIA_FLG 07
#define CLK_IRQ 010
#define TMR_PD 3
int pd_tps = 60;
t_stat pd_devio(uint32 dev, uint64 *data);
const char *pd_description (DEVICE *dptr);
t_stat pd_srv(UNIT *uptr);
t_stat pd_set_on(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat pd_set_off(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat pd_show_on(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
UNIT pd_unit[] = {
{UDATA(NULL, UNIT_DISABLE, 0)}, /* 0 */
{UDATA(pd_srv, UNIT_IDLE|UNIT_DISABLE, 0)}, /* 0 */
};
DIB pd_dib = {PD_DEVNUM, 1, &pd_devio, NULL};
@ -91,6 +101,21 @@ t_stat pd_devio(uint32 dev, uint64 *data)
else
*data = pd_ticks();
break;
case CONI:
*data = (uint64)(pd_unit[0].PIA_CH & (CLK_IRQ|PIA_FLG));
break;
case CONO:
pd_unit[0].PIA_CH &= ~(PIA_FLG);
pd_unit[0].PIA_CH |= (int32)(*data & PIA_FLG);
if (pd_unit[0].PIA_CH & PIA_FLG) {
if (!sim_is_active(pd_unit))
sim_activate(pd_unit, 10000);
}
if (*data & CLK_IRQ) {
pd_unit[0].PIA_CH &= ~(CLK_IRQ);
clr_interrupt(PD_DEVNUM);
}
break;
default:
break;
}
@ -98,6 +123,23 @@ t_stat pd_devio(uint32 dev, uint64 *data)
return SCPE_OK;
}
t_stat
pd_srv(UNIT * uptr)
{
int32 t;
t = sim_rtcn_calb (pd_tps, TMR_PD);
sim_activate_after(uptr, 1000000/pd_tps);
if (uptr->PIA_CH & PIA_FLG) {
uptr->PIA_CH |= CLK_IRQ;
set_interrupt(PD_DEVNUM, uptr->PIA_CH);
} else
sim_cancel(uptr);
return SCPE_OK;
}
const char *pd_description (DEVICE *dptr)
{
return "Paul DeCoriolis clock";

View File

@ -1,6 +1,6 @@
/* ka10_ten11.c: Rubin 10-11 interface.
Copyright (c) 2018, Lars Brinkhoff
Copyright (c) 2018-2019, Lars Brinkhoff
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@ -32,12 +32,7 @@
#if (NUM_DEVS_TEN11 > 0)
#include <fcntl.h>
//#include <unistd.h>
#include <sys/types.h>
//#include <sys/socket.h>
//#include <netinet/in.h>
//#include <netinet/tcp.h>
//#include <arpa/inet.h>
/* Rubin 10-11 pager. */
static uint64 ten11_pager[256];
@ -73,7 +68,7 @@ static t_stat ten11_attach_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
static const char *ten11_description (DEVICE *dptr);
UNIT ten11_unit[1] = {
{ UDATA (&ten11_svc, UNIT_IDLE|UNIT_ATTABLE, 0), 1000 },
{ UDATA (&ten11_svc, UNIT_IDLE|UNIT_ATTABLE, 0), 1000 },
};
static REG ten11_reg[] = {
@ -128,7 +123,7 @@ static t_stat ten11_reset (DEVICE *dptr)
ten11_desc.buffered = 2048;
if (ten11_unit[0].flags & UNIT_ATT)
sim_activate (&ten11_unit[0], 1000);
sim_activate_abs (&ten11_unit[0], 0);
else
sim_cancel (&ten11_unit[0]);
@ -147,7 +142,7 @@ static t_stat ten11_attach (UNIT *uptr, CONST char *cptr)
if (r != SCPE_OK) /* error? */
return r;
sim_debug(DBG_TRC, &ten11_dev, "activate connection\n");
sim_activate (uptr, 10); /* start poll */
sim_activate_abs (uptr, 0); /* start poll */
uptr->flags |= UNIT_ATT;
return SCPE_OK;
}
@ -184,7 +179,7 @@ static t_stat ten11_svc (UNIT *uptr)
ten11_ldsc.rcve = 1;
uptr->wait = TEN11_POLL;
}
sim_activate (uptr, uptr->wait);
sim_clock_coschedule (uptr, uptr->wait);
return SCPE_OK;
}

View File

@ -69,7 +69,7 @@ TMXR tk10_desc = { TK10_LINES, 0, 0, tk10_ldsc };
static uint64 status = 0;
UNIT tk10_unit[] = {
{UDATA(tk10_svc, TT_MODE_7B|UNIT_ATTABLE|UNIT_DISABLE, 0)}, /* 0 */
{UDATA(tk10_svc, TT_MODE_7B|UNIT_IDLE|UNIT_ATTABLE, 0)}, /* 0 */
};
DIB tk10_dib = {TK10_DEVNUM, 1, &tk10_devio, NULL};
@ -115,9 +115,6 @@ static t_stat tk10_devio(uint32 dev, uint64 *data)
status &= ~TK10_ODONE;
if (!(status & TK10_IDONE))
status &= ~TK10_INT;
/* Set txdone so future calls to tmxr_txdone_ln will
return -1 rather than 1. */
tk10_ldsc[(status & TK10_TYO) >> 12].txdone = 1;
sim_debug(DEBUG_CMD, &tk10_dev, "Clear output done port %lld\n",
(status & TK10_TYO) >> 12);
}
@ -144,13 +141,11 @@ static t_stat tk10_devio(uint32 dev, uint64 *data)
port = (status & TK10_TYO) >> 12;
sim_debug(DEBUG_DATAIO, &tk10_dev, "DATAO port %d -> %012llo\n",
port, *data);
lp = &tk10_ldsc[port];
ch = sim_tt_outcvt(*data & 0377, TT_GET_MODE (tk10_unit[0].flags));
if (!tk10_ldsc[port].conn)
/* If the port isn't connected, clear txdone to force
tmxr_txdone_ln to return 1 rather than -1. */
tk10_ldsc[port].txdone = 0;
tmxr_putc_ln (lp, ch);
if (tk10_ldsc[port].conn) {
lp = &tk10_ldsc[port];
ch = sim_tt_outcvt(*data & 0377, TT_GET_MODE (tk10_unit[0].flags));
tmxr_putc_ln (lp, ch);
}
status &= ~TK10_ODONE;
if (!(status & TK10_IDONE)) {
status &= ~TK10_INT;
@ -185,16 +180,13 @@ static t_stat tk10_svc (UNIT *uptr)
int i;
/* Slow hardware only supported 300 baud teletypes. */
sim_activate_after (uptr, 2083);
sim_clock_coschedule (uptr, 2083);
i = tmxr_poll_conn (&tk10_desc);
if (i >= 0) {
tk10_ldsc[i].conn = 1;
tk10_ldsc[i].rcve = 1;
tk10_ldsc[i].xmte = 1;
/* Set txdone so tmxr_txdone_ln will not return return 1 on
the first call after a new connection. */
tk10_ldsc[i].txdone = 1;
sim_debug(DEBUG_CMD, &tk10_dev, "Connect %d\n", i);
}
@ -244,6 +236,8 @@ static t_stat tk10_svc (UNIT *uptr)
static t_stat tk10_reset (DEVICE *dptr)
{
int i;
sim_debug(DEBUG_CMD, &tk10_dev, "Reset\n");
if (tk10_unit->flags & UNIT_ATT)
sim_activate (tk10_unit, tmxr_poll);
@ -253,6 +247,11 @@ static t_stat tk10_reset (DEVICE *dptr)
status = 0;
clr_interrupt(TK10_DEVNUM);
for (i = 0; i < TK10_LINES; i++) {
tmxr_set_line_unit (&tk10_desc, i, tk10_unit);
tmxr_set_line_output_unit (&tk10_desc, i, tk10_unit);
}
return SCPE_OK;
}
@ -265,9 +264,6 @@ static t_stat tk10_attach (UNIT *uptr, CONST char *cptr)
for (i = 0; i < TK10_LINES; i++) {
tk10_ldsc[i].rcve = 0;
tk10_ldsc[i].xmte = 0;
/* Set txdone so tmxr_txdone_ln will not return return 1 on
the first call. */
tk10_ldsc[i].txdone = 1;
}
if (stat == SCPE_OK) {
status = TK10_GO;

View File

@ -2649,7 +2649,8 @@ if ((reason = build_dev_tab ()) != SCPE_OK) /* build, chk dib_tab */
watch_stop = 0;
while ( reason == 0) { /* loop until ABORT */
if (sim_interval <= 0) { /* check clock queue */
AIO_CHECK_EVENT; /* queue async events */
if (sim_interval <= 0) { /* check clock queue */
if ((reason = sim_process_event()) != SCPE_OK) {/* error? stop sim */
#if ITS
if (QITS)
@ -2748,6 +2749,7 @@ no_fetch:
if (Mem_read(pi_cycle | uuo_cycle, 1, 0))
goto last;
/* Handle events during a indirect loop */
AIO_CHECK_EVENT; /* queue async events */
if (sim_interval-- <= 0) {
if ((reason = sim_process_event()) != SCPE_OK) {
return reason;
@ -2796,8 +2798,9 @@ st_pi:
#endif
/* Check if possible idle loop */
if (sim_idle_enab && (FLAGS & USER) != 0 && PC < 020 && AB < 020 &&
(IR & 0760) == 0340) {
if (sim_idle_enab &&
(((FLAGS & USER) != 0 && PC < 020 && AB < 020 && (IR & 0760) == 0340) ||
(uuo_cycle && (IR & 0740) == 0 && IA == 041))) {
sim_idle (TMR_RTC, FALSE);
}
@ -4765,6 +4768,7 @@ left:
case 0251: /* BLT */
BR = AB;
do {
AIO_CHECK_EVENT; /* queue async events */
if (sim_interval <= 0) {
sim_process_event();
}
@ -6009,6 +6013,19 @@ qua_srv(UNIT * uptr)
#endif
/*
* This sequence of instructions is a mix that hopefully
* represents a resonable instruction set that is a close
* estimate to the normal calibrated result.
*/
static const char *pdp10_clock_precalibrate_commands[] = {
"-m 100 ADDM 0,110",
"-m 101 ADDI 0,1",
"-m 102 JRST 100",
"PC 100",
NULL};
/* Reset routine */
t_stat cpu_reset (DEVICE *dptr)
@ -6043,6 +6060,7 @@ exec_map = 0;
for(i=0; i < 128; dev_irq[i++] = 0);
sim_brk_types = SWMASK('E') | SWMASK('W') | SWMASK('R');
sim_brk_dflt = SWMASK ('E');
sim_clock_precalibrate_commands = pdp10_clock_precalibrate_commands;
sim_rtcn_init_unit (&cpu_unit[0], cpu_unit[0].wait, TMR_RTC);
sim_activate(&cpu_unit[0], 10000);
#if MPX_DEV

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@ -181,6 +181,11 @@ t_stat cty_reset (DEVICE *dptr)
t_stat cty_stop_os (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
#if ITS
if (cpu_unit[0].flags & UNIT_ITSPAGE)
M[037] = FMASK;
else
#endif
M[CTY_SWITCH] = 1; /* tell OS to stop */
return SCPE_OK;
}
@ -196,7 +201,13 @@ t_stat cty_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cpt
{
fprintf (st, "To stop the cpu use the command:\n\n");
fprintf (st, " sim> SET CTY STOP\n\n");
#if ITS
fprintf (st, "If the CPU is in standard mode, this will write 1 to location\n\n");
fprintf (st, "%03o, causing TOPS10 to stop. If the CPU is in ITS mode, this\n\n", CTY_SWITCH);
fprintf (st, "will write -1 to location 037, causing ITS to stop.\n\n");
#else
fprintf (st, "This will write a 1 to location %03o, causing TOPS10 to stop\n\n", CTY_SWITCH);
#endif
fprintf (st, "The additional terminals can be set to one of four modes: UC, 7P, 7B, or 8B.\n\n");
fprintf (st, " mode input characters output characters\n\n");
fprintf (st, " UC lower case converted lower case converted to upper case,\n");

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@ -246,6 +246,8 @@ t_stat dpy_devio(uint32 dev, uint64 *data) {
dpy_update_status( uptr, ty340_reset(&dpy_dev), 1);
sim_debug(DEBUG_CONO, &dpy_dev, "DPY %03o CONO %06o PC=%06o %06o\n",
dev, (uint32)*data, PC, uptr->STAT_REG & ~STAT_VALID);
if (!sim_is_active(uptr))
sim_activate_after(uptr, DPY_CYCLE_US);
break;
case DATAO:
@ -262,6 +264,8 @@ t_stat dpy_devio(uint32 dev, uint64 *data) {
inst = (uint32)RRZ(*data);
dpy_update_status(uptr, ty340_instruction(inst), 1);
}
if (!sim_is_active(uptr))
sim_activate_after(uptr, DPY_CYCLE_US);
break;
case DATAI:
@ -276,7 +280,8 @@ t_stat dpy_devio(uint32 dev, uint64 *data) {
/* Timer service - */
t_stat dpy_svc (UNIT *uptr)
{
sim_activate_after(uptr, DPY_CYCLE_US); /* requeue! */
if (!display_is_blank() || uptr->INT_COUNTDOWN > 0)
sim_activate_after(uptr, DPY_CYCLE_US); /* requeue! */
display_age(DPY_CYCLE_US, 0); /* age the display */

File diff suppressed because it is too large Load Diff

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@ -125,7 +125,7 @@ t_stat lpt_devio(uint32 dev, uint64 *data) {
*data = uptr->STATUS & (PI_DONE|PI_ERROR|DONE_FLG|BUSY_FLG|ERR_FLG);
if ((uptr->flags & UNIT_UC) == 0)
*data |= C96;
if ((uptr->flags & UNIT_UTF8) == 0)
if ((uptr->flags & UNIT_UTF8) != 0)
*data |= C128;
if ((uptr->flags & UNIT_ATT) == 0)
*data |= ERR_FLG;
@ -266,7 +266,7 @@ lpt_output(UNIT *uptr, char c) {
lpt_buffer[uptr->POS++] = u & 0x7f;
}
uptr->COL++;
} else if (c >= 040) {
} else if (c >= 040 && c < 0177) {
lpt_buffer[uptr->POS++] = c;
uptr->COL++;
}
@ -283,7 +283,6 @@ t_stat lpt_svc (UNIT *uptr)
set_interrupt(LP_DEVNUM, uptr->STATUS);
return SCPE_OK;
}
if ((uptr->flags & UNIT_ATT) == 0) {
uptr->STATUS |= ERR_FLG;
set_interrupt(LP_DEVNUM, (uptr->STATUS >> 3));

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@ -280,7 +280,7 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
uptr->CNTRL &= ~MT_BUSY;
wr_eor = 0;
mt_status |= NEXT_UNIT;
if (cmd & 010) {
if ((cmd & 010) != 0 || (mt_pia & NEXT_UNIT_ENAB) != 0) {
mt_status |= JOB_DONE;
set_interrupt(MT_DEVNUM+4, mt_pia >> 3);
} else {

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@ -439,6 +439,15 @@ queue_point(struct point *p)
p->delay = d;
}
/*
* Return true if the display is blank, i.e. no active points in list.
*/
int
display_is_blank(void)
{
return head->next == head;
}
/*
* here to to dynamically adjust interval for examination
* of elapsed vs. simulated time, and fritter away

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@ -83,6 +83,11 @@ extern int display_scale(void);
*/
extern int display_age(int,int);
/*
* Return true if the display is blank.
*/
extern int display_is_blank(void);
/*
* display intensity levels.
* always at least 8 (for VT11/VS60) -- may be mapped internally

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