mirror of
https://github.com/open-simh/simh.git
synced 2026-01-20 18:07:22 +00:00
Adding more device help
This commit is contained in:
Mark Pizzolato
parent
63d0cdbd38
commit
864b581e35
@ -78,6 +78,8 @@ t_stat set_autocon (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat show_autocon (FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat qba_show_virt (FILE *of, UNIT *uptr, int32 val, void *desc);
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t_stat qba_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *qba_description (DEVICE *dptr);
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/* Qbus adapter data structures
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@ -120,7 +122,8 @@ DEVICE qba_dev = {
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1, 16, QBMAWIDTH, 2, 16, 16,
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&qba_ex, &qba_dep, &qba_reset,
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NULL, NULL, NULL,
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&qba_dib, DEV_QBUS
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&qba_dib, DEV_QBUS, 0, NULL, NULL, NULL, &qba_help, NULL, NULL,
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&qba_description
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};
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/* IO page dispatches */
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@ -620,3 +623,22 @@ if (cptr) {
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fprintf (of, "Invalid argument\n");
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return SCPE_OK;
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}
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t_stat qba_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "Qbus Adapter (QBA)\n\n");
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fprintf (st, "The Qbus adapter (QBA) simulates the CQBIC Qbus adapter chip.\n");
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fprint_set_help (st, dptr);
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fprint_show_help (st, dptr);
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fprintf (st, "\nThe QBA implements main memory examination and modification via the Qbus\n");
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fprintf (st, "map. The data width is always 16b:\n\n");
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fprintf (st, "EXAMINE QBA 0/10 examine main memory words corresponding\n");
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fprintf (st, " to Qbus addresses 0-10\n");
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fprint_reg_help (st, dptr);
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return SCPE_OK;
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}
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char *qba_description (DEVICE *dptr)
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{
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return "Qbus adapter";
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}
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@ -154,9 +154,9 @@ t_bool ka_hltenab = TRUE; /* Halt Enable / Autoboo
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t_stat rom_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat rom_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat rom_reset (DEVICE *dptr);
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t_stat rom_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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t_stat rom_set_diag (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat rom_show_diag (FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat rom_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *rom_description (DEVICE *dptr);
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t_stat nvr_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat nvr_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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@ -166,6 +166,7 @@ t_stat nvr_attach (UNIT *uptr, char *cptr);
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t_stat nvr_detach (UNIT *uptr);
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char *nvr_description (DEVICE *dptr);
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t_stat sysd_reset (DEVICE *dptr);
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t_stat sysd_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *sysd_description (DEVICE *dptr);
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int32 rom_rd (int32 pa);
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@ -409,17 +410,20 @@ fprintf (st, "The boot ROM consists of a single unit, simulating the 64KB boot R
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fprintf (st, "no registers. The boot ROM is loaded with a binary byte stream using the \n");
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fprintf (st, "LOAD -r command:\n\n");
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fprintf (st, " LOAD -r KA630.BIN load ROM image KA630.BIN\n\n");
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fprintf (st, "ROM accesses a use a calibrated delay that slows ROM-based execution to about\n");
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fprintf (st, "500K instructions per second. This delay is required to make the power-up\n");
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fprintf (st, "self-test routines run correctly on very fast hosts. The delay is controlled\n");
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fprintf (st, "with the commands:\n\n");
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fprintf (st, " SET ROM NODELAY ROM runs like RAM\n");
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fprintf (st, " SET ROM DELAY ROM runs slowly\n\n");
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fprintf (st, "By default the memory power-up self-tests are skipped as they take a long time\n");
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fprintf (st, "to complete. The self-test sequence can be controlled with the following\n");
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fprintf (st, "commands:\n\n");
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fprintf (st, " SET CPU DIAG=MIN Run minimal diagnostics (skip memory test)\n");
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fprintf (st, " SET CPU DIAG=FULL Run full diagnostics\n\n");
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fprintf (st, "When the simulator starts running (via the BOOT command), if the ROM has\n");
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fprintf (st, "not yet been loaded, an attempt will be made to automatically load the\n");
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fprintf (st, "ROM image from the file ka655x.bin in the current working directory.\n");
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fprintf (st, "If that load attempt fails, then a copy of the missing ROM file is\n");
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fprintf (st, "written to the current directory and the load attempt is retried.\n\n");
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fprintf (st, "ROM accesses a use a calibrated delay that slows ROM-based execution to\n");
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fprintf (st, "about 500K instructions per second. This delay is required to make the\n");
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fprintf (st, "power-up self-test routines run correctly on very fast hosts.\n");
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fprint_set_help (st, dptr);
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fprintf (st, "By default the memory power-up self-tests are skipped as they take a long\n");
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fprintf (st, "time to complete. The self-test sequence can be controlled with the\n");
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fprintf (st, "following commands:\n\n");
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fprintf (st, " SET CPU DIAG=MIN Run minimal diagnostics (skip memory test)\n");
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fprintf (st, " SET CPU DIAG=FULL Run full diagnostics\n\n");
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return SCPE_OK;
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}
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@ -497,7 +501,7 @@ return SCPE_OK;
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t_stat nvr_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "Non-volatile Memory (NVR)\n\n");
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fprintf (st, "The NVR simulates 50 bytes of battery-backed up memory.\n");
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fprintf (st, "The NVR simulates 128 bytes of battery-backed up memory.\n");
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fprintf (st, "When the simulator starts, NVR is cleared to 0, and the battery-low indicator\n");
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fprintf (st, "is set. Alternately, NVR can be attached to a file. This allows the NVR\n");
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fprintf (st, "state to be preserved across simulator runs. Successfully attaching an NVR\n");
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17
VAX/vax_io.c
17
VAX/vax_io.c
@ -132,6 +132,7 @@ t_stat set_autocon (UNIT *uptr, int32 val, char *cptr, void *desc);
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t_stat show_autocon (FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc);
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t_stat qba_show_virt (FILE *of, UNIT *uptr, int32 val, void *desc);
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t_stat qba_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *qba_description (DEVICE *dptr);
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/* Qbus adapter data structures
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@ -179,7 +180,7 @@ DEVICE qba_dev = {
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1, 16, CQMAWIDTH, 2, 16, 16,
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&qba_ex, &qba_dep, &qba_reset,
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NULL, NULL, NULL,
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&qba_dib, DEV_QBUS, 0, NULL, NULL, NULL, NULL, NULL, NULL,
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&qba_dib, DEV_QBUS, 0, NULL, NULL, NULL, &qba_help, NULL, NULL,
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&qba_description
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};
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@ -821,6 +822,20 @@ fprintf (of, "Invalid argument\n");
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return SCPE_OK;
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}
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t_stat qba_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "Qbus Adapter (QBA)\n\n");
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fprintf (st, "The Qbus adapter (QBA) simulates the CQBIC Qbus adapter chip.\n");
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fprint_set_help (st, dptr);
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fprint_show_help (st, dptr);
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fprintf (st, "\nThe QBA implements main memory examination and modification via the Qbus\n");
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fprintf (st, "map. The data width is always 16b:\n\n");
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fprintf (st, "EXAMINE QBA 0/10 examine main memory words corresponding\n");
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fprintf (st, " to Qbus addresses 0-10\n");
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fprint_reg_help (st, dptr);
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return SCPE_OK;
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}
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char *qba_description (DEVICE *dptr)
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{
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return "Qbus adapter";
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@ -122,6 +122,7 @@ t_stat clk_detach (UNIT *uptr);
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t_stat todr_resync (void);
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char *tti_description (DEVICE *dptr);
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char *tto_description (DEVICE *dptr);
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t_stat clk_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *clk_description (DEVICE *dptr);
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extern int32 sysd_hlt_enb (void);
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@ -244,7 +245,7 @@ DEVICE clk_dev = {
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1, 0, 8, 4, 0, 32,
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NULL, NULL, &clk_reset,
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NULL, &clk_attach, &clk_detach,
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&clk_dib, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL,
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&clk_dib, 0, 0, NULL, NULL, NULL, &clk_help, NULL, NULL,
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&clk_description
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};
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@ -528,6 +529,33 @@ if (clk_unit.filebuf == NULL) { /* make sure the TODR is
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return SCPE_OK;
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}
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t_stat clk_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "Real-Time Clock (CLK)\n\n");
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fprintf (st, "The real-time clock autocalibrates; the clock interval is adjusted up or down\n");
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fprintf (st, "so that the clock tracks actual elapsed time.\n\n");
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fprintf (st, "There are two modes of TODR operation:\n\n");
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fprintf (st, " Default VMS mode. Without initializing the TODR it returns the current\n");
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fprintf (st, " time of year offset which VMS would set the clock to\n");
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fprintf (st, " if VMS knew the correct time (i.e. by manual input).\n");
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fprintf (st, " This is correct almost all the time unless a VMS disk\n");
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fprintf (st, " hadn’t been booted from in the current year. This mode\n");
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fprintf (st, " produces strange time results for non VMS OSes on each\n");
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fprintf (st, " system boot.\n");
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fprintf (st, " OS Agnostic mode. This mode behaves precisely like the VAX780 TODR and\n");
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fprintf (st, " works correctly for all OSes. This mode is enabled by\n");
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fprintf (st, " attaching the CLK to a battery backup state file for the\n");
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fprintf (st, " TOY clock (i.e. sim> attach CLK TOY_CLOCK). When\n");
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fprintf (st, " operating in OS Agnostic mode, the TODR will initially\n");
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fprintf (st, " start counting from 0 and be adjusted differently when\n");
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fprintf (st, " an OS specifically writes to the TODR. VMS will prompt\n");
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fprintf (st, " to set the time on each boot (if the TODR value is less\n");
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fprintf (st, " than about 1 month) unless the SYSGEN parameter\n");
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fprintf (st, " TIMEPROMPTWAIT is set to 0.\n");
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fprint_reg_help (st, dptr);
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return SCPE_OK;
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}
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char *clk_description (DEVICE *dptr)
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{
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return "time of year clock";
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@ -235,12 +235,14 @@ static uint32 rom_delay = 0;
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t_stat rom_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat rom_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat rom_reset (DEVICE *dptr);
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t_stat rom_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *rom_description (DEVICE *dptr);
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t_stat nvr_ex (t_value *vptr, t_addr exta, UNIT *uptr, int32 sw);
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t_stat nvr_dep (t_value val, t_addr exta, UNIT *uptr, int32 sw);
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t_stat nvr_reset (DEVICE *dptr);
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t_stat nvr_attach (UNIT *uptr, char *cptr);
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t_stat nvr_detach (UNIT *uptr);
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t_stat nvr_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *nvr_description (DEVICE *dptr);
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t_stat csi_reset (DEVICE *dptr);
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char *csi_description (DEVICE *dptr);
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@ -249,6 +251,7 @@ t_stat cso_svc (UNIT *uptr);
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char *cso_description (DEVICE *dptr);
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t_stat tmr_svc (UNIT *uptr);
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t_stat sysd_reset (DEVICE *dptr);
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t_stat sysd_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
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char *sysd_description (DEVICE *dptr);
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int32 rom_rd (int32 pa);
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@ -314,8 +317,8 @@ REG rom_reg[] = {
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};
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MTAB rom_mod[] = {
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{ UNIT_NODELAY, UNIT_NODELAY, "fast access", "NODELAY", NULL, NULL, NULL, "Disable calibrated ROM access speed" },
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{ UNIT_NODELAY, 0, "1usec calibrated access", "DELAY", NULL, NULL, NULL, "Enable calibrated ROM access speed" },
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{ UNIT_NODELAY, UNIT_NODELAY, "fast access", "NODELAY", NULL, NULL, NULL, "Disable calibrated delay - ROM runs like RAM" },
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{ UNIT_NODELAY, 0, "1usec calibrated access", "DELAY", NULL, NULL, NULL, "Enable calibrated ROM delay - ROM runs slowly" },
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{ 0 }
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};
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@ -324,7 +327,7 @@ DEVICE rom_dev = {
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1, 16, ROMAWIDTH, 4, 16, 32,
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&rom_ex, &rom_dep, &rom_reset,
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NULL, NULL, NULL,
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NULL, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, 0, 0, NULL, NULL, NULL, &rom_help, NULL, NULL,
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&rom_description
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};
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@ -347,7 +350,7 @@ DEVICE nvr_dev = {
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1, 16, NVRAWIDTH, 4, 16, 32,
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&nvr_ex, &nvr_dep, &nvr_reset,
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NULL, &nvr_attach, &nvr_detach,
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NULL, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, 0, 0, NULL, NULL, NULL, &nvr_help, NULL, NULL,
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&nvr_description
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};
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@ -478,7 +481,7 @@ DEVICE sysd_dev = {
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2, 16, 16, 1, 16, 8,
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NULL, NULL, &sysd_reset,
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NULL, NULL, NULL,
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&sysd_dib, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL,
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&sysd_dib, 0, 0, NULL, NULL, NULL, &sysd_help, NULL, NULL,
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&sysd_description
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};
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@ -605,6 +608,25 @@ if (rom == NULL)
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return SCPE_OK;
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}
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t_stat rom_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "Read-only memory (ROM)\n\n");
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fprintf (st, "The boot ROM consists of a single unit, simulating the 128KB boot ROM. It\n");
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fprintf (st, "has no registers. The boot ROM can be loaded with a binary byte stream\n");
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fprintf (st, "using the LOAD -r command:\n\n");
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fprintf (st, " LOAD -r KA655X.BIN load ROM image KA655X.BIN\n\n");
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fprintf (st, "When the simulator starts running (via the BOOT command), if the ROM has\n");
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fprintf (st, "not yet been loaded, an attempt will be made to automatically load the\n");
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fprintf (st, "ROM image from the file ka655x.bin in the current working directory.\n");
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fprintf (st, "If that load attempt fails, then a copy of the missing ROM file is\n");
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fprintf (st, "written to the current directory and the load attempt is retried.\n\n");
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fprintf (st, "ROM accesses a use a calibrated delay that slows ROM-based execution to\n");
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fprintf (st, "about 500K instructions per second. This delay is required to make the\n");
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fprintf (st, "power-up self-test routines run correctly on very fast hosts.\n");
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fprint_set_help (st, dptr);
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return SCPE_OK;
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}
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char *rom_description (DEVICE *dptr)
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{
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return "read-only memory";
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@ -703,6 +725,19 @@ if ((uptr->flags & UNIT_ATT) == 0)
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return r;
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}
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t_stat nvr_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "Non-volatile Memory (NVR)\n\n");
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fprintf (st, "The NVR consists of a single unit, simulating 1KB of battery-backed up memory\n");
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fprintf (st, "in the SSC chip. When the simulator starts, NVR is cleared to 0, and the SSC\n");
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fprintf (st, "battery-low indicator is set. Normally, NVR is saved and restored like other\n");
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fprintf (st, "memory in the system. Alternately, NVR can be attached to a file. This\n");
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fprintf (st, "allows its contents to be saved and restored independently of other memories,\n");
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fprintf (st, "so that NVR state can be preserved across simulator runs.\n\n");
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fprintf (st, "Successfully loading an NVR image clears the SSC battery-low indicator.\n\n");
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return SCPE_OK;
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}
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char *nvr_description (DEVICE *dptr)
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{
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return "non-volatile memory";
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@ -1689,10 +1724,31 @@ ssc_otp = 0;
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return SCPE_OK;
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}
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t_stat sysd_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr)
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{
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fprintf (st, "System Devices (SYSD)\n\n");
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fprintf (st, "The system devices are the system-specific facilities implemented in the CVAX\n");
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fprintf (st, "chip, the KA655 CPU board, the CMCTL memory controller, and the SSC\n");
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fprintf (st, "system support chip. Note that the simulation of these devices is incomplete\n");
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fprintf (st, "and is intended strictly to allow the patched bootstrap and console code to\n");
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fprintf (st, "run.\n");
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fprint_reg_help (st, dptr);
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fprintf (st, "\nBDR<7> is the halt-enabled switch. It controls how the console firmware\n");
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fprintf (st, "responds to a BOOT command, a kernel halt (if option CONHALT is set), or a\n");
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fprintf (st, "console halt (BREAK typed on the console terminal). If BDR<7> is set, the\n");
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fprintf (st, "onsole firmware responds to all these conditions by entering its interactive\n");
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fprintf (st, "command mode. If BDR<7> is clear, the console firmware boots the operating\n");
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fprintf (st, "system in response to these conditions. This bit can be set and cleared by\n");
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fprintf (st, "the command “SET CPU AUTOBOOT” (clearing the flag) and “SET CPU NOAUTOBOOT”\n");
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fprintf (st, "setting the flag. The default value is set.\n");
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return SCPE_OK;
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}
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char *sysd_description (DEVICE *dptr)
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{
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return "system devices";
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}
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t_stat cpu_set_model (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
|
||||
if ((cptr == NULL) || (!*cptr))
|
||||
|
||||
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Reference in New Issue
Block a user