github.com/open-simh.simh
1
0
Fork 0
mirror of https://github.com/open-simh/simh.git synced 2026-03-10 12:48:52 +00:00
Code Issues Projects Releases Wiki Activity

sigma: New simulator from beta

Browse Source
This commit is contained in:
Bob Supnik
2018-06-03 18:23:54 -07:00
committed by Mark Pizzolato
parent 8308664ccb
commit f6654c0549
15 changed files with 126 additions and 120 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
doc/sigma_doc.doc Normal file
View File

Binary file not shown.

16
sigma/sigma_cis.c
View File

@@ -1,6 +1,6 @@
/* sigma_cis.c: Sigma decimal instructions
Copyright (c) 2007-2008, Robert M Supnik
Copyright (c) 2007-2018, Robert M Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,8 @@
Questions:
1. On the Sigma 9, in ASCII mode, is an ASCII blank used in EBS?
02-Jun-2018 RMS Fixed unsigned < 0 in decimal compare (Mark Pizzolato)
*/
#include "sigma_defs.h"
@@ -100,7 +102,7 @@ uint32 cis_dec (uint32 op, uint32 lnt, uint32 bva)
{
dstr_t src1, src2, src2x, dst;
uint32 i, t, kint, ldivr, ldivd, ad, c, d, end;
int32 sc;
int32 sc, scmp;
uint32 tr;
if (lnt == 0) /* adjust length */
@@ -163,10 +165,10 @@ switch (op) { /* case on opcode */
if (src1.sign ^ src2.sign) /* signs differ? */
CC = src1.sign? CC4: CC3; /* set < or > */
else { /* same signs */
t = CmpDstr (&src1, &src2); /* compare strings */
if (t < 0)
scmp = CmpDstr (&src1, &src2); /* compare strings */
if (scmp < 0)
CC = (src1.sign? CC3: CC4);
else if (t > 0)
else if (scmp > 0)
CC = (src1.sign? CC4: CC3);
else CC = 0;
}
@@ -841,7 +843,7 @@ uint32 NibbleRshift (dstr_t *dsrc, uint32 sc, uint32 cin)
int32 i;
uint32 s, nc;
if (s = sc * 4) {
if ((s = sc * 4)) {
for (i = DSTRLNT - 1; (int32) i >= 0; i--) {
nc = (dsrc->val[i] << (32 - s)) & WMASK;
dsrc->val[i] = ((dsrc->val[i] >> s) |
@@ -865,7 +867,7 @@ uint32 NibbleLshift (dstr_t *dsrc, uint32 sc, uint32 cin)
{
uint32 i, s, nc;
if (s = sc * 4) {
if ((s = sc * 4)) {
for (i = 0; i < DSTRLNT; i++) {
nc = dsrc->val[i] >> (32 - s);
dsrc->val[i] = ((dsrc->val[i] << s) |

10
sigma/sigma_coc.c
View File

@@ -97,9 +97,9 @@ t_stat muxc_svc (UNIT *uptr);
t_stat muxo_svc (UNIT *uptr);
t_stat muxi_rtc_svc (UNIT *uptr);
t_stat mux_reset (DEVICE *dptr);
t_stat mux_attach (UNIT *uptr, char *cptr);
t_stat mux_attach (UNIT *uptr, CONST char *cptr);
t_stat mux_detach (UNIT *uptr);
t_stat mux_vlines (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat mux_vlines (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
void mux_reset_ln (int32 ln);
void mux_scan_next (t_bool clr);
t_stat muxi_put_char (uint32 c, uint32 ln);
@@ -417,7 +417,7 @@ if ((newln >= 0) && (mux_sta[newln] & MUXL_REP)) { /* rcv enb pending? */
tmxr_poll_rx (&mux_desc); /* poll for input */
for (ln = 0; ln < MUX_NUMLIN; ln++) { /* loop thru lines */
if (mux_ldsc[ln].conn) { /* connected? */
if (c = tmxr_getc_ln (&mux_ldsc[ln])) { /* get char */
if ((c = tmxr_getc_ln (&mux_ldsc[ln]))) { /* get char */
if (c & SCPE_BREAK) /* break? */
mux_sta[ln] |= MUXL_RBP; /* set rcv brk */
else { /* normal char */
@@ -544,7 +544,7 @@ return SCPE_OK;
/* Attach master unit */
t_stat mux_attach (UNIT *uptr, char *cptr)
t_stat mux_attach (UNIT *uptr, CONST char *cptr)
{
t_stat r;
@@ -572,7 +572,7 @@ return r;
/* Change number of lines */
t_stat mux_vlines (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat mux_vlines (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 newln, i, t;
t_stat r;

50
sigma/sigma_cpu.c
View File

@@ -190,17 +190,17 @@ t_stat cpu_svc (UNIT *uptr);
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_reset (DEVICE *dptr);
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_set_type (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_set_opt (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_clr_opt (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_set_rblks (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_show_rblks (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat cpu_set_hist (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat cpu_set_alarm (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_show_alarm (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat cpu_show_addr (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat cpu_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_set_type (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_set_opt (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_clr_opt (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_set_rblks (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_show_rblks (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat cpu_set_hist (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat cpu_set_alarm (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_show_alarm (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat cpu_show_addr (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
void set_rf_display (uint32 *rfbase);
void inst_hist (uint32 ir, uint32 pc, uint32 typ);
uint32 cpu_one_inst (uint32 real_pc, uint32 IR);
@@ -252,8 +252,8 @@ extern uint32 int_reset (DEVICE *dev);
extern void io_set_eimax (uint32 lnt);
extern void io_sclr_req (uint32 inum, uint32 val);
extern void io_sclr_arm (uint32 inum, uint32 val);
extern t_stat io_set_nchan (UNIT *uptr, int32 val, char *cptr, void *desc);
extern t_stat io_show_nchan (FILE *st, UNIT *uptr, int32 val, void *desc);
extern t_stat io_set_nchan (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
extern t_stat io_show_nchan (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
/* CPU data structures
@@ -436,7 +436,7 @@ while (reason == 0) { /* loop until stop */
}
if (sim_interval <= 0) { /* event queue? */
if (reason = sim_process_event ()) /* process */
if ((reason = sim_process_event ())) /* process */
break;
int_hireq = io_eval_int (); /* re-evaluate intr */
}
@@ -2575,7 +2575,7 @@ return SCPE_OK;
/* Set CPU type */
t_stat cpu_set_type (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_type (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 model = CPUF_GETMOD (val);
@@ -2593,7 +2593,7 @@ return SCPE_OK;
/* Set memory size */
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 mc = 0;
uint32 i;
@@ -2614,7 +2614,7 @@ return SCPE_OK;
/* Set and clear options */
t_stat cpu_set_opt (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_opt (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
if ((val & (cpu_tab[cpu_model].std | cpu_tab[cpu_model].opt)) == 0)
return SCPE_NOFNC;
@@ -2622,7 +2622,7 @@ cpu_unit.flags |= val;
return SCPE_OK;
}
t_stat cpu_clr_opt (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_clr_opt (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
if (val & cpu_tab[cpu_model].std)
return SCPE_NOFNC;
@@ -2632,7 +2632,7 @@ return SCPE_OK;
/* Set/show register blocks */
t_stat cpu_set_rblks (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_rblks (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 invmask, lnt, i, j;
t_stat r;
@@ -2656,7 +2656,7 @@ for (i = rf_bmax; i < RF_NBLK; i++) { /* zero unused */
return SCPE_OK;
}
t_stat cpu_show_rblks (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat cpu_show_rblks (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, "register blocks=%d", rf_bmax);
return SCPE_OK;
@@ -2678,13 +2678,13 @@ return;
/* Front panael alarm */
t_stat cpu_set_alarm (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_alarm (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
cons_alarm_enb = val;
return SCPE_OK;
}
t_stat cpu_show_alarm (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat cpu_show_alarm (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fputs (cons_alarm_enb? "alarm enabled\n": "alarm disabled\n", st);
return SCPE_OK;
@@ -2701,7 +2701,7 @@ return SCPE_OK;
/* Virtual address translation */
t_stat cpu_show_addr (FILE *of, UNIT *uptr, int32 val, void *desc)
t_stat cpu_show_addr (FILE *of, UNIT *uptr, int32 val, CONST void *desc)
{
t_stat r;
char *cptr = (char *) desc;
@@ -2757,7 +2757,7 @@ return;
/* Set history */
t_stat cpu_set_hist (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_hist (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 i, lnt;
t_stat r;
@@ -2820,7 +2820,7 @@ return;
/* Show history */
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
int32 k, di, lnt;
t_stat r;

2
sigma/sigma_defs.h
View File

@@ -319,7 +319,7 @@ typedef struct {
#define MMC_M_CNT 0xFF
#define MMC_CNT (MMC_M_CNT << MMC_V_CNT)
#define MMC_V_CS 9 /* start of page */
/* /* map 1: 2b locks, per model */
/* map 1: 2b locks, per model */
#define MMC_M_CS2 0xFC /* map 2: access controls */
#define MMC_M_CS3 0x7FE /* map 3: 4b locks */
#define MMC_M_CS4 0xFF /* map 4: 8b relocation */

36
sigma/sigma_dp.c
View File

@@ -158,14 +158,14 @@
type #sectors/ #surfaces/ #cylinders/
surface cylinder drive
7242 6 20 203 =24MB
7261 11 20 203 =45MB
7271 6 20 406 =48MB
7242 6 20 203 =24MB
7261 11 20 203 =45MB
7271 6 20 406 =48MB
3288 17 5 822 =67MB
7276 11 19 411 =86MB
7266 11 20 411 =90MB
3282 11 19 815 =170MB
3283 17 19 815 =263MB
3282 11 19 815 =170MB
3283 17 19 815 =263MB
On the T3281, each drive can be a different type. The size field
in each unit selects the drive capacity for each drive and thus
@@ -290,11 +290,11 @@ t_bool dp_end_sec (UNIT *uptr, uint32 lnt, uint32 exp, uint32 st);
int32 dp_clr_int (uint32 cidx);
void dp_set_ski (uint32 cidx, uint32 un);
void dp_clr_ski (uint32 cidx, uint32 un);
t_stat dp_attach (UNIT *uptr, char *cptr);
t_stat dp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat dp_set_auto (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat dp_set_ctl (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat dp_show_ctl (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat dp_attach (UNIT *uptr, CONST char *cptr);
t_stat dp_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat dp_set_auto (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat dp_set_ctl (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat dp_show_ctl (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
static DP_TYPE dp_tab[] = {
{ DP_ENT (7242, 7240) },
@@ -776,7 +776,7 @@ switch (uptr->UCMD) {
else wd = 0;
dp_buf[i] = wd; /* store in buffer */
}
if (r = dp_write (uptr, da)) /* write buf, err? */
if ((r = dp_write (uptr, da))) /* write buf, err? */
return r;
if (dp_end_sec (uptr, DP_WDSC, DP_WDSC, st)) /* transfer done? */
return SCPE_OK; /* err or cont */
@@ -818,7 +818,7 @@ switch (uptr->UCMD) {
chan_uen (dva); /* uend */
return SCPE_OK;
}
if (r = dp_read (uptr, da)) /* read buf, error? */
if ((r = dp_read (uptr, da))) /* read buf, error? */
return r;
for (i = 0, st = 0; (i < (DP_WDSC * 4)) && (st != CHS_ZBC); i++) {
st = chan_RdMemB (dva, &wd); /* read byte */
@@ -843,7 +843,7 @@ switch (uptr->UCMD) {
chan_uen (dva); /* uend */
return SCPE_OK;
}
if (r = dp_read (uptr, da)) /* read buf, error? */
if ((r = dp_read (uptr, da))) /* read buf, error? */
return r;
for (i = 0, st = 0; (i < DP_WDSC) && (st != CHS_ZBC); i++) {
st = chan_WrMemW (dva, dp_buf[i]); /* store in mem */
@@ -1225,7 +1225,7 @@ return SCPE_OK;
/* Device attach */
t_stat dp_attach (UNIT *uptr, char *cptr)
t_stat dp_attach (UNIT *uptr, CONST char *cptr)
{
uint32 i, p;
t_stat r;
@@ -1252,7 +1252,7 @@ return SCPE_OK;
/* Set drive type command validation routine */
t_stat dp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat dp_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 dtype = GET_DTYPE (val);
uint32 cidx = uptr->UCTX;
@@ -1269,7 +1269,7 @@ return SCPE_OK;
/* Set unit autosize validation routine */
t_stat dp_set_auto (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat dp_set_auto (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 cidx = uptr->UCTX;
@@ -1284,7 +1284,7 @@ return SCPE_OK;
/* Set controller type command validation routine */
t_stat dp_set_ctl (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat dp_set_ctl (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 i, new_dtyp, cidx = uptr->UCTX;
DP_CTX *ctx = &dp_ctx[cidx];
@@ -1320,7 +1320,7 @@ for (i = 0; i < DP_NUMDR_16B; i++) {
return SCPE_OK;
}
t_stat dp_show_ctl (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat dp_show_ctl (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
uint32 cidx = uptr->UCTX;

24
sigma/sigma_io.c
View File

@@ -101,8 +101,8 @@ t_bool io_init_inst (uint32 ad, uint32 rn, uint32 ch, uint32 dev, uint32 r0);
uint32 io_set_status (uint32 rn, uint32 ch, uint32 dev, uint32 dvst, t_bool tdv);
uint32 io_rwd_m0 (uint32 op, uint32 rn, uint32 ad);
uint32 io_rwd_m1 (uint32 op, uint32 rn, uint32 ad);
t_stat io_set_eiblks (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat io_show_eiblks (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat io_set_eiblks (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat io_show_eiblks (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat int_reset (DEVICE *dptr);
t_stat chan_reset (DEVICE *dptr);
uint32 chan_new_cmd (uint32 ch, uint32 dev, uint32 clc);
@@ -1043,7 +1043,7 @@ if (op == OP_RD) { /* read direct? */
}
else if (QCPU_S89 && (fnc == 0x045)) { /* S89 only */
if (rn)
R[rn] = s9_marg & 0x00C00000 | /* <8,9> = margins */
R[rn] = (s9_marg & 0x00C00000) | /* <8,9> = margins */
(QCPU_S9? 0x00100000: 0x00200000); /* S8 sets 10, S9 11 */
}
else if (QCPU_S89 && (fnc == 0x049)) { /* S89 only */
@@ -1307,7 +1307,7 @@ return SCPE_OK;
/* Set/show external interrupt blocks */
t_stat io_set_eiblks (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat io_set_eiblks (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 lnt;
t_stat r;
@@ -1322,7 +1322,7 @@ io_set_eimax (lnt);
return SCPE_OK;
}
t_stat io_show_eiblks (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat io_show_eiblks (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, "eiblks=%d", ei_bmax);
return SCPE_OK;
@@ -1358,7 +1358,7 @@ return;
/* Set or show number of channels */
t_stat io_set_nchan (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat io_set_nchan (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 i, num;
t_stat r;
@@ -1378,7 +1378,7 @@ for (i = 0; i < CHAN_N_CHAN; i++) {
return SCPE_OK;
}
t_stat io_show_nchan (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat io_show_nchan (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, "channels=%d", chan_num);
return SCPE_OK;
@@ -1386,7 +1386,7 @@ return SCPE_OK;
/* Set or show device channel assignment */
t_stat io_set_dvc (UNIT* uptr, int32 val, char *cptr, void *desc)
t_stat io_set_dvc (UNIT* uptr, int32 val, CONST char *cptr, void *desc)
{
int32 num;
DEVICE *dptr;
@@ -1404,7 +1404,7 @@ dibp->dva = (dibp->dva & ~DVA_CHAN) | (num << DVA_V_CHAN);
return SCPE_OK;
}
t_stat io_show_dvc (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat io_show_dvc (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
DEVICE *dptr;
dib_t *dibp;
@@ -1418,7 +1418,7 @@ return SCPE_OK;
/* Set or show device address */
t_stat io_set_dva (UNIT* uptr, int32 val, char *cptr, void *desc)
t_stat io_set_dva (UNIT* uptr, int32 val, CONST char *cptr, void *desc)
{
int32 num;
DEVICE *dptr;
@@ -1439,7 +1439,7 @@ else dibp->dva = (dibp->dva & ~DVA_DEVSU) | ((num & DVA_M_DEVSU) << DVA_V_DEVSU)
return SCPE_OK;
}
t_stat io_show_dva (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat io_show_dva (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
DEVICE *dptr;
dib_t *dibp;
@@ -1453,7 +1453,7 @@ return SCPE_OK;
/* Show channel state */
t_stat io_show_cst (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat io_show_cst (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
DEVICE *dptr;
dib_t *dibp;

14
sigma/sigma_io_defs.h
View File

@@ -260,17 +260,17 @@ uint32 chan_WrMemW (uint32 dva, uint32 dat);
t_stat chan_reset_dev (uint32 dva);
void io_sclr_req (uint32 inum, uint32 val);
void io_sclr_arm (uint32 inum, uint32 val);
t_stat io_set_dvc (UNIT* uptr, int32 val, char *cptr, void *desc);
t_stat io_show_dvc (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat io_set_dva (UNIT* uptr, int32 val, char *cptr, void *desc);
t_stat io_show_dva (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat io_show_cst (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat io_set_dvc (UNIT* uptr, int32 val, CONST char *cptr, void *desc);
t_stat io_show_dvc (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat io_set_dva (UNIT* uptr, int32 val, CONST char *cptr, void *desc);
t_stat io_show_dva (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat io_show_cst (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat io_boot (int32 u, DEVICE *dptr);
/* Internal real-time event scheduler */
t_stat rtc_set_tps (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat rtc_show_tps (FILE *of, UNIT *uptr, int32 val, void *desc);
t_stat rtc_set_tps (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat rtc_show_tps (FILE *of, UNIT *uptr, int32 val, CONST void *desc);
t_stat rtc_register (uint32 tm, uint32 idx, UNIT *uptr);
#endif

18
sigma/sigma_lp.c
View File

@@ -105,10 +105,10 @@ uint32 lp_tdv_status (void);
t_stat lp_chan_err (uint32 st);
t_stat lp_svc (UNIT *uptr);
t_stat lp_reset (DEVICE *dptr);
t_stat lp_attach (UNIT *uptr, char *cptr);
t_stat lp_settype (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat lp_showtype (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat lp_load_cct (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat lp_attach (UNIT *uptr, CONST char *cptr);
t_stat lp_settype (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat lp_showtype (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat lp_load_cct (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat lp_read_cct (FILE *cfile);
uint32 lp_fmt (UNIT *uptr);
uint32 lp_skip (UNIT *uptr, uint32 ch);
@@ -462,7 +462,7 @@ return SCPE_OK;
/* Attach routine */
t_stat lp_attach (UNIT *uptr, char *cptr)
t_stat lp_attach (UNIT *uptr, CONST char *cptr)
{
lp_cctp = 0; /* clear cct ptr */
lp_pass = 0;
@@ -471,7 +471,7 @@ return attach_unit (uptr, cptr);
/* Set handler for carriage control tape */
t_stat lp_load_cct (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat lp_load_cct (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
FILE *cfile;
t_stat r;
@@ -491,7 +491,7 @@ t_stat lp_read_cct (FILE *cfile)
{
uint32 col, rpt, ptr, mask;
uint8 cctbuf[CCT_LNT];
char *cptr;
CONST char *cptr;
t_stat r;
char cbuf[CBUFSIZE], gbuf[CBUFSIZE];
@@ -529,7 +529,7 @@ return SCPE_OK;
/* Set controller type */
t_stat lp_settype (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat lp_settype (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
lp_model = val;
lp_reset (&lp_dev);
@@ -538,7 +538,7 @@ return SCPE_OK;
/* Show controller type */
t_stat lp_showtype (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat lp_showtype (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, lp_model? "7450": "7440");
return SCPE_OK;

14
sigma/sigma_mt.c
View File

@@ -132,7 +132,7 @@ t_stat mt_chan_err (uint32 st);
t_stat mtu_svc (UNIT *uptr);
t_stat mtr_svc (UNIT *uptr);
t_stat mt_reset (DEVICE *dptr);
t_stat mt_attach (UNIT *uptr, char *cptr);
t_stat mt_attach (UNIT *uptr, CONST char *cptr);
t_stat mt_detach (UNIT *uptr);
t_stat mt_flush_buf (UNIT *uptr);
t_stat mt_map_err (UNIT *uptr, t_stat r);
@@ -336,12 +336,12 @@ r = SCPE_OK;
switch (cmd) { /* case on command */
case MCM_SFWR: /* space forward */
if (r = sim_tape_sprecf (uptr, &tbc)) /* spc rec fwd, err? */
if ((r = sim_tape_sprecf (uptr, &tbc))) /* spc rec fwd, err? */
r = mt_map_err (uptr, r); /* map error */
break;
case MCM_SBKR: /* space reverse */
if (r = sim_tape_sprecr (uptr, &tbc)) /* spc rec rev, err? */
if ((r = sim_tape_sprecr (uptr, &tbc))) /* spc rec rev, err? */
r = mt_map_err (uptr, r); /* map error */
break;
@@ -360,7 +360,7 @@ switch (cmd) { /* case on command */
break;
case MCM_WTM: /* write eof */
if (r = sim_tape_wrtmk (uptr)) /* write tmk, err? */
if ((r = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, r); /* map error */
uptr->UST |= MTDV_EOF; /* set eof */
break;
@@ -371,7 +371,7 @@ switch (cmd) { /* case on command */
case MCM_REW: /* rewind */
case MCM_RWI: /* rewind and int */
if (r = sim_tape_rewind (uptr)) /* rewind */
if ((r = sim_tape_rewind (uptr))) /* rewind */
r = mt_map_err (uptr, r); /* map error */
mt_unit[un + MT_REW].UCMD = uptr->UCMD; /* copy command */
sim_activate (uptr + MT_REW, mt_rwtime); /* sched compl */
@@ -461,7 +461,7 @@ t_stat st;
if (mt_blim == 0) /* any output? */
return SCPE_OK;
if (st = sim_tape_wrrecf (uptr, mt_xb, mt_blim)) /* write, err? */
if ((st = sim_tape_wrrecf (uptr, mt_xb, mt_blim))) /* write, err? */
return mt_map_err (uptr, st); /* map error */
return SCPE_OK;
}
@@ -625,7 +625,7 @@ return SCPE_OK;
/* Attach routine */
t_stat mt_attach (UNIT *uptr, char *cptr)
t_stat mt_attach (UNIT *uptr, CONST char *cptr)
{
t_stat r;

16
sigma/sigma_pt.c
View File

@@ -1,6 +1,6 @@
/* sigma_pt.c: Sigma 7060 paper tape reader/punch
Copyright (c) 2007-2008, Robert M. Supnik
Copyright (c) 2007-2018, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -24,6 +24,8 @@
in this Software without prior written authorization from Robert M Supnik.
pt 7060 paper-tape reader/punch
02-Jun-2018 RMS Defanged clang signed/unsigned whining (Mark Pizzolato)
*/
#include "sigma_io_defs.h"
@@ -61,7 +63,7 @@ uint32 pt_tdv_status (void);
t_stat pt_chan_err (uint32 st);
t_stat pt_svc (UNIT *uptr);
t_stat pt_reset (DEVICE *dptr);
t_stat pt_attach (UNIT *uptr, char *cptr);
t_stat pt_attach (UNIT *uptr, CONST char *cptr);
/* PT data structures
@@ -158,7 +160,7 @@ return 0;
t_stat pt_svc (UNIT *uptr)
{
int32 c;
uint32 cmd;
uint32 uc, cmd;
uint32 st;
switch (pt_cmd) { /* case on state */
@@ -196,7 +198,7 @@ switch (pt_cmd) { /* case on state */
if (c != 0) /* leader done? */
ptr_nzc = 1; /* set flag */
if ((pt_cmd == PTS_READI) || ptr_nzc) {
st = chan_WrMemB (pt_dib.dva, c); /* write to memory */
st = chan_WrMemB (pt_dib.dva, ((uint32) c));/* write to memory */
if (CHS_IFERR (st)) /* channel error? */
return pt_chan_err (st);
if (st == CHS_ZBC) /* bc == 0? */
@@ -208,10 +210,10 @@ switch (pt_cmd) { /* case on state */
sim_activate (uptr, pt_unit[PTP].wait); /* continue thread */
if ((pt_unit[PTP].flags & UNIT_ATT) == 0) /* not attached? */
return ptp_stopioe? SCPE_UNATT: SCPE_OK;
st = chan_RdMemB (pt_dib.dva, &c); /* read from channel */
st = chan_RdMemB (pt_dib.dva, &uc); /* read from channel */
if (CHS_IFERR (st)) /* channel error? */
return pt_chan_err (st);
if (putc (c, pt_unit[PTP].fileref) == EOF) {
if (putc (((int32) uc), pt_unit[PTP].fileref) == EOF) {
perror ("PTP I/O error");
clearerr (pt_unit[PTP].fileref);
chan_set_chf (pt_dib.dva, CHF_XMDE); /* data error */
@@ -286,7 +288,7 @@ return SCPE_OK;
/* Attach routine */
t_stat pt_attach (UNIT *uptr, char *cptr)
t_stat pt_attach (UNIT *uptr, CONST char *cptr)
{
t_stat st;

8
sigma/sigma_rad.c
View File

@@ -124,8 +124,8 @@ uint32 rad_tdv_status (uint32 un);
t_stat rad_chan_err (uint32 st);
t_stat rad_svc (UNIT *uptr);
t_stat rad_reset (DEVICE *dptr);
t_stat rad_settype (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat rad_showtype (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat rad_settype (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat rad_showtype (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_bool rad_inv_ad (uint32 *da);
t_bool rad_inc_ad (void);
t_bool rad_end_sec (UNIT *uptr, uint32 lnt, uint32 exp, uint32 st);
@@ -508,7 +508,7 @@ return SCPE_OK;
/* Set controller type */
t_stat rad_settype (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat rad_settype (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 i;
@@ -525,7 +525,7 @@ return SCPE_OK;
/* Show controller type */
t_stat rad_showtype (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat rad_showtype (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, (rad_model == RAD_7212)? "7211/7212": "7231/7232");
return SCPE_OK;

8
sigma/sigma_rtc.c
View File

@@ -76,7 +76,7 @@ static rtcdef_t rtc_tab[RTC_NUM_HZ] = {
t_stat rtc_svc (UNIT *uptr);
t_stat rtc_cntr_svc (UNIT *uptr);
t_stat rtc_reset (DEVICE *dptr);
t_stat rtc_show_events (FILE *of, UNIT *uptr, int32 val, void *desc);
t_stat rtc_show_events (FILE *of, UNIT *uptr, int32 val, CONST void *desc);
/* Clock data structures
@@ -186,7 +186,7 @@ return SCPE_OK;
/* Set timer ticks */
t_stat rtc_set_tps (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat rtc_set_tps (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 newval, i;
t_stat r;
@@ -214,7 +214,7 @@ return SCPE_ARG;
/* Show timer ticks */
t_stat rtc_show_tps (FILE *of, UNIT *uptr, int32 val, void *desc)
t_stat rtc_show_tps (FILE *of, UNIT *uptr, int32 val, CONST void *desc)
{
uint32 idx;
@@ -255,7 +255,7 @@ return SCPE_OK;
/* Show events */
t_stat rtc_show_events (FILE *of, UNIT *uptr, int32 val, void *desc)
t_stat rtc_show_events (FILE *of, UNIT *uptr, int32 val, CONST void *desc)
{
uint32 i;

14
sigma/sigma_sys.c
View File

@@ -49,7 +49,7 @@ extern uint32 *M;
extern UNIT cpu_unit;
t_stat fprint_sym_m (FILE *of, uint32 inst);
t_stat parse_sym_m (char *cptr, t_value *val);
t_stat parse_sym_m (CONST char *cptr, t_value *val);
void fprint_ebcdic (FILE *of, uint32 c);
extern t_stat lp_read_cct (FILE *cfile);
@@ -168,7 +168,7 @@ uint8 ebcdic_to_ascii[256] = {
/* Binary loader */
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
t_stat sim_load (FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
{
return lp_read_cct (fileref);
}
@@ -375,7 +375,7 @@ if (sw & SWMASK ('C')) { /* char format? */
if (sw & SWMASK ('A')) { /* ASCII? */
sc = 24 - ((addr & 0x3) * 8); /* shift count */
c = (inst >> sc) & 0x7F;
fprintf (of, "%c", FMTASC (c));
fprintf (of, FMTASC (c));
return 0;
}
if (sw & SWMASK ('E')) { /* EBCDIC? */
@@ -464,7 +464,7 @@ return;
status = error status
*/
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
t_stat parse_sym (CONST char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
{
t_value num;
uint32 i, sc, rdx, c;
@@ -539,7 +539,7 @@ if (r != SCPE_OK)
return 0;
}
t_stat parse_sym_m (char *cptr, t_value *val)
t_stat parse_sym_m (CONST char *cptr, t_value *val)
{
uint32 i, sgn;
t_stat r;
@@ -547,7 +547,7 @@ char *sep;
char gbuf[CBUFSIZE];
cptr = get_glyph (cptr, gbuf, 0); /* get opcode+reg*/
if (sep = strchr (gbuf, ',')) /* , in middle? */
if ((sep = strchr (gbuf, ','))) /* , in middle? */
*sep++ = 0; /* split strings */
for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
if (strcmp (opcode[i], gbuf) == 0) { /* string match? */
@@ -583,7 +583,7 @@ for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
sgn = 1;
else sgn = 0; /* else + */
cptr = get_glyph (cptr, gbuf, 0); /* get rest */
if (sep = strchr (gbuf, ',')) /* , in middle? */
if ((sep = strchr (gbuf, ','))) /* , in middle? */
*sep++ = 0; /* split strings */
ad = get_uint (gbuf, 16, mask, &r);
if (r != SCPE_OK)

16
sigma/sigma_tt.c
View File

@@ -1,6 +1,6 @@
/* sigma_tt.c: Sigma 7012 console teletype
Copyright (c) 2007-2008, Robert M. Supnik
Copyright (c) 2007-2018, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -30,6 +30,8 @@
CR input, mapped to NEWLINE and echoes CR-LF
^H input, mapped to EOM and not echoed
HT input or output, simulates tabbing with fixed 8 character stops
02-Jun-2018 RMS Defanged clang signed/unsigned whining (Mark Pizzolato)
*/
#include "sigma_io_defs.h"
@@ -71,7 +73,7 @@ t_stat tti_rtc_svc (uint32 tm);
t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat tt_reset (DEVICE *dptr);
t_stat tt_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat tt_set_mode (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
void tto_echo (int32 c);
extern t_stat io_set_pint (void);
@@ -214,8 +216,8 @@ return SCPE_OK;
t_stat tto_svc (UNIT *uptr)
{
int32 c, cmd;
uint32 st;
int32 c;
uint32 uc, cmd, st;
switch (tt_cmd) { /* case on state */
@@ -231,10 +233,10 @@ switch (tt_cmd) { /* case on state */
break;
case TTS_WRITE: /* char output */
st = chan_RdMemB (tt_dib.dva, &c); /* get char */
st = chan_RdMemB (tt_dib.dva, &uc); /* get char */
if (CHS_IFERR (st)) /* channel error? */
return tt_chan_err (st);
c = ebcdic_to_ascii[c & 0xFF]; /* convert to ASCII */
c = ebcdic_to_ascii[uc & 0xFF]; /* convert to ASCII */
tto_echo (c); /* echo character */
sim_activate (uptr, uptr->wait); /* continue thread */
if (st == CHS_ZBC) /* st = zbc? */
@@ -321,7 +323,7 @@ return SCPE_OK;
/* Make mode flags uniform */
t_stat tt_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat tt_set_mode (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
tt_unit[TTO].flags = (tt_unit[TTO].flags & ~TT_MODE) | val;
if (val == TT_MODE_7P)