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Here is another.
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18
assemble.c
18
assemble.c
@ -1407,7 +1407,7 @@ static int assemble(
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mode_extension(tr, &left, stack->top);
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mode_extension(tr, &right, stack->top);
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}
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return 1;
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return CHECK_EOL;
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case OC_BR:
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/* branches */ {
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@ -1467,7 +1467,7 @@ static int assemble(
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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case OC_SOB:
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{
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@ -1531,7 +1531,7 @@ static int assemble(
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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case OC_ASH:
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/* First op is gen, second is register. */ {
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@ -1568,7 +1568,7 @@ static int assemble(
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mode_extension(tr, &mode, stack->top);
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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case OC_JSR:
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/* For JSR and XOR, first op is register, second is gen. */ {
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@ -1609,7 +1609,7 @@ static int assemble(
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mode_extension(tr, &mode, stack->top);
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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case OC_1REG:
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/* One register (RTS) */ {
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@ -1628,7 +1628,7 @@ static int assemble(
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store_word(stack->top, tr, 2, op->value | reg);
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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#if 0
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/*
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@ -1652,7 +1652,7 @@ static int assemble(
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store_word(stack->top, tr, 2, word);
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mode_extension(tr, &mode, stack->top);
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}
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return 1;
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return CHECK_EOL;
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#endif
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case OC_FPPGENAC:
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@ -1693,7 +1693,7 @@ static int assemble(
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mode_extension(tr, &mode, stack->top);
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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case OC_FPPACGEN:
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/* One reg 0-3 and one gen */ {
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@ -1737,7 +1737,7 @@ static int assemble(
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mode_extension(tr, &mode, stack->top);
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free_tree(value);
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}
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return 1;
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return CHECK_EOL;
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default:
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report(stack->top, "Unimplemented instruction format\n");
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@ -147,6 +147,7 @@ test-float.mac:123: ***ERROR Junk at end of line ('5')
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123 000424 170627 000002 absf #2.5 ; bad: operand is destination
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test-float.mac:124: ***ERROR Junk at end of line ('5')
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124 000430 170527 000002 tstd #2.5 ; bad: operand is considered FDST by the arch handbook
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test-float.mac:125: ***ERROR Junk at end of line ('5')
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125 000434 174027 000002 stf ac0,#2.5 ; bad: junk at end of line
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126 000440 174027 000002 stf ac0,#2 ; doesn't makes sense but MACRO11 allows it
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127
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