mirror of
https://github.com/prirun/p50em.git
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First set of byte-swap changes; should compile equal to version 194
This commit is contained in:
Jim
parent
69a37aef55
commit
2a89fb6ab8
66
devamlc.h
66
devamlc.h
@ -559,31 +559,31 @@ int devamlc (int class, int func, int device) {
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}
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}
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//printf("devamlc: dss for device '%o = 0x%x\n", device, dc[dx].dss);
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crs[A] = ~dc[dx].dss; /* to the outside world, 1 = no carrier */
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putcrs16(A, ~dc[dx].dss); /* to the outside world, 1 = no carrier */
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IOSKIP;
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} else if (func == 07) { /* input AMLC status */
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dc[dx].interrupting = 0;
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crs[A] = 040000 | (dc[dx].bufnum<<8) | (dc[dx].intenable<<5) | (1<<4);
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putcrs16(A, 040000 | (dc[dx].bufnum<<8) | (dc[dx].intenable<<5) | (1<<4));
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if (anyeor) {
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crs[A] |= 0100000;
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putcrs16(A, getcrs16(A) | 0100000);
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for (dx=0; dx<MAXBOARDS; dx++)
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dc[dx].eor = 0;
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anyeor = 0;
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}
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if (wascti) {
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crs[A] |= 0x8f; /* last line cti */
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putcrs16(A, getcrs16(A) | 0x8f); /* last line cti */
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wascti = 0;
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}
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//printf("INA '07%02o returns 0x%x\n", device, crs[A]);
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//printf("INA '07%02o returns 0x%x\n", device, getcrs16(A));
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IOSKIP;
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if (crs[A] & 0100000) {
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if (getcrs16(A) & 0100000) {
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maxxmit = 0; /* ugh! sloppy... */
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goto dorecv;
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}
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} else if (func == 011) { /* input ID */
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crs[A] = 020054; /* 020000 = QAMLC */
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putcrs16(A, 020054); /* 020000 = QAMLC */
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IOSKIP;
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} else {
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@ -604,14 +604,14 @@ int devamlc (int class, int func, int device) {
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the line, either telnet or over a modem */
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if (func == 01) { /* set line configuration */
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lx = crs[A] >> 12;
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//printf("OTA '01%02o: AMLC line %d new config = '%o, old config = '%o\n", device, lx, crs[A] & 0xFFF, dc[dx].lconf[lx] & 0xFFF);
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lx = getcrs16(A) >> 12;
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//printf("OTA '01%02o: AMLC line %d new config = '%o, old config = '%o\n", device, lx, getcrs16(A) & 0xFFF, dc[dx].lconf[lx] & 0xFFF);
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switch (dc[dx].ctype[lx]) {
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case CT_SOCKET:
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case CT_DEDIP:
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if (!(crs[A] & 0x400) && dc[dx].fd[lx] >= 0) { /* if DTR drops, disconnect */
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if (!(getcrs16(A) & 0x400) && dc[dx].fd[lx] >= 0) { /* if DTR drops, disconnect */
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AMLC_CLOSE_LINE;
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}
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break;
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@ -624,7 +624,7 @@ int devamlc (int class, int func, int device) {
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something other than DTR changing) */
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fd = dc[dx].fd[lx];
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if ((crs[A] ^ dc[dx].lconf[lx]) & ~02000) {
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if ((getcrs16(A) ^ dc[dx].lconf[lx]) & ~02000) {
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int baud;
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struct termios terminfo;
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@ -635,13 +635,13 @@ int devamlc (int class, int func, int device) {
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}
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memset(&terminfo, 0, sizeof(terminfo));
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cfmakeraw(&terminfo);
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baud = baudtable[(crs[A] >> 6) & 7];
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baud = baudtable[(getcrs16(A) >> 6) & 7];
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if (cfsetspeed(&terminfo, baud) == -1)
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perror("em: unable to set AMLC line speed");
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else
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printf("em: AMLC line %d set to %d bps\n", dx*16 + lx, baud);
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terminfo.c_cflag = CREAD | CLOCAL; // turn on READ and ignore modem control lines
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switch (crs[A] & 3) { /* data bits */
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switch (getcrs16(A) & 3) { /* data bits */
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case 0:
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terminfo.c_cflag |= CS5;
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break;
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@ -655,11 +655,11 @@ int devamlc (int class, int func, int device) {
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terminfo.c_cflag |= CS8;
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break;
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}
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if (crs[A] & 020)
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if (getcrs16(A) & 020)
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terminfo.c_cflag |= CSTOPB;
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if (!(crs[A] & 010)) {
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if (!(getcrs16(A) & 010)) {
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terminfo.c_cflag |= PARENB;
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if (!(crs[A] & 4))
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if (!(getcrs16(A) & 4))
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terminfo.c_cflag |= PARODD;
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}
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@ -680,7 +680,7 @@ int devamlc (int class, int func, int device) {
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let it flow through to the AMLC controller. :(
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*/
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switch ((crs[A] >> 9) & 7) {
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switch ((getcrs16(A) >> 9) & 7) {
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case 1: case 3:
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terminfo.c_iflag |= IXON | IXOFF;
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terminfo.c_cc[VSTART] = 0x11;
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@ -704,7 +704,7 @@ int devamlc (int class, int func, int device) {
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Unix xon/xoff feature is good for serial I/O devices,
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where it stays enabled. */
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if (crs[A] & 01000) {
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if (getcrs16(A) & 01000) {
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terminfo.c_iflag |= IXON | IXOFF;
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terminfo.c_cc[VSTART] = 0x11;
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terminfo.c_cc[VSTOP] = 0x13;
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@ -727,11 +727,11 @@ int devamlc (int class, int func, int device) {
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/* set DTR high (02000) or low if it has changed */
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if ((crs[A] ^ dc[dx].lconf[lx]) & 02000) {
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if ((getcrs16(A) ^ dc[dx].lconf[lx]) & 02000) {
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int modemstate;
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//printf("devamlc: DTR state changed\n");
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ioctl(fd, TIOCMGET, &modemstate);
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if (crs[A] & 02000)
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if (getcrs16(A) & 02000)
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modemstate |= TIOCM_DTR;
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else {
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modemstate &= ~TIOCM_DTR;
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@ -748,21 +748,21 @@ int devamlc (int class, int func, int device) {
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/* finally, update line config */
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dc[dx].lconf[lx] = crs[A];
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dc[dx].lconf[lx] = getcrs16(A);
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IOSKIP;
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} else if (func == 02) { /* set line control */
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lx = (crs[A]>>12);
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//printf("OTA '02%02o: AMLC line %d control = %x\n", device, lx, crs[A]);
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if (crs[A] & 040) /* character time interrupt enable/disable */
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lx = (getcrs16(A)>>12);
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//printf("OTA '02%02o: AMLC line %d control = %x\n", device, lx, getcrs16(A));
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if (getcrs16(A) & 040) /* character time interrupt enable/disable */
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dc[dx].ctinterrupt |= BITMASK16(lx+1);
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else
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dc[dx].ctinterrupt &= ~BITMASK16(lx+1);
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if (crs[A] & 010) /* transmit enable/disable */
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if (getcrs16(A) & 010) /* transmit enable/disable */
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dc[dx].xmitenabled |= BITMASK16(lx+1);
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else
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dc[dx].xmitenabled &= ~BITMASK16(lx+1);
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if (crs[A] & 01) /* receive enable/disable */
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if (getcrs16(A) & 01) /* receive enable/disable */
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dc[dx].recvenabled |= BITMASK16(lx+1);
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else
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dc[dx].recvenabled &= ~BITMASK16(lx+1);
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@ -776,21 +776,21 @@ int devamlc (int class, int func, int device) {
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IOSKIP;
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} else if (func == 014) { /* set DMA/C channel (for input) */
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dc[dx].dmcchan = crs[A] & 0x7ff;
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if (!(crs[A] & 0x800))
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dc[dx].dmcchan = getcrs16(A) & 0x7ff;
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if (!(getcrs16(A) & 0x800))
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fatal("Can't run AMLC in DMA mode!");
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IOSKIP;
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} else if (func == 015) { /* set DMT/DMQ base address (for output) */
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dc[dx].baseaddr = crs[A];
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dc[dx].baseaddr = getcrs16(A);
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IOSKIP;
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} else if (func == 016) { /* set interrupt vector */
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dc[dx].intvector = crs[A];
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dc[dx].intvector = getcrs16(A);
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IOSKIP;
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} else if (func == 017) { /* set programmable clock constant */
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baudtable[4] = 115200/(crs[A]+1);
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baudtable[4] = 115200/(getcrs16(A)+1);
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printf("em: AMLC baud rates are");
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for (i=0; i<8; i++)
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printf(" %d", baudtable[i]);
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@ -798,7 +798,7 @@ int devamlc (int class, int func, int device) {
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IOSKIP;
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} else {
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printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
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printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
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fatal(NULL);
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}
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break;
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@ -961,7 +961,7 @@ int devamlc (int class, int func, int device) {
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n = 0;
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for (i=0; i < maxn; i++) {
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unsigned short utemp;
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utemp = MEM[qentea];
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utemp = get16mem(qentea);
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qentea = (qentea & ~qmask) | ((qentea+1) & qmask);
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//printf("Device %o, line %d, entry=%o (%c)\n", device, lx, utemp, utemp & 0x7f);
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buf[n++] = utemp & 0x7F;
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28
devpnc.h
28
devpnc.h
@ -603,9 +603,9 @@ pncconnect(time_t timenow) {
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/* initialize a dma transfer */
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pncinitdma(t_dma *iob, char *iotype) {
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if (crs[A] > 037)
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if (getcrs16(A) > 037)
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fatal("PNC doesn't support chaining, DMC, or DMA reg > 037");
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(*iob).dmachan = crs[A];
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(*iob).dmachan = getcrs16(A);
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(*iob).dmareg = (*iob).dmachan << 1;
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(*iob).dmanw = -((regs.sym.regdmx[(*iob).dmareg]>>4) | 0xF000);
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if ((*iob).dmanw > MAXPNCWORDS)
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@ -1066,17 +1066,17 @@ int devpnc (int class, int func, int device) {
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case 2:
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if (func == 011) { /* input ID */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - input ID\n", func, device);
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crs[A] = 07;
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putcrs16(A, 07);
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IOSKIP;
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} else if (func == 012) { /* read receive status word */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - get recv status '%o 0x%04x\n", func, device, rcvstat, rcvstat);
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crs[A] = rcvstat;
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putcrs16(A, rcvstat);
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IOSKIP;
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} else if (func == 013) { /* read xmit status word */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - get xmit status '%o 0x%04x\n", func, device, xmitstat, xmitstat);
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crs[A] = xmitstat;
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putcrs16(A, xmitstat);
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IOSKIP;
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/* these next two are mostly bogus: prmnt1 T&M wants them this
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@ -1089,23 +1089,23 @@ int devpnc (int class, int func, int device) {
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} else if (func == 014) { /* read recv DMX channel */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - get recv DMX chan '%o 0x%04x\n", func, device, rcv.dmachan, rcv.dmachan);
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crs[A] = (~rcv.dmachan & 0xF000) | rcv.dmachan & 0x0FFE;
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putcrs16(A, (~rcv.dmachan & 0xF000) | rcv.dmachan & 0x0FFE);
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IOSKIP;
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} else if (func == 015) { /* read xmit DMX channel */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - get xmit DMX chan '%o 0x%04x\n", func, device, xmit.dmachan, xmit.dmachan);
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crs[A] = (~xmit.dmachan & 0xF000) | xmit.dmachan & 0x0FFE;
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TRACE(T_INST|T_RIO, " returning '%o 0x%04x\n", crs[A], crs[A]);
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putcrs16(A, (~xmit.dmachan & 0xF000) | xmit.dmachan & 0x0FFE);
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TRACE(T_INST|T_RIO, " returning '%o 0x%04x\n", getcrs16(A), getcrs16(A));
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IOSKIP;
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} else if (func == 016) { /* read diagnostic register */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - read diag reg '%o 0x%04x\n", func, device, pncdiag, pncdiag);
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crs[A] = pncdiag;
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putcrs16(A, pncdiag);
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IOSKIP;
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} else if (func == 017) { /* read network status word */
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TRACE(T_INST|T_RIO, " INA '%02o%02o - get ctrl status '%o 0x%04x\n", func, device, pncstat, pncstat);
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crs[A] = pncstat;
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putcrs16(A, pncstat);
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IOSKIP;
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} else {
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@ -1117,7 +1117,7 @@ int devpnc (int class, int func, int device) {
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case 3:
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TRACE(T_INST|T_RIO, " OTA '%02o%02o\n", func, device);
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if (func == 011) { /* output diagnostic register */
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pncdiag = crs[A];
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pncdiag = getcrs16(A);
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IOSKIP;
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} else if (func == 014) { /* initiate recv, dma chan in A */
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@ -1197,18 +1197,18 @@ int devpnc (int class, int func, int device) {
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goto rcvexit; /* rcv & interrupt following xmit */
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} else if (func == 016) { /* set interrupt vector */
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pncvec = crs[A];
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pncvec = getcrs16(A);
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TRACE(T_INST|T_RIO, " interrupt vector = '%o\n", pncvec);
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IOSKIP;
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} else if (func == 017) { /* set my node ID */
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myid = crs[A] & 0xFF;
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myid = getcrs16(A) & 0xFF;
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pncstat = (pncstat & 0xFF00) | myid;
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TRACE(T_INST|T_RIO, " my node id is %d\n", myid);
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IOSKIP;
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} else {
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printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
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printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
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fatal(NULL);
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}
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break;
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26
ea32i.h
26
ea32i.h
@ -20,7 +20,7 @@ static inline ea_t ea32i (ea_t earp, unsigned short inst, unsigned long *immu32,
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case 0:
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switch (br) {
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case 0: /* reg-reg */
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*immu32 = crsl[sr];
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*immu32 = getgr32(sr);
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return IMM_EA;
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case 1:
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@ -40,10 +40,10 @@ static inline ea_t ea32i (ea_t earp, unsigned short inst, unsigned long *immu32,
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*immu64 = (((long long)(d & 0xFF00)) << 48) | (d & 0xFF);
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return IMM_EA;
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case 1: /* FAC0 source */
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*immu64 = *(unsigned long long *)(crsl+FAC0);
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*immu64 = getgr64(FAC0);
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return IMM_EA;
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case 3: /* FAC1 source */
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*immu64 = *(unsigned long long *)(crsl+FAC1);
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*immu64 = getgr64(FAC1);
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return IMM_EA;
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case 2:
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case 4:
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@ -60,8 +60,8 @@ static inline ea_t ea32i (ea_t earp, unsigned short inst, unsigned long *immu32,
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case 3: /* GR relative */
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d = iget16(RP);
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INCRP;
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ea = (crsl[sr] & 0xFFFF0000) | ((crsl[sr] + d) & 0xFFFF);
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TRACE(T_EAI, " GRR, d=%x, [sr]=%o/%o, ea=%o/%o\n", d, crsl[sr]>>16, crsl[sr]&0xFFFF, ea>>16, ea&0xFFFF);
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ea = (getgr32(sr) & 0xFFFF0000) | ((getgr32(sr) + d) & 0xFFFF);
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TRACE(T_EAI, " GRR, d=%x, [sr]=%o/%o, ea=%o/%o\n", d, getgr32(sr)>>16, getgr32(sr)&0xFFFF, ea>>16, ea&0xFFFF);
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if (ea & 0x80000000)
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fault(POINTERFAULT, ea>>16, ea);
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return ea | ring;
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@ -75,18 +75,18 @@ static inline ea_t ea32i (ea_t earp, unsigned short inst, unsigned long *immu32,
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d = iget16(RP);
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INCRP;
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if (sr == 0)
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ea = (crsl[BR+br] & 0xFFFF0000) | ((crsl[BR+br] + d) & 0xFFFF);
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ea = (getgr32(BR+br) & 0xFFFF0000) | ((getgr32(BR+br) + d) & 0xFFFF);
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else
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ea = (crsl[BR+br] & 0xFFFF0000) | ((crsl[BR+br] + d + crs[sr*2]) & 0xFFFF);
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ea = (getgr32(BR+br) & 0xFFFF0000) | ((getgr32(BR+br) + d + getgr16(sr)) & 0xFFFF);
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return ea | ring;
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case 2: /* TM=2: Indirect and Indirect Preindexed */
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d = iget16(RP);
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INCRP;
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if (sr == 0)
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ea = (crsl[BR+br] & 0xFFFF0000) | ((crsl[BR+br] + d) & 0xFFFF);
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ea = (getgr32(BR+br) & 0xFFFF0000) | ((getgr32(BR+br) + d) & 0xFFFF);
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else
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ea = (crsl[BR+br] & 0xFFFF0000) | ((crsl[BR+br] + d + crs[sr*2]) & 0xFFFF);
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ea = (getgr32(BR+br) & 0xFFFF0000) | ((getgr32(BR+br) + d + getgr16(sr)) & 0xFFFF);
|
||||
ip = get32(ea | ring);
|
||||
if (ip & 0x80000000)
|
||||
fault(POINTERFAULT, ip>>16, ea);
|
||||
@ -96,15 +96,15 @@ static inline ea_t ea32i (ea_t earp, unsigned short inst, unsigned long *immu32,
|
||||
TRACE(T_EAI, " TM=3: Indirect [Postindexed]");
|
||||
d = iget16(RP);
|
||||
INCRP;
|
||||
ea = (crsl[BR+br] & 0xFFFF0000) | ((crsl[BR+br] + d) & 0xFFFF);
|
||||
TRACE(T_EAI, " BR[%d]=%o/%o, d=%o, ip ea=%o/%o\n", br, crsl[BR+br]>>16, crsl[BR+br]&0xFFFF, d, ea>>16, ea&0xFFFF);
|
||||
ea = (getgr32(BR+br) & 0xFFFF0000) | ((getgr32(BR+br) + d) & 0xFFFF);
|
||||
TRACE(T_EAI, " BR[%d]=%o/%o, d=%o, ip ea=%o/%o\n", br, getgr32(BR+br)>>16, getgr32(BR+br)&0xFFFF, d, ea>>16, ea&0xFFFF);
|
||||
ip = get32(ea | ring);
|
||||
TRACE(T_EAI, " after indirect, ea=%o/%o\n", ip>>16, ip&0xFFFF);
|
||||
if (ip & 0x80000000)
|
||||
fault(POINTERFAULT, ip>>16, ea);
|
||||
if (sr > 0) {
|
||||
ip = (ip & 0xFFFF0000) | ((ip + crs[sr*2]) & 0xFFFF);
|
||||
TRACE(T_EAI, " index by gr%d='%o/%d, ea=%o/%o\n", sr, crs[sr*2], crs[sr*2], ea>>16, ea&0xFFFF);
|
||||
ip = (ip & 0xFFFF0000) | ((ip + getgr16(sr)) & 0xFFFF);
|
||||
TRACE(T_EAI, " index by gr%d='%o/%d, ea=%o/%o\n", sr, getgr16(sr), getgr16(sr), ea>>16, ea&0xFFFF);
|
||||
}
|
||||
return ip | ring;
|
||||
|
||||
|
||||
40
ea64v.h
40
ea64v.h
@ -52,14 +52,14 @@ static inline ea_t ea64v (unsigned short inst, ea_t earp) {
|
||||
TRACE(T_EAV, " new opcode=%#05o, y=%d, br=%d, ixy=%d, xok=%d\n", opcode, (y != 0), br, ixy, xok);
|
||||
#endif
|
||||
|
||||
ea_s = crs[PBH+br*2] | (ea_s & RINGMASK16);
|
||||
ea_w = crs[PBL+br*2] + a;
|
||||
ea_s = getcrs16(PBH+br*2) | (ea_s & RINGMASK16);
|
||||
ea_w = getcrs16(PBL+br*2) + a;
|
||||
|
||||
if (xok)
|
||||
if (ixy == 2 || ixy == 6)
|
||||
ea_w += crs[X];
|
||||
ea_w += getcrs16(X);
|
||||
else if (ixy == 1 || ixy == 4)
|
||||
ea_w += crs[Y];
|
||||
ea_w += getcrs16(Y);
|
||||
|
||||
#if 0
|
||||
/* if this is a PB% address, use RPBR instead if it's in range
|
||||
@ -90,11 +90,11 @@ static inline ea_t ea64v (unsigned short inst, ea_t earp) {
|
||||
|
||||
if (xok)
|
||||
if (ixy == 7) {
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, X='%o/%d\n", ea_w, crs[X], *(short *)(crs+X));
|
||||
ea_w += crs[X];
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, X='%o/%d\n", ea_w, getcrs16(X), getcrs16s(X));
|
||||
ea_w += getcrs16(X);
|
||||
} else if (ixy == 5) {
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, Y='%o/%d\n", ea_w, crs[Y], *(short *)(crs+Y));
|
||||
ea_w += crs[Y];
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, Y='%o/%d\n", ea_w, getcrs16(Y), getcrs16s(Y));
|
||||
ea_w += getcrs16(Y);
|
||||
}
|
||||
}
|
||||
return MAKEVA(ea_s, ea_w);
|
||||
@ -105,22 +105,22 @@ static inline ea_t ea64v (unsigned short inst, ea_t earp) {
|
||||
if ((inst & 0101000) == 0) {
|
||||
ea_w = (inst & 0777);
|
||||
if (x) {
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, X='%o/%d\n", ea_w, crs[X], *(short *)(crs+X));
|
||||
ea_w += crs[X];
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, X='%o/%d\n", ea_w, getcrs16(X), getcrs16s(X));
|
||||
ea_w += getcrs16(X);
|
||||
TRACE(T_EAV, " Postindex, new ea_w=%o\n", ea_w);
|
||||
}
|
||||
if (inst & 0400) {
|
||||
TRACE(T_EAV, " Short LB relative, LB=%o/%o\n", crs[LBH], crs[LBL]);
|
||||
TRACE(T_EAV, " Short LB relative, LB=%o/%o\n", getcrs16(LBH), getcrs16(LBL));
|
||||
eap = &gvp->brp[LBBR];
|
||||
ea_s = crs[LBH] | (ea_s & RINGMASK16);
|
||||
ea_w += crs[LBL];
|
||||
ea_s = getcrs16(LBH) | (ea_s & RINGMASK16);
|
||||
ea_w += getcrs16(LBL);
|
||||
return MAKEVA(ea_s, ea_w);
|
||||
}
|
||||
if (ea_w >= gvp->livereglim) {
|
||||
eap = &gvp->brp[SBBR];
|
||||
ea_s = crs[SBH] | (ea_s & RINGMASK16);
|
||||
ea_w += crs[SBL];
|
||||
TRACE(T_EAV, " Short SB relative, SB=%o/%o\n", crs[SBH], crs[SBL]);
|
||||
ea_s = getcrs16(SBH) | (ea_s & RINGMASK16);
|
||||
ea_w += getcrs16(SBL);
|
||||
TRACE(T_EAV, " Short SB relative, SB=%o/%o\n", getcrs16(SBH), getcrs16(SBL));
|
||||
return MAKEVA(ea_s, ea_w);
|
||||
}
|
||||
TRACE(T_EAV, " Live register '%o\n", ea_w);
|
||||
@ -148,8 +148,8 @@ static inline ea_t ea64v (unsigned short inst, ea_t earp) {
|
||||
ea_w = (inst & 0777); /* sector 0 */
|
||||
TRACE(T_EAV, " Sector 0, new ea_w=%o\n", ea_w);
|
||||
if (ea_w < 0100 && x) { /* preindex by X */
|
||||
TRACE(T_EAV, " Preindex, ea_w=%o, X='%o/%d\n", ea_w, crs[X], *(short *)(crs+X));
|
||||
ea_w += crs[X];
|
||||
TRACE(T_EAV, " Preindex, ea_w=%o, X='%o/%d\n", ea_w, getcrs16(X), getcrs16s(X));
|
||||
ea_w += getcrs16(X);
|
||||
TRACE(T_EAV, " Preindex, new ea_w=%o\n", ea_w);
|
||||
x = 0;
|
||||
}
|
||||
@ -167,8 +167,8 @@ static inline ea_t ea64v (unsigned short inst, ea_t earp) {
|
||||
}
|
||||
|
||||
if (x) {
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, X='%o/%d\n", ea_w, crs[X], *(short *)(crs+X));
|
||||
ea_w += crs[X];
|
||||
TRACE(T_EAV, " Postindex, old ea_w=%o, X='%o/%d\n", ea_w, getcrs16(X), getcrs16s(X));
|
||||
ea_w += getcrs16(X);
|
||||
TRACE(T_EAV, " Postindex, new ea_w=%o\n", ea_w);
|
||||
}
|
||||
|
||||
|
||||
146
emdev.h
146
emdev.h
@ -105,8 +105,8 @@
|
||||
the EQ condition code bit. In SR modes, it does a skip */
|
||||
|
||||
#define IOSKIP \
|
||||
if (crs[KEYS] & 010000) \
|
||||
crs[KEYS] |= 0100; \
|
||||
if (getcrs16(KEYS) & 010000) \
|
||||
putcrs16(KEYS, getcrs16(KEYS) | 0100); \
|
||||
else \
|
||||
RPL++
|
||||
|
||||
@ -119,7 +119,7 @@
|
||||
|
||||
#if 1
|
||||
#define BLOCKIO \
|
||||
(!(crs[MODALS] & 010) && (iget16(RP) == 03776 || (iget16(RP) == 0141603 && iget16(RP+1) == RPL-2)))
|
||||
(!(getcrs16(MODALS) & 010) && (iget16(RP) == 03776 || (iget16(RP) == 0141603 && iget16(RP+1) == RPL-2)))
|
||||
#else
|
||||
#define BLOCKIO 0
|
||||
#endif
|
||||
@ -170,7 +170,7 @@ int devnew (int class, int func, int device) {
|
||||
if (func == 99) {
|
||||
IOSKIP;
|
||||
} else {
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
|
||||
fatal(NULL);
|
||||
}
|
||||
break;
|
||||
@ -392,7 +392,7 @@ int devasr (int class, int func, int device) {
|
||||
if (xoff) /* no output if xoff */
|
||||
return;
|
||||
if (roomleft <= 0) { /* shouldn't be negative, but safer */
|
||||
if (crs[MODALS] & 010) /* PX enabled? */
|
||||
if (getcrs16(MODALS) & 010)/* PX enabled? */
|
||||
timeout.tv_sec = 0; /* yes, can't delay */
|
||||
else
|
||||
timeout.tv_sec = 1; /* single user: okay to delay */
|
||||
@ -410,7 +410,7 @@ int devasr (int class, int func, int device) {
|
||||
}
|
||||
|
||||
} else if (func == 7) { /* skip if received a char */
|
||||
if (crs[MODALS] & 010) /* PX enabled? */
|
||||
if (getcrs16(MODALS) & 010) /* PX enabled? */
|
||||
timeout.tv_sec = 0; /* yes, can't delay */
|
||||
else {
|
||||
timeout.tv_sec = 1; /* single user: okay to delay */
|
||||
@ -475,7 +475,7 @@ readasr:
|
||||
fatal(NULL);
|
||||
}
|
||||
} else if (n == 1) {
|
||||
if (!(crs[MODALS] & 010) && (ch == '')) {
|
||||
if (!(getcrs16(MODALS) & 010) && (ch == '')) {
|
||||
printf("\nRebooting at instruction #%lu\n", gvp->instcount);
|
||||
// gvp->savetraceflags = ~T_MAP; /****/
|
||||
longjmp(bootjmp, 1);
|
||||
@ -509,9 +509,9 @@ readasr:
|
||||
}
|
||||
xoff = 0; /* enable output if any characters typed */
|
||||
if (func >= 010)
|
||||
crs[A] = 0;
|
||||
crs[A] = crs[A] | ch;
|
||||
TRACE(T_INST, " character read=%o: %c\n", crs[A], crs[A] & 0x7f);
|
||||
putcrs16(A, 0);
|
||||
putcrs16(A, getcrs16(A) | ch);
|
||||
TRACE(T_INST, " character read=%o: %c\n", getcrs16(A), getcrs16(A) & 0x7f);
|
||||
if (!(terminfo.c_lflag & ECHO) && ch != 015) /* log all except CR */
|
||||
fputc(ch, conslog);
|
||||
fflush(conslog); /* immediately flush when typing */
|
||||
@ -524,16 +524,16 @@ readasr:
|
||||
fatal(NULL);
|
||||
}
|
||||
} else if (04 <= func && func <= 07) { /* read control register 1/2 */
|
||||
crs[A] = 0;
|
||||
putcrs16(A, 0);
|
||||
IOSKIP;
|
||||
} else if (func == 011) { /* read device id? */
|
||||
crs[A] = 4;
|
||||
putcrs16(A, 4);
|
||||
IOSKIP;
|
||||
} else if (func == 012) { /* read control word */
|
||||
crs[A] = 04110;
|
||||
putcrs16(A, 04110);
|
||||
IOSKIP;
|
||||
} else if (func == 017) { /* read xmit interrupt vector -OR- clock */
|
||||
crs[A] = vcptime[vcptimeix++];
|
||||
putcrs16(A, vcptime[vcptimeix++]);
|
||||
if (vcptimeix > 7)
|
||||
vcptimeix = 0;
|
||||
IOSKIP;
|
||||
@ -546,8 +546,8 @@ readasr:
|
||||
case 3:
|
||||
TRACE(T_INST, " OTA '%02o%02o\n", func, device);
|
||||
if (func == 0) {
|
||||
ch = crs[A] & 0x7f;
|
||||
TRACE(T_INST, " char to write=%o: %c\n", crs[A], ch);
|
||||
ch = getcrs16(A) & 0x7f;
|
||||
TRACE(T_INST, " char to write=%o: %c\n", getcrs16(A), ch);
|
||||
if (ch == 0 || ch == 0x7f) { /* ignore null and del (rubout) */
|
||||
IOSKIP;
|
||||
return;
|
||||
@ -580,23 +580,23 @@ readasr:
|
||||
devpoll[device] = gvp->instpermsec*100;
|
||||
IOSKIP;
|
||||
} else if (func == 1) { /* write control word */
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, crs[A], *(short *)(crs+A));
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, getcrs16(A), getcrs16s(A));
|
||||
IOSKIP;
|
||||
} else if (04 <= func && func <= 07) { /* write control register 1/2 */
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, crs[A], *(short *)(crs+A));
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, getcrs16(A), getcrs16s(A));
|
||||
IOSKIP;
|
||||
} else if (func == 012) {
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, crs[A], *(short *)(crs+A));
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, getcrs16(A), getcrs16s(A));
|
||||
/* NOTE: does this in rev 23 when system is shutdown with '4110 in A */
|
||||
IOSKIP;
|
||||
|
||||
} else if (func == 013) {
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, crs[A], *(short *)(crs+A));
|
||||
TRACEA("OTA 4, func %d, A='%o/%d\n", func, getcrs16(A), getcrs16s(A));
|
||||
/* NOTE: does this in rev 20 on settime command (set clock on VCP?) */
|
||||
IOSKIP;
|
||||
|
||||
} else if (func == 017) {
|
||||
if (crs[A] == 0) {
|
||||
if (getcrs16(A) == 0) {
|
||||
|
||||
/* setup to read VCP battery backup clock, only available on
|
||||
Prime models with cpuid >= 5. All words are 2 BCD digits */
|
||||
@ -615,11 +615,11 @@ readasr:
|
||||
vcptime[7] = 0;
|
||||
vcptimeix = 0;
|
||||
} else {
|
||||
TRACEA("OTA 4, func '%o, A='%o/%d\n", func, crs[A], *(short *)(crs+A));
|
||||
TRACEA("OTA 4, func '%o, A='%o/%d\n", func, getcrs16(A), getcrs16s(A));
|
||||
}
|
||||
IOSKIP;
|
||||
} else {
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
|
||||
fatal(NULL);
|
||||
}
|
||||
break;
|
||||
@ -1008,16 +1008,16 @@ int devmt (int class, int func, int device) {
|
||||
if (func == 0) {
|
||||
if (!ready) {
|
||||
TRACE(T_INST|T_TIO, "INA 0 on tape device w/o matching OTA!\n");
|
||||
crs[A] = 0;
|
||||
putcrs16(A, 0);
|
||||
} else {
|
||||
TRACE(T_INST|T_TIO, " INA 0 returns '%06o 0x%04x\n", datareg, datareg);
|
||||
crs[A] = datareg;
|
||||
putcrs16(A, datareg);
|
||||
}
|
||||
ready = 0;
|
||||
IOSKIP;
|
||||
|
||||
} else if (func == 011) {
|
||||
crs[A] = (1 << 8) | 0214; /* backplane slot + device ID */
|
||||
putcrs16(A, (1 << 8) | 0214); /* backplane slot + device ID */
|
||||
IOSKIP;
|
||||
|
||||
} else {
|
||||
@ -1027,20 +1027,20 @@ int devmt (int class, int func, int device) {
|
||||
break;
|
||||
|
||||
case 3:
|
||||
TRACE(T_INST|T_TIO, " OTA '%02o%02o, A='%06o %04x\n", func, device, crs[A], crs[A]);
|
||||
TRACE(T_INST|T_TIO, " OTA '%02o%02o, A='%06o %04x\n", func, device, getcrs16(A), getcrs16(A));
|
||||
|
||||
if (func != 0)
|
||||
busy = 0;
|
||||
|
||||
if (func == 00) {
|
||||
datareg = crs[A];
|
||||
datareg = getcrs16(A);
|
||||
IOSKIP;
|
||||
|
||||
} else if (func == 01) {
|
||||
|
||||
/* here's the hard part where everything happens... decode unit first */
|
||||
|
||||
u = crs[A] & 0xF;
|
||||
u = getcrs16(A) & 0xF;
|
||||
if (u == 1) u = 3;
|
||||
else if (u == 2) u = 2;
|
||||
else if (u == 4) u = 1;
|
||||
@ -1079,7 +1079,7 @@ int devmt (int class, int func, int device) {
|
||||
/* "select only" is ignored. On a real tape controller, this
|
||||
blocks (I think) if the previous tape operation is in progress */
|
||||
|
||||
if ((crs[A] & 0xFFF00) == 0x8000) {
|
||||
if ((getcrs16(A) & 0xFFF00) == 0x8000) {
|
||||
TRACE(T_TIO, " select only\n");
|
||||
IOSKIP;
|
||||
break;
|
||||
@ -1095,7 +1095,7 @@ int devmt (int class, int func, int device) {
|
||||
interrupting = 1;
|
||||
devpoll[device] = 10;
|
||||
|
||||
if ((crs[A] & 0x00E0) == 0x0020) { /* rewind */
|
||||
if ((getcrs16(A) & 0x00E0) == 0x0020) { /* rewind */
|
||||
//gvp->traceflags = ~T_MAP;
|
||||
TRACE(T_TIO, " rewind\n");
|
||||
if (lseek(unit[u].fd, 0, SEEK_SET) == -1) {
|
||||
@ -1119,7 +1119,7 @@ int devmt (int class, int func, int device) {
|
||||
create garbage tape images for testing by doing a Magsav,
|
||||
rewind, starting another Magsav, and aborting it. */
|
||||
|
||||
if ((crs[A] & 0x4010) == 0x0010) {
|
||||
if ((getcrs16(A) & 0x4010) == 0x0010) {
|
||||
TRACE(T_TIO, " write file mark\n");
|
||||
*(int *)iobuf = 0;
|
||||
mtwrite(unit[u].fd, iobuf, 2, &unit[u].mtstat);
|
||||
@ -1130,16 +1130,16 @@ int devmt (int class, int func, int device) {
|
||||
|
||||
/* space forward or backward a record or file at a time */
|
||||
|
||||
if (crs[A] & 0x2000) { /* space operation */
|
||||
if ((crs[A] & 0xC0) == 0)
|
||||
if (getcrs16(A) & 0x2000) { /* space operation */
|
||||
if ((getcrs16(A) & 0xC0) == 0)
|
||||
warn("Motion = 0 for tape spacing operation");
|
||||
else if (crs[A] & 0x4000) { /* record operation */
|
||||
TRACE(T_TIO, " space record, dir=%x\n", crs[A] & 0x80);
|
||||
mtread(unit[u].fd, iobuf, 0, crs[A], &unit[u].mtstat);
|
||||
else if (getcrs16(A) & 0x4000) { /* record operation */
|
||||
TRACE(T_TIO, " space record, dir=%x\n", getcrs16(A) & 0x80);
|
||||
mtread(unit[u].fd, iobuf, 0, getcrs16(A), &unit[u].mtstat);
|
||||
} else { /* file spacing operation */
|
||||
TRACE(T_TIO, " space file, dir=%x\n", crs[A] & 0x80);
|
||||
TRACE(T_TIO, " space file, dir=%x\n", getcrs16(A) & 0x80);
|
||||
do {
|
||||
mtread(unit[u].fd, iobuf, 0, crs[A], &unit[u].mtstat);
|
||||
mtread(unit[u].fd, iobuf, 0, getcrs16(A), &unit[u].mtstat);
|
||||
} while (!(unit[u].mtstat & 0x128)); /* FM, EOT, BOT */
|
||||
}
|
||||
IOSKIP;
|
||||
@ -1148,7 +1148,7 @@ int devmt (int class, int func, int device) {
|
||||
|
||||
/* read/write backward aren't supported */
|
||||
|
||||
if (((crs[A] & 0x00E0) == 0x0040) && ((crs[A] & 0x2000) == 0)) {
|
||||
if (((getcrs16(A) & 0x00E0) == 0x0040) && ((getcrs16(A) & 0x2000) == 0)) {
|
||||
warn("devtape: read/write reverse not supported");
|
||||
unit[u].mtstat = 0;
|
||||
IOSKIP;
|
||||
@ -1163,13 +1163,13 @@ int devmt (int class, int func, int device) {
|
||||
for write commands, the 4-byte .TAP record length IS stored in
|
||||
iobuf and the length returned by mtwrite reflects that */
|
||||
|
||||
if (crs[A] & 0x10) { /* write record */
|
||||
if (getcrs16(A) & 0x10) { /* write record */
|
||||
TRACE(T_TIO, " write record\n");
|
||||
dmxtotnw = 0;
|
||||
iobufp = iobuf+2;
|
||||
} else {
|
||||
TRACE(T_TIO, " read record\n");
|
||||
dmxtotnw = mtread(unit[u].fd, iobuf, MAXTAPEWORDS, crs[A], &unit[u].mtstat);
|
||||
dmxtotnw = mtread(unit[u].fd, iobuf, MAXTAPEWORDS, getcrs16(A), &unit[u].mtstat);
|
||||
iobufp = iobuf;
|
||||
}
|
||||
|
||||
@ -1193,7 +1193,7 @@ int devmt (int class, int func, int device) {
|
||||
printf("devmt: requested negative DMX of size %d\n", dmxnw);
|
||||
fatal(NULL);
|
||||
}
|
||||
if (crs[A] & 0x10) { /* write record */
|
||||
if (getcrs16(A) & 0x10) { /* write record */
|
||||
if (dmxtotnw+dmxnw > MAXTAPEWORDS)
|
||||
fatal("Tape write is too big");
|
||||
for (i=0; i < dmxnw; i++) {
|
||||
@ -1240,7 +1240,7 @@ int devmt (int class, int func, int device) {
|
||||
|
||||
/* for write record, do the write */
|
||||
|
||||
if (crs[A] & 0x10) { /* write record */
|
||||
if (getcrs16(A) & 0x10) { /* write record */
|
||||
n = dmxtotnw*2;
|
||||
reclen[0] = n & 0xFF;
|
||||
reclen[1] = n>>8 & 0xFF;
|
||||
@ -1260,7 +1260,7 @@ int devmt (int class, int func, int device) {
|
||||
|
||||
} else if (func == 02) {
|
||||
ready = 1;
|
||||
if (crs[A] & 0x8000) { /* status word 1 */
|
||||
if (getcrs16(A) & 0x8000) { /* status word 1 */
|
||||
datareg = unit[usel].mtstat;
|
||||
|
||||
/* if the tape was rewinding, return rewinding status once, then
|
||||
@ -1268,16 +1268,16 @@ int devmt (int class, int func, int device) {
|
||||
|
||||
if (datareg & 0x10)
|
||||
unit[usel].mtstat = unit[usel].mtstat & ~0x10 | 0x8;
|
||||
} else if (crs[A] & 0x4000)
|
||||
} else if (getcrs16(A) & 0x4000)
|
||||
datareg = 0214; /* device ID */
|
||||
else if (crs[A] & 0x2000)
|
||||
else if (getcrs16(A) & 0x2000)
|
||||
datareg = dmxchan;
|
||||
else if (crs[A] & 0x1000)
|
||||
else if (getcrs16(A) & 0x1000)
|
||||
datareg = mtvec;
|
||||
else if (crs[A] & 0x800)
|
||||
else if (getcrs16(A) & 0x800)
|
||||
datareg = 0; /* status word 2 */
|
||||
else {
|
||||
TRACE(T_TIO, " Bad OTA '02 to tape drive, A='%06o, 0x$04x\n", crs[A], crs[A]);
|
||||
TRACE(T_TIO, " Bad OTA '02 to tape drive, A='%06o, 0x$04x\n", getcrs16(A), getcrs16(A));
|
||||
datareg = 0;
|
||||
interrupting = 1;
|
||||
devpoll[device] = 10;
|
||||
@ -1296,7 +1296,7 @@ int devmt (int class, int func, int device) {
|
||||
IOSKIP;
|
||||
|
||||
} else if (func == 014) { /* set DMX channel */
|
||||
dmxchan = crs[A];
|
||||
dmxchan = getcrs16(A);
|
||||
TRACE(T_TIO, " dmx channel '%o, 0x%04x\n", dmxchan, dmxchan);
|
||||
IOSKIP;
|
||||
|
||||
@ -1305,12 +1305,12 @@ int devmt (int class, int func, int device) {
|
||||
IOSKIP;
|
||||
|
||||
} else if (func == 016) { /* set interrupt vector */
|
||||
mtvec = crs[A];
|
||||
mtvec = getcrs16(A);
|
||||
TRACE(T_TIO, " set int vec '%o\n", mtvec);
|
||||
IOSKIP;
|
||||
|
||||
} else {
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
|
||||
}
|
||||
break;
|
||||
|
||||
@ -1318,7 +1318,7 @@ int devmt (int class, int func, int device) {
|
||||
TRACE(T_TIO, " POLL device '%02o, enabled=%d, interrupting=%d\n", device, enabled, interrupting);
|
||||
if (enabled && (interrupting == 1)) {
|
||||
devpoll[device] = 100; /* assume interrupt will be deferred */
|
||||
if (gvp->intvec == -1 && (crs[MODALS] & 0100000)) {
|
||||
if (gvp->intvec == -1 && (getcrs16(MODALS) & 0100000)) {
|
||||
TRACE(T_TIO, " CPU interrupt to vector '%o\n", mtvec);
|
||||
gvp->intvec = mtvec;
|
||||
devpoll[device] = 0;
|
||||
@ -1472,13 +1472,13 @@ int devcp (int class, int func, int device) {
|
||||
case 2:
|
||||
TRACE(T_INST, " INA '%02o%02o\n", func, device);
|
||||
if (func == 011) { /* input ID */
|
||||
crs[A] = 020; /* this is the Option-A board */
|
||||
crs[A] = 0120; /* this is the SOC board */
|
||||
putcrs16(A, 020); /* this is the Option-A board */
|
||||
putcrs16(A, 0120); /* this is the SOC board */
|
||||
//gvp->traceflags = ~T_MAP;
|
||||
} else if (func == 016) { /* read switches that are up */
|
||||
crs[A] = sswitch;
|
||||
putcrs16(A, sswitch);
|
||||
} else if (func == 017) { /* read switches pushed down */
|
||||
crs[A] = dswitch;
|
||||
putcrs16(A, dswitch);
|
||||
} else {
|
||||
printf("Unimplemented INA device '%02o function '%02o\n", device, func);
|
||||
fatal(NULL);
|
||||
@ -1505,31 +1505,31 @@ int devcp (int class, int func, int device) {
|
||||
*/
|
||||
|
||||
if (func == 02) { /* set PIC interval */
|
||||
clkpic = *(short *)(crs+A);
|
||||
clkpic = getcrs16s(A);
|
||||
if (clkpic == -947)
|
||||
if (cpuid == 11 || cpuid == 20)
|
||||
clkpic = -625; /* P2250: 500 ticks/second */
|
||||
else if (cpuid >= 15) /* newer machines: 250 ticks/second */
|
||||
clkpic = -1250;
|
||||
TRACE(T_INST, "Clock PIC %d requested, set to %d\n", *(short *)(crs+A), clkpic);
|
||||
TRACE(T_INST, "Clock PIC %d requested, set to %d\n", getcrs16s(A), clkpic);
|
||||
SETCLKPOLL;
|
||||
|
||||
} else if (func == 07) {
|
||||
TRACE(T_INST, "Clock control register set to '%o\n", crs[A]);
|
||||
if (crs[A] & 020)
|
||||
TRACE(T_INST, "Clock control register set to '%o\n", getcrs16(A));
|
||||
if (getcrs16(A) & 020)
|
||||
clkrate = 102.4;
|
||||
else
|
||||
clkrate = 3.2;
|
||||
SETCLKPOLL;
|
||||
|
||||
} else if (func == 013) { /* set interrupt vector */
|
||||
clkvec = crs[A];
|
||||
clkvec = getcrs16(A);
|
||||
TRACE(T_INST, "Clock interrupt vector address = '%o\n", clkvec);
|
||||
|
||||
} else if (func == 017) { /* write lights */
|
||||
|
||||
} else {
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
|
||||
fatal(NULL);
|
||||
}
|
||||
break;
|
||||
@ -1844,11 +1844,11 @@ int devdisk (int class, int func, int device) {
|
||||
return;
|
||||
|
||||
if (func == 01) /* read device id, clear A first */
|
||||
crs[A] = CID4005 + device;
|
||||
putcrs16(A, CID4005 + device);
|
||||
else if (func == 011) /* read device id, don't clear A */
|
||||
crs[A] |= (CID4005 + device);
|
||||
putcrs16(A, getcrs16(A) | (CID4005 + device));
|
||||
else if (func == 017) { /* read OAR */
|
||||
crs[A] = dc[dx].oar;
|
||||
putcrs16(A, dc[dx].oar);
|
||||
} else {
|
||||
printf("Unimplemented INA device '%02o function '%02o\n", device, func);
|
||||
fatal(NULL);
|
||||
@ -1860,10 +1860,10 @@ int devdisk (int class, int func, int device) {
|
||||
TRACE(T_INST|T_DIO, " OTA '%02o%02o\n", func, device);
|
||||
if (func == 017) { /* set OAR (order address register) */
|
||||
dc[dx].state = S_RUN;
|
||||
dc[dx].oar = crs[A];
|
||||
dc[dx].oar = getcrs16(A);
|
||||
devpoll[device] = 1;
|
||||
} else {
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, crs[A]);
|
||||
printf("Unimplemented OTA device '%02o function '%02o, A='%o\n", device, func, getcrs16(A));
|
||||
fatal(NULL);
|
||||
}
|
||||
IOSKIP;
|
||||
@ -2010,7 +2010,7 @@ int devdisk (int class, int func, int device) {
|
||||
TRACE(T_INST|T_DIO, " DMA channels: nch-1=%d, ['%o]='%o, ['%o]='%o, nwords=%d\n", dc[dx].dmanch, dc[dx].dmachan, regs.sym.regdmx[dmareg], dc[dx].dmachan+1, dmaaddr, dmanw);
|
||||
|
||||
if (order == 5) {
|
||||
if (crs[MODALS] & 020)
|
||||
if (getcrs16(MODALS) & 020)
|
||||
if ((dmaaddr & 01777) || dmanw > 1024)
|
||||
iobufp = iobuf;
|
||||
else
|
||||
@ -2032,7 +2032,7 @@ int devdisk (int class, int func, int device) {
|
||||
for (i=0; i<dmanw; i++)
|
||||
put16io(iobuf[i], dmaaddr+i);
|
||||
} else {
|
||||
if (crs[MODALS] & 020) {
|
||||
if (getcrs16(MODALS) & 020) {
|
||||
iobufp = iobuf;
|
||||
for (i=0; i<dmanw; i++)
|
||||
iobuf[i] = get16io(dmaaddr+i);
|
||||
@ -2165,7 +2165,7 @@ int devdisk (int class, int func, int device) {
|
||||
omitted. Hence the PX test. Ignoring stall gives a 25%
|
||||
increase in I/O's per second on a 2GHz Mac (8MB emulator). */
|
||||
|
||||
if (crs[MODALS] & 010) /* PX enabled? */
|
||||
if (getcrs16(MODALS) & 010) /* PX enabled? */
|
||||
break; /* yes, no stall */
|
||||
devpoll[device] = gvp->instpermsec/5; /* 200 microseconds, sb 210 */
|
||||
return;
|
||||
@ -2188,7 +2188,7 @@ int devdisk (int class, int func, int device) {
|
||||
|
||||
case 14: /* DINT = generate interrupt through vector address */
|
||||
TRACE(T_INST|T_DIO, " interrupt through '%o\n", m1);
|
||||
if (gvp->intvec >= 0 || !(crs[MODALS] & 0100000))
|
||||
if (gvp->intvec >= 0 || !(getcrs16(MODALS) & 0100000))
|
||||
dc[dx].oar -= 2; /* can't take interrupt right now */
|
||||
else {
|
||||
gvp->intvec = m1;
|
||||
|
||||
92
regs.h
92
regs.h
@ -88,6 +88,7 @@
|
||||
#define FAC1 10
|
||||
#define BR 12
|
||||
#define OWNER32 (OWNERH/2)
|
||||
#define TIMER32 (TIMERH/2)
|
||||
|
||||
/* this is the number of user register sets for this cpuid */
|
||||
|
||||
@ -183,10 +184,6 @@ static union {
|
||||
|
||||
/* store RP and crsl in dedicated registers 29-30 (Power PC) */
|
||||
|
||||
#define RP rpreg.ul
|
||||
#define RPH rpreg.s.rph
|
||||
#define RPL rpreg.s.rpl
|
||||
|
||||
static unsigned int grp; /* global RP for restore after longjmp */
|
||||
register union {
|
||||
struct {
|
||||
@ -196,6 +193,10 @@ register union {
|
||||
unsigned int ul;
|
||||
} rpreg asm ("r29");
|
||||
|
||||
#define RP rpreg.ul
|
||||
#define RPH rpreg.s.rph
|
||||
#define RPL rpreg.s.rpl
|
||||
|
||||
static unsigned int *gcrsl; /* global crs pointer for restore after longjmp */
|
||||
register union {
|
||||
short *i16;
|
||||
@ -229,6 +230,89 @@ static union {
|
||||
#define crs cr.u16
|
||||
#define crsl cr.u32
|
||||
|
||||
/************ 16-bit offset macros: *************/
|
||||
|
||||
/* fetch 16-bit unsigned at 16-bit offset */
|
||||
#define getcrs16(offset) crs[(offset)]
|
||||
|
||||
/* store 16-bit unsigned at 16-bit offset */
|
||||
#define putcrs16(offset, val) crs[(offset)] = (val)
|
||||
|
||||
/* get 16-bit signed at 16-bit offset */
|
||||
#define getcrs16s(offset) *(short *)(crs+(offset))
|
||||
|
||||
/* get 32-bit unsigned at 16-bit offset */
|
||||
#define getcrs32(offset) *(unsigned int *)(crs+offset)
|
||||
|
||||
/* get 32-bit signed at 16-bit offset */
|
||||
#define getcrs32s(offset) *(int *)(crs+(offset))
|
||||
|
||||
/* put 32-bit unsigned at 16-bit offset */
|
||||
#define putcrs32(offset, val) *(unsigned int *)(crs+(offset)) = (val)
|
||||
|
||||
/* put 32-bit signed at 16-bit offset */
|
||||
#define putcrs32s(offset, val) *(int *)(crs+(offset)) = (val)
|
||||
|
||||
/* get 32-bit effective address at 16-bit offset */
|
||||
#define getcrs32ea(offset) *(ea_t *)(crs+(offset))
|
||||
|
||||
/* put 32-bit effective address at 16-bit offset */
|
||||
#define putcrs32ea(offset, val) *(ea_t *)(crs+(offset)) = (val)
|
||||
|
||||
/* get 64-bit signed at 16-bit offset */
|
||||
#define getcrs64s(offset) *(long long *)(crs+(offset))
|
||||
|
||||
/* put 64-bit signed at 16-bit offset (remove later) */
|
||||
#define putcrs64s(offset, val) *(long long *)(crs+(offset)) = (val)
|
||||
|
||||
/* put 64-bit double at 16-bit offset (remove later) */
|
||||
#define putcrs64d(offset, val) *(double *)(crs+(offset)) = (val)
|
||||
|
||||
/******* 32-bit offset macros: ***********/
|
||||
|
||||
/* fetch 16-bit unsigned at 32-bit offset (right halfword is returned) */
|
||||
#define getgr16(offset) crs[(offset)*2]
|
||||
|
||||
/* store 16-bit unsigned at 32-bit offset (in right halfword) */
|
||||
#define putgr16(offset, val) crs[(offset)*2] = (val)
|
||||
|
||||
/* fetch 16-bit signed at 32-bit offset (right halfword is returned) */
|
||||
#define getgr16s(offset) *(short *)(crs+(offset)*2)
|
||||
|
||||
/* store 16-bit signed at 32-bit offset (in right halfword) */
|
||||
#define putgr16s(offset, val) *(short *)(crs+(offset)*2) = (val)
|
||||
|
||||
/* fetch 32-bit unsigned at 32-bit offset */
|
||||
#define getgr32(offset) crsl[(offset)]
|
||||
|
||||
/* store 32-bit unsigned at 32-bit offset */
|
||||
#define putgr32(offset, val) crsl[(offset)] = (val)
|
||||
|
||||
/* fetch 32-bit signed at 32-bit offset */
|
||||
#define getgr32s(offset) *(int *)(crsl+(offset))
|
||||
|
||||
/* store 32-bit signed at 32-bit offset */
|
||||
#define putgr32s(offset, val) *(int *)(crsl+(offset)) = (val)
|
||||
|
||||
/* fetch 64-bit signed at 32-bit offset */
|
||||
#define getgr64s(offset) *(long long *)(crsl+(offset))
|
||||
|
||||
/* store 64-bit signed at 32-bit offset */
|
||||
#define putgr64s(offset, val) *(long long *)(crsl+(offset)) = (val)
|
||||
|
||||
/* fetch 64-bit unsigned at 32-bit offset */
|
||||
#define getgr64(offset) *(unsigned long long *)(crsl+(offset))
|
||||
|
||||
/* fetch 32-bit unsigned at FP register 0 or 1
|
||||
For FP 0, offset=0; for FP 1, offset=2
|
||||
NOTE: instead of doing FAC0+offset, there could be another
|
||||
pointer to FR0, then use offset as an index */
|
||||
#define getfr32(offset) crsl[(FAC0+offset)]
|
||||
|
||||
/* put 64-bit double in FP reg 0 or 1
|
||||
For FP 0, offset=0; for FP 1, offset=2 */
|
||||
#define putfr64d(offset, val) *(double *)(crsl+FAC0+offset) = (val)
|
||||
|
||||
#define PCBLEV 0
|
||||
#define PCBLINK 1
|
||||
#define PCBWAIT 2
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user