mirror of
https://github.com/prirun/p50em.git
synced 2026-02-27 00:39:52 +00:00
removed valid bit from STLB cache and use segment # 0xFFFF instead
this allows removing a comparison from mapva's fast path
This commit is contained in:
Jim
62
em.c
62
em.c
@@ -333,20 +333,25 @@ static unsigned short cpuid = 5; /* STPM CPU model, set with -cpuid *
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/* STLB cache structure is defined here; the actual stlb is in gv.
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There are several different styles on Prime models. This is
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modeled after the 6350 STLB, but is only 1-way associative. */
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modeled after the 6350 STLB, but is only 1-way associative.
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Instead of using a valid/invalid bit, a segment number of 0xFFFF
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means "invalid", since it won't match any real segment number */
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#define STLBENTS 512
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typedef struct {
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char valid; /* 1 if STLB entry is valid, zero otherwise */
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char unmodified; /* 1 if page hasn't been modified, 0 if modified */
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// char shared; /* 1 if page is shared and can't be cached */
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char access[4]; /* ring n access rights */
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unsigned short procid; /* process id for segments >= '4000 */
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unsigned short seg; /* segment number */
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unsigned int ppn; /* physical page number */
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unsigned short *pmep; /* pointer to page table flag word */
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unsigned long load_ic; /* instruction where STLB was loaded (for debug) */
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unsigned int ppn; /* physical page number */
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unsigned short procid; /* process id for segments >= '4000 */
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short seg; /* segment number (0-0xFFF) */
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char access[4]; /* ring n access rights */
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char unmodified; /* 1 if page hasn't been modified, 0 if it has */
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//char shared; /* 1 if page is shared and can't be cached */
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//char valid; /* 1 if STLB entry is valid, zero otherwise */
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#ifndef NOTRACE
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unsigned long load_ic; /* instruction where STLB was loaded, (debug) */
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#endif
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} stlbe_t;
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/* The IOTLB stores translations for each page of the I/O segments 0-3 */
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@@ -354,8 +359,8 @@ typedef struct {
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#define IOTLBENTS 64*4
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typedef struct {
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char valid; /* 1 if IOTLB entry is valid, zero otherwise */
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unsigned int ppn; /* physical page number */
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char valid; /* 1 if IOTLB entry is valid, zero otherwise */
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} iotlbe_t;
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/* "gv" is a static structure used to hold "hot" global variables. These
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@@ -718,11 +723,11 @@ static pa_t mapva(ea_t ea, ea_t rp, short intacc, unsigned short *access) {
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}
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#endif
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/* if the STLB entry isn't valid, or the segments don't match,
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or the segment is private and the process id doesn't match,
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then the STLB has to be loaded first */
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/* if the segments don't match, or the segment is private and the
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process id doesn't match, then the STLB has to be loaded
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first (invalid entries have a segment of 0xFFFF and won't match) */
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if (!stlbp->valid || stlbp->seg != seg || (seg >= 04000 && stlbp->procid != crs[OWNERL])) {
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if (stlbp->seg != seg || (seg >= 04000 && stlbp->procid != crs[OWNERL])) {
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#ifndef NOTRACE
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gvp->mapvamisses++;
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#endif
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@@ -759,7 +764,6 @@ static pa_t mapva(ea_t ea, ea_t rp, short intacc, unsigned short *access) {
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if (!(pte & 0x8000))
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fault(PAGEFAULT, 0, ea);
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mem[pmaddr] |= 040000; /* set referenced bit */
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stlbp->valid = 1;
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stlbp->unmodified = 1;
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stlbp->access[0] = 7;
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stlbp->access[1] = (sdw >> 12) & 7;
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@@ -768,7 +772,9 @@ static pa_t mapva(ea_t ea, ea_t rp, short intacc, unsigned short *access) {
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stlbp->seg = seg;
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stlbp->ppn = ppn;
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stlbp->pmep = mem+pmaddr;
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#ifndef NOTRACE
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stlbp->load_ic = gvp->instcount;
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#endif
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/* if this is an I/O segment reference, load the I/O TLB too.
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This is done because earlier machines didn't have the LIOT
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@@ -828,11 +834,11 @@ static pa_t fastmap (ea_t ea, ea_t rp, short intacc) {
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seg = SEGNO32(ea);
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stlbp = gvp->stlb+STLBIX(ea);
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/* if the STLB entry is valid and the segments match, and the
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segment is common to all or the process id matches, then the STLB
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cache can be used for this access */
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/* if the STLB segments match, and the segment is common to all or
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the process id matches, then the STLB cache can be used for
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this access */
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if (stlbp->valid && (stlbp->seg == seg) && ((seg < 04000) || (stlbp->procid == crs[OWNERL]))) {
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if ((stlbp->seg == seg) && ((seg < 04000) || (stlbp->procid == crs[OWNERL]))) {
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ring = ((rp | ea) >> 29) & 3; /* current ring | ea ring = access ring */
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access = stlbp->access[ring];
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if ((intacc & access) == intacc) {
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@@ -3762,7 +3768,7 @@ main (int argc, char **argv) {
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newkeys(0);
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RP = 01000;
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for (i=0; i < STLBENTS; i++)
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gvp->stlb[i].valid = 0;
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gvp->stlb[i].seg = 0xFFFF; /* marker for invalid STLB entry */
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for (i=0; i < IOTLBENTS; i++)
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gvp->iotlb[i].valid = 0;
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bzero(mem, 64*1024*2); /* zero first 64K words */
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@@ -5160,7 +5166,7 @@ d_liot: /* 000044 */
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RESTRICT();
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ea = apea(NULL);
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utempa = STLBIX(ea);
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gvp->stlb[utempa].valid = 0;
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gvp->stlb[utempa].seg = 0xFFFF;
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TRACE(T_INST, " invalidated STLB index %d\n", utempa);
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mapva(ea, RP, RACC, &access);
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TRACE(T_INST, " loaded STLB for %o/%o\n", ea>>16, ea&0xffff);
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@@ -5172,7 +5178,7 @@ d_ptlb: /* 000064 */
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utempl = *(unsigned int *)(crs+L);
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for (utempa = 0; utempa < STLBENTS; utempa++)
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if ((utempl & 0x80000000) || gvp->stlb[utempa].ppn == utempl)
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gvp->stlb[utempa].valid = 0;
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gvp->stlb[utempa].seg = 0xFFFF;
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goto fetch;
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d_itlb: /* 000615 */
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@@ -5187,11 +5193,11 @@ d_itlb: /* 000615 */
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if (utempl == 0x10000) {
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for (utempa = 0; utempa < STLBENTS; utempa++)
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gvp->stlb[utempa].valid = 0;
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gvp->stlb[utempa].seg = 0xFFFF;
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TRACE(T_INST, " purged entire STLB\n");
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} else {
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utempa = STLBIX(utempl);
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gvp->stlb[utempa].valid = 0;
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gvp->stlb[utempa].seg = 0xFFFF;
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TRACE(T_INST, " invalidated STLB index %d\n", utempa);
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if (((utempl >> 16) & 07777) < 4)
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gvp->iotlb[(utempl >> 10) & 0xFF].valid = 0;
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@@ -5643,7 +5649,7 @@ d_bdy: /* 0140724 */
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d_bdx: /* 0140734 */
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TRACE(T_FLOW, " BDX\n");
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crs[X]--;
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#if 1
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#ifndef FAST2
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m = iget16(RP);
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if (crs[X] > 100 && m == RPL-1) {
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struct timeval tv0,tv1;
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@@ -8668,16 +8674,12 @@ nonimode:
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stopwatch_push(&sw_cas);
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m = get16t(ea);
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TRACE(T_FLOW, " CAS ='%o/%d\n", m, *(short *)&m);
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#ifdef FAST
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CLEARCC;
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#if 0
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if (crs[A] == m) {
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INCRP;
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// SETEQ;
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} else if (*(short *)(crs+A) < *(short *)&m) {
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RPL += 2;
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//SETLT;
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}
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//XSETL(0);
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#else
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crs[KEYS] &= ~020300; /* clear L, and CC */
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utempa = crs[A];
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