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CPUT4 T&M: max indirect levels is 8 then RXM fault occurs (S/R mode)
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18
em.c
18
em.c
@ -391,6 +391,10 @@ typedef struct {
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char valid; /* 1 if IOTLB entry is valid, zero otherwise */
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} iotlbe_t;
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/* maximum indirect levels is 8 according to T&M CPUT4 */
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#define INDLEVELS 8
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/* the emulator uses a special, very small address translation cache
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to hold the virtual page address and corresponding MEM[] pointer
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for a few special pages:
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@ -2078,6 +2082,7 @@ static void fault(unsigned short fvec, unsigned short fcode, ea_t faddr) {
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static ea_t ea16s (unsigned short inst) {
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unsigned short rpl, amask, i, x;
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int indlevel;
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ea_t ea, va;
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i = inst & 0100000; /* indirect */
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@ -2088,11 +2093,14 @@ static ea_t ea16s (unsigned short inst) {
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ea = (rpl & 037000) | (inst & 0777); /* current sector */
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else
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ea = (inst & 0777); /* sector 0 */
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indlevel = 0;
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while (1) {
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if (x) /* indexed */
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ea += crs[X];
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if (!i) /* not indirect */
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break;
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if (indlevel++ == INDLEVELS)
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fault(RESTRICTFAULT, 0, 0);
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ea &= amask;
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if (ea < gvp->livereglim) /* flag live register ea */
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ea |= 0x80000000;
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@ -2113,6 +2121,7 @@ static ea_t ea16s (unsigned short inst) {
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static ea_t ea32s (unsigned short inst) {
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unsigned short rpl, amask, i, x;
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int indlevel;
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ea_t ea, va;
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i = inst & 0100000; /* indirect */
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@ -2128,7 +2137,9 @@ static ea_t ea32s (unsigned short inst) {
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x = 0;
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}
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}
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while (i) {
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for (indlevel=0; i; indlevel++) {
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if (indlevel == INDLEVELS)
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fault(RESTRICTFAULT, 0, 0);
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ea &= amask;
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if (ea < gvp->livereglim) /* flag live register ea */
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ea |= 0x80000000;
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@ -2151,6 +2162,7 @@ static ea_t ea32s (unsigned short inst) {
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static inline ea_t ea32r64r (ea_t earp, unsigned short inst) {
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unsigned short ea, m, rph, rpl, amask, class, i, x;
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int indlevel;
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ea_t va;
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x = ((inst & 036000) != 032000) ? (inst & 040000) : 0;
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@ -2181,7 +2193,9 @@ static inline ea_t ea32r64r (ea_t earp, unsigned short inst) {
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}
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}
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ea &= amask;
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while (i) {
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for (indlevel=0; i; indlevel++) {
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if (indlevel == INDLEVELS)
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fault(RESTRICTFAULT, 0, 0);
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if (ea >= gvp->livereglim)
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m = get16(MAKEVA(rph,ea));
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else
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