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Invalidate brp cache on LPSW, since segmentation could be enabled.
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parent
3b6ed6f52c
commit
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17
em.c
17
em.c
@ -411,14 +411,14 @@ typedef struct {
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do the mapping and (assuming it doesn't fault) the eap cache entry
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is updated.
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This special cache is invalidated whenever the STLB is changed,
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whenever a ring change occurs, and whenever a process exchange
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occurs. For reads, no access checking is needed when the cache is
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used: the cache entry is either valid, meaning that the program has
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at least read access to the page, or the cache entry is invalid
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(special value of 0x000000FF, which is not a virtual page address -
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the right 10 bits must be zero for the start of a page), in which
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case mapva is called.
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This special cache is invalidated when the STLB is changed, a ring
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change occurs, on process exchange, and on LPSW. For reads, no
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access checking is needed when the cache is used: the cache entry
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is either valid, meaning that the program has at least read access
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to the page, or the cache entry is invalid (special value of
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0x000000FF, which is not a virtual page address - the right 10 bits
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must be zero for the start of a page), in which case mapva is
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called.
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The special cache can also be used for write references. Bits 2-4
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of the cache entry vpn are the access bits from mapva, so bit 4
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@ -3725,6 +3725,7 @@ static lpsw() {
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printf("WARNING: LPSW changed current register set: current modals=%o, new modals=%o\n", crs[MODALS], m);
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crsl = regs.sym.userregs[(m & 0340) >> 5];
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}
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invalidate_brp();
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crs[MODALS] = m;
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gvp->inhcount = 1;
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