defined register file with regs.h

began using (get,put)16/32/64 functions to access memory instead of mem[] began using crs[] to access current registers instead of mem[]
2026-03-09 20:01:45 +00:00 · 2005-05-23 00:00:00 -04:00
parent 655b35b0f9
commit efc25712b5
4 changed files with 873 additions and 686 deletions
--- a/em.c
+++ b/em.c
--- a/emdev.h
+++ b/emdev.h
@@ -72,7 +72,7 @@ void devnull (short class, short func, short device) {
  case 1:
    fprintf(stderr," SKS '%02o%02o\n", func, device);
    if (func == 0)
-      mem[P]++;                     /* assume it's always ready */
+      RPL++;                     /* assume it's always ready */
    else {
      fprintf(stderr," unimplemented SKS device '%02o function\n", device);
      exit(1);
@@ -92,7 +92,7 @@ void devnull (short class, short func, short device) {
  case 3:
    fprintf(stderr," OTA '%02o%02o\n", func, device);
    if (func == 0 | func == 1) {
-      mem[P]++;                     /* OTA '0004 always works on Unix */
+      RPL++;                     /* OTA '0004 always works on Unix */
    } else {
      fprintf(stderr," unimplemented OTA device '%02o function\n", device);
      exit(1);
@@ -138,7 +138,7 @@ void devasr (short class, short func, short device) {
  case 1:
    fprintf(stderr," SKS '%02o%02o\n", func, device);
    if (func <= 7)
-      mem[P]++;                     /* assume it's always ready */
+      RPL++;                     /* assume it's always ready */
    else {
      fprintf(stderr," unimplemented SKS '04 function\n");
      exit(1);
@@ -152,7 +152,7 @@ void devasr (short class, short func, short device) {
 	perror(" unable to get tty flags");
 	exit(1);
      }
-      if (mem[mem[P]] == 03776)       /* JMP *-1 -> blocking read */
+      if (get16(RPL) == 03776)       /* JMP *-1 -> blocking read */
 	newflags = ttyflags & ~O_NONBLOCK;
      else
 	newflags = ttyflags | O_NONBLOCK;
@@ -168,19 +168,19 @@ void devasr (short class, short func, short device) {
 	}
      } else if (n == 1) {
 	if (func >= 010)
-	  mem[A] = 0;
-	mem[A] = mem[A] | ch | 0x80;
-	mem[P]++;
+	  crs[A] = 0;
+	crs[A] = crs[A] | ch | 0x80;
+	RPL++;
      } else  if (n != 0) {
 	fprintf(stderr," unexpected error reading from tty, n=%d", n);
 	exit(1);
      }
    } else if (func == 011) {    /* read device id? */
-      mem[A] = 4;
-      mem[P]++;
+      crs[A] = 4;
+      RPL++;
    } else if (func == 012) {    /* read control word */
-      mem[A] = 04110;
-      mem[P]++;
+      crs[A] = 04110;
+      RPL++;
    } else {
      fprintf(stderr," unimplemented INA '04 function\n");
      exit(1);
@@ -190,12 +190,12 @@ void devasr (short class, short func, short device) {
  case 3:
    fprintf(stderr," OTA '%02o%02o\n", func, device);
    if (func == 0) {
-      fprintf(stderr," char to write=%o\n", mem[A]);
-      putchar(mem[A] & 0x7f);
+      fprintf(stderr," char to write=%o\n", crs[A]);
+      putchar(crs[A] & 0x7f);
      fflush(stdout);
-      mem[P]++;                     /* OTA '0004 always works on Unix */
+      RPL++;                     /* OTA '0004 always works on Unix */
    } else if (func == 1) {         /* write control word */
-      mem[P]++;
+      RPL++;
    } else {
      fprintf(stderr," unimplemented OTA '04 function\n");
      exit(1);
@@ -224,7 +224,7 @@ void devmt (short class, short func, short device) {

  case 2:
    fprintf(stderr," INA '%02o%02o\n", func, device);
-    if (mem[mem[P]] == 03776) {       /* JMP *-1 -> blocking read */
+    if (get16(RPL) == 03776) {       /* JMP *-1 -> blocking read */
      fprintf(stderr," Device not supported, so I/O hangs\n");
      exit(1);
    }
@@ -232,7 +232,7 @@ void devmt (short class, short func, short device) {

  case 3:
    fprintf(stderr," OTA '%02o%02o\n", func, device);
-    if (mem[mem[P]] == 03776) {       /* JMP *-1 -> blocking read */
+    if (get16(RPL) == 03776) {       /* JMP *-1 -> blocking read */
      fprintf(stderr," Device not supported, so I/O hangs\n");
      exit(1);
    }
@@ -267,8 +267,7 @@ void devcp (short class, short func, short device) {
  case 2:
    fprintf(stderr," INA '%02o%02o\n", func, device);
    if (func == 016) {
-      mem[A] = 014114;
-      mem[A] = 0;
+      crs[A] = 014114;
    } else {
      fprintf(stderr," unimplemented INA device '%02o function\n", device);
      exit(1);
@@ -278,7 +277,7 @@ void devcp (short class, short func, short device) {
  case 3:
    fprintf(stderr," OTA '%02o%02o\n", func, device);
    if (func == 017) {           /* write lights */
-      mem[P]++;
+      RPL++;
    } else {
      fprintf(stderr," unimplemented OTA device '%02o function\n", device);
      exit(1);
@@ -310,6 +309,7 @@ void devcp (short class, short func, short device) {
 */

 void devdisk (short class, short func, short device) {
+  unsigned short m;
  unsigned short oar;
  unsigned short status;       /* actual status */
  unsigned short teststatus;   /* status for order testing */
@@ -338,18 +338,18 @@ void devdisk (short class, short func, short device) {
  case 2:
    fprintf(stderr," INA '%2o%2o\n", func, device);
    if (func == 01)          /* read device id, clear A first */
-      mem[A] = device;
+      crs[A] = device;
    else if (func == 011)    /* read device id, don't clear A */
-      mem[A] |= device;
+      crs[A] |= device;
    else if (func == 017)    /* read status */
-      mem[A] = 0100000;
-    mem[P]++;
+      crs[A] = 0100000;
+    RPL++;
    break;

  case 3:
    fprintf(stderr," OTA '%02o%02o\n", func, device);
    if (func == 017) {        /* set OAR (order address register) */
-      oar = mem[A];
+      oar = crs[A];
      halt = 0;
      status = 0100000;
      unit = -1;
@@ -382,10 +382,10 @@ void devdisk (short class, short func, short device) {
 	  else if (order == 6)
 	    strcpy(ordertext,"Write");
 	  fprintf(stderr," %s, head=%d, track=%d, rec=%d, recsize=%d\n", ordertext, head, track, rec, recsize);
-	  dmanw = mem[dmachan];
+	  dmanw = get16(dmachan);
 	  dmanw = -(dmanw>>4);
-	  dmaaddr = mem[dmachan+1];
-	  fprintf(stderr, " DMA channels: nch-1=%d, ['%o]='%o, ['%o]='%o, nwords=%d\n", dmanch, dmachan, mem[dmachan], dmachan+1, mem[dmachan+1], dmanw);
+	  dmaaddr = get16(dmachan+1);
+	  fprintf(stderr, " DMA channels: nch-1=%d, ['%o]='%o, ['%o]='%o, nwords=%d\n", dmanch, dmachan, get16(dmachan), dmachan+1, dmaaddr, dmanw);
 	  if (devfd == -1) {
 	    fprintf(stderr," Unit not selected or not ready\n");
 	    status = 0100001;
@@ -407,8 +407,10 @@ void devdisk (short class, short func, short device) {
 	      perror("Unable to read drive file");
 	      exit(1);
 	    }
-	    mem[dmachan] = 0;
-	    mem[dmachan+1] += dmanw;
+	    put16(0,dmachan);
+	    m = get16(dmachan+1);
+	    m += dmanw;
+	    put16(m,dmachan+1);

 	  } else if (order == 6)
 	    fprintf(stderr," Write order not implemented\n");
@@ -442,13 +444,13 @@ void devdisk (short class, short func, short device) {
 	  break;
 	case 9: /* DSTAT = Store status to memory */
 	  memaddr = mem[oar+1];
-	  fprintf(stderr, " store status to '%o\n", memaddr);
+	  fprintf(stderr, " store status='%o to '%o\n", status, memaddr);
 	  mem[memaddr] = status;
 	  oar += 2;
 	  break;
 	case 11: /* DOAR = Store OAR to memory (2 words) */
 	  memaddr = mem[oar+1];
-	  fprintf(stderr, " store OAR to '%o\n", memaddr);
+	  fprintf(stderr, " store OAR='%o to '%o\n", oar, memaddr);
 	  mem[memaddr] = oar;
 	  oar += 2;
 	  break;
@@ -473,7 +475,7 @@ void devdisk (short class, short func, short device) {
 	  exit(1);
 	}
      }	  
-      mem[P]++;
+      RPL++;
    } else {
      fprintf(stderr," unimplemented OTA device '%02o function\n", device);
      exit(1);
--- a/os.c
+++ b/os.c
@@ -157,13 +157,8 @@ os_timdat(short *userbuf, short *n) {
  tod = time(NULL);
  localtime_r(&tod, &tms);
  strncpy(timbuf.mmddyy,"042105",6);
-#if 0
  timbuf.timemins = tms.tm_hour*60 + tms.tm_min;
  timbuf.timesecs = tms.tm_sec;
-#else
-  timbuf.timemins = 0;
-  timbuf.timesecs = 0;
-#endif  
  timbuf.timeticks = 0;
  timbuf.cpusecs = timbuf.cputicks = timbuf.iosecs = timbuf.ioticks = 0;
  timbuf.tickspersec = 330;
--- a/regs.h
+++ b/regs.h
@@ -0,0 +1,108 @@
+#define REGSETS 8
+
+/* these are offsets from into crs (current register set) */
+
+#define A 4
+#define B 5
+#define L 4
+#define E 6
+
+#define S 10
+#define Y 10
+
+#define X 14
+
+/* XXX: is the floating pt register really split like this? */
+
+#define FLTH 20
+#define FLTL 21
+#define FEXP 22
+#define FLTD 23
+#define VSC 22
+
+#define PB 24
+#define PBH 24
+#define PBL 25
+
+#define SB 26
+#define SBH 26
+#define SBL 27
+
+#define LB 28
+#define LBH 28
+#define LBL 29
+
+#define XB 30
+#define XBH 30
+#define XBL 31
+
+#define DTAR3 32
+#define DTAR2 34
+#define DTAR1 36
+#define DTAR0 38
+
+#define KEYS 40
+#define MODALS 41
+
+#define OWNER 42
+#define OWNERH 42
+#define OWNERL 43
+#define FCODE 44
+#define FADDR 47
+#define TIMER 48
+
+  union {
+    int rs[REGSETS][32];
+
+    /* locs '0-'177 as signed 32-bit integers */
+    int s32[32*REGSETS];
+
+    /* locs '0-'177 as unsigned 32-bit integers */
+    unsigned int u32[32*REGSETS];
+
+    /* locs '0-'377 as signed 16-bit integers */
+    short s16[64*REGSETS];
+
+    /* locs '0-'377 as signed 16-bit integers */
+    unsigned short u16[64*REGSETS];
+
+    /* symbolic register file locations */
+    struct {
+      unsigned int tr0,tr1,tr2,tr3,tr4,tr5,tr6,tr7;
+      unsigned int rdmx1,rdmx2;
+      unsigned short rdum1[1],ratmpl;
+      unsigned int rsgt1,rsgt2,recc1,recc2;
+      unsigned short rdum2[1],reoiv,zero,one;
+      unsigned int pbsave,rdmx3,rdmx4,c377,rdum3[3];
+      unsigned int pswpb;
+      unsigned short pswkeys,rdum4[1];
+      unsigned short pla,pcba,plb,pcbb;
+      unsigned int dswrma;
+      unsigned int dswstat;
+      unsigned int dswpb,rsavptr;
+      unsigned short regdmx[64];
+      unsigned int userregs[32*(REGSETS-2)];
+    } sym;
+  } regs;
+
+unsigned short *crs;
+
+/* define mapping between memory addresses and the current register set */
+
+unsigned short memtocrs[] = {
+  14,     /* 0 = X */
+  4,      /* 1 = A */
+  5,      /* 2 = B */
+  10,     /* 3 = Y */
+  20,     /* 4 = FAC1/FLTH */
+  21,     /* 5 = FAC1/FLTL */
+  22,     /* 6 = FAC1/FEXP */
+  -1,     /* 7 = PC (this is in the microcode scratch register set - TR7) */
+  32,     /* 10 = unnamed */
+  44,     /* 11 = FCODE */
+  47,     /* 12 = FADDR */
+  16,     /* 13 = unnamed */
+  26,     /* 14 = unnamed (SB seg) */
+  27,     /* 15 = unnamed (SB word) */
+  28,     /* 16 = unnamed (LB seg) */
+  29};    /* 17 = unnamed (LB word) */