11 Commits

Author	SHA1	Message	Date
Jim	bdae5dede9	realtime clock, interrupts, process timer, LDC/STC, ZMV, ZMVD, ZFIL, PCL work	2005-06-25 00:00:00 -04:00
Jim	5ab1209f0a	INCVA macro for segment wraparound, PX work, added --cpuid option	2005-06-16 00:00:00 -04:00
Jim	997332c487	first implementation of process exchange, WAIT, NFY + ... added restricted instruction checking added CALF more PCL work	2005-06-13 00:00:00 -04:00
Jim	0b2994585c	changed mem[] to be Prime physical memory array, removed direct references + ... more work on PCL	2005-06-10 00:00:00 -04:00
Jim	22f4c22f8f	virtual address translation, fault handling code + ... tracing for address translation, disk I/O, and PCL field address, field length, and load/store character instructions queue instructions more work on setting C & L bits correctly	2005-06-07 00:00:00 -04:00
Jim	c2c3e8f650	added trace feature and XEC instruction	2005-05-27 00:00:00 -04:00
Jim	3763da4cbe	added live register access to memory get/put functions ... added live register access flag to effective address calculations first attempt at complete 64V address calculation first RSAV/RRST, STAC/STLC, LPSW, LDLR/STLR, EIO more shift instruction work	2005-05-24 00:00:00 -04:00
Jim	efc25712b5	defined register file with regs.h ... began using (get,put)16/32/64 functions to access memory instead of mem[] began using crs[] to access current registers instead of mem[]	2005-05-23 00:00:00 -04:00
Jim	655b35b0f9	added table of generic instructions to ignore & log ... initial disk controller support began FP instruction work	2005-04-23 00:00:00 -04:00
Jim	ff3fd68935	condition code macros ... mem array is segment addressable start of boot support use CC macros and BCxx to emulate Bxyy (eg, BFLT) use CC macros and LCxx to emulate Lxyy (eg, LFLT) shift instruction work	2005-04-28 00:00:00 -04:00
Jim	ec56fd7a9e	Initial version of Prime emulator for Mac OSX on PowerPC	2005-04-18 00:00:00 -04:00