6 Commits

Author	SHA1	Message	Date
Jim	09b9592915	WAIT register save shouldn't save all registers like PX does + ... need to restore interval timer when new process dispatched process level was incorrect when new process dispatched changes setting process abort flag in PCB when timer overflows	2005-09-19 00:00:00 -04:00
Jim	bbd311f048	more interrupt/fault work ... reordered switches to process more frequent instructions first	2005-07-19 00:00:00 -04:00
Jim	22f4c22f8f	virtual address translation, fault handling code + ... tracing for address translation, disk I/O, and PCL field address, field length, and load/store character instructions queue instructions more work on setting C & L bits correctly	2005-06-07 00:00:00 -04:00
Jim	efc25712b5	defined register file with regs.h ... began using (get,put)16/32/64 functions to access memory instead of mem[] began using crs[] to access current registers instead of mem[]	2005-05-23 00:00:00 -04:00
Jim	655b35b0f9	added table of generic instructions to ignore & log ... initial disk controller support began FP instruction work	2005-04-23 00:00:00 -04:00
Jim	ff3fd68935	condition code macros ... mem array is segment addressable start of boot support use CC macros and BCxx to emulate Bxyy (eg, BFLT) use CC macros and LCxx to emulate Lxyy (eg, LFLT) shift instruction work	2005-04-28 00:00:00 -04:00