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mirror of https://github.com/rcornwell/sims.git synced 2026-01-15 08:02:11 +00:00

KA10: Redid instruction execution to be faster.

This commit is contained in:
Richard Cornwell 2021-04-11 18:39:01 -04:00
parent 84b4b9f513
commit 00dfd64375
4 changed files with 2228 additions and 894 deletions

View File

@ -57,6 +57,11 @@ uba_read(t_addr addr, int ctl, uint64 *data, int access)
int i;
int ubm = uba_device[ctl];
if (ctl == 0 && addr == 0100000) {
*data = 0;
return 0;
}
if (ubm == -1) {
sim_debug(DEBUG_EXP, &cpu_dev, "No UBA adaptor %02o %08o\n", ctl, addr);
return 1;
@ -101,6 +106,8 @@ uba_read(t_addr addr, int ctl, uint64 *data, int access)
uint16 buf;
int r = dibp->rd_io(addr, &buf, access);
*data = (uint64)buf;
if (r)
uba_status[ubm] |= UBST_TIM | UBST_NED;
return r;
}
}
@ -116,6 +123,9 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
int i;
int ubm = uba_device[ctl];
if (ctl == 0 && addr == 0100000) {
return 1;
}
if (ubm == -1) {
sim_debug(DEBUG_EXP, &cpu_dev, "No UBA adaptor %02o %08o %012llo\n", ctl, addr, data);
return 1;
@ -139,8 +149,8 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
return 0;
} else if ((addr & 077) == 0) {
uba_status[ubm] &= (uint32)(074000 ^ data) | 0746000;
uba_status[ubm] |= (uint32)(0277 & data);
if (data & 0100) {
uba_status[ubm] = 0;
for(i = 0; (dptr = sim_devices[i]) != NULL; i++) {
DIB *dibp = (DIB *) dptr->ctxt;
if (dibp == NULL)
@ -150,8 +160,9 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
if (ctl == dibp->uba_ctl)
dibp->uba_irq_pend = 0;
}
clr_interrupt(ctl);
clr_interrupt(ctl<<2);
}
uba_status[ubm] |= (uint32)(0277 & data);
return 0;
} else if ((addr & 077) == 1) {
return 0;
@ -166,7 +177,10 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
continue;
if (ctl == dibp->uba_ctl && dibp->uba_addr == (addr & (~dibp->uba_mask))) {
uint16 buf = (uint16)(data & 0177777);
return dibp->wr_io(addr, buf, access);
int r = dibp->wr_io(addr, buf, access);
if (r)
uba_status[ubm] |= UBST_TIM | UBST_NED;
return r;
}
}
sim_debug(DEBUG_EXP, &cpu_dev, "No UBA device write %02o %08o %012llo\n", ctl, addr, data);
@ -194,7 +208,7 @@ int
uba_write_npr(t_addr addr, uint16 ctl, uint64 data)
{
int ubm = uba_device[ctl];
t_addr oaddr = addr;
t_addr oaddr = addr;
uint32 map = uba_map[ubm][(077) & (addr >> 11)];
if ((addr & 0400000) != 0)
return 0;
@ -349,6 +363,14 @@ uba_get_vect(t_addr addr, int lvl, int *dev, int *new_lvl)
return addr;
}
void
uba_set_parity(uint16 ctl)
{
int ubm = uba_device[ctl];
if (ubm >= 0)
uba_status[ubm] |= UBST_PAR;
}
t_stat
uba_set_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{

File diff suppressed because it is too large Load Diff

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@ -298,7 +298,7 @@ extern DEBTAB crd_debug[];
#if KI|KL
#define PRV_PUB 020000 /* Overflow in excutive mode */
#else
#define PRV_PUB 000000 /* Not on KA or PDP6 */
#define PRV_PUB 000000 /* Not on KA, KS or PDP6 */
#endif
#ifdef ITS
#ifdef PURE
@ -551,6 +551,7 @@ int uba_write_npr_word(t_addr addr, uint16 ctl, uint16 data);
void uba_set_irq(DIB *dibp);
void uba_clr_irq(DIB *dibp);
t_addr uba_get_vect(t_addr addr, int lvl, int *dev, int *new_lvl);
void uba_set_parity(uint16 ctl);
t_stat uba_set_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat uba_show_addr (FILE *st, UNIT *uptr, int32 val, CONST void *desc);

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@ -590,7 +590,7 @@ t_stat load_sav (FILE *fileref, int ftype)
wc = (int32)(data >> 18);
pa = (uint32) (data & RMASK);
if (wc == (OP_JRST << 9)) {
printf("Start addr=%06o\n", pa);
sim_printf("Start addr=%06o\n", pa);
PC = pa;
return SCPE_OK;
}