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https://github.com/rcornwell/sims.git
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ICL1900: Patches to make E4BM work with CP, TP, LP.
This commit is contained in:
parent
66984e0bd2
commit
19ad893bc1
@ -32,7 +32,7 @@
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#define NUM_DEVS_CDP 0
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#endif
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#define UNIT_V_TYPE (UNIT_V_UF + 8)
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#define UNIT_V_TYPE (UNIT_V_UF + 7)
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#define UNIT_TYPE (0xf << UNIT_V_TYPE)
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#define GET_TYPE(x) ((UNIT_TYPE & (x)) >> UNIT_V_TYPE)
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#define SET_TYPE(x) (UNIT_TYPE & ((x) << UNIT_V_TYPE))
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@ -70,8 +70,8 @@ CONST char *cdp_description (DEVICE *dptr);
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DIB cdp_dib = { CHAR_DEV, &cdp_cmd, &cdp_nsi_cmd, &cdp_nsi_status };
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UNIT cdp_unit[] = {
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{ UDATA (&cdp_svc, UNIT_CDP(10), 0), 10000 },
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{ UDATA (&cdp_svc, UNIT_CDP(12), 0), 10000 },
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{ UDATA (&cdp_svc, UNIT_CDP(13), 0), 10000 },
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};
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@ -88,7 +88,7 @@ DEVICE cdp_dev = {
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"CP", cdp_unit, NULL, cdp_mod,
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NUM_DEVS_CDP, 8, 22, 1, 8, 22,
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NULL, NULL, NULL, NULL, &sim_card_attach, &sim_card_detach,
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&cdp_dib, DEV_DISABLE | DEV_CARD | DEV_DEBUG, 0, dev_debug,
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&cdp_dib, DEV_DISABLE | DEV_CARD | DEV_DEBUG, 0, card_debug,
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NULL, NULL, &cdp_help, NULL, NULL, &cdp_description
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};
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@ -126,17 +126,20 @@ void cdp_cmd(int dev, uint32 cmd, uint32 *resp) {
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if ((uptr->flags & UNIT_ATT) == 0)
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return;
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if (cmd == 020) { /* Send Q */
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*resp = uptr->STATUS & 001; /* TERMINATE */
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*resp = uptr->STATUS & TERMINATE; /* TERMINATE */
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if ((uptr->flags & UNIT_ATT) != 0 || uptr->STATUS & 07700)
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*resp |= 040;
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if ((uptr->flags & BUSY) == 0)
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*resp |= STOPPED;
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sim_debug(DEBUG_STATUS, &cdp_dev, "STATUS: %02o %02o\n", cmd, *resp);
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uptr->STATUS &= ~TERMINATE;
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chan_clr_done(dev);
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} else if (cmd == 024) { /* Send P */
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*resp = uptr->STATUS & 016; /* IMAGE, ERROR, OPAT */
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if ((uptr->flags & UNIT_ATT) != 0)
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*resp |= 1;
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uptr->STATUS &= (BUSY|DISC);
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chan_clr_done(dev);
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sim_debug(DEBUG_STATUS, &cdp_dev, "STATUS: %02o %02o\n", cmd, *resp);
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} else if (cmd == 032) {
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if ((uptr->flags & UNIT_ATT) == 0)
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return;
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@ -185,6 +188,7 @@ void cdp_nsi_cmd(int dev, uint32 cmd) {
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if (cmd & 02) {
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if (uptr->STATUS & BUSY)
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uptr->STATUS |= DISC;
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sim_debug(DEBUG_CMD, &cdp_dev, "Stop: %02o %08o\n", cmd, uptr->STATUS);
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return;
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}
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@ -195,6 +199,7 @@ void cdp_nsi_cmd(int dev, uint32 cmd) {
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return;
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}
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uptr->STATUS = BUSY;
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sim_debug(DEBUG_CMD, &cdp_dev, "Start: %02o %08o\n", cmd, uptr->STATUS);
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chan_clr_done(dev);
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sim_activate(uptr, uptr->wait);
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}
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@ -236,6 +241,7 @@ void cdp_nsi_status(int dev, uint32 *resp) {
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if ((uptr->flags & UNIT_ATT) == 0)
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*resp |= 2;
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uptr->STATUS &= BUSY|DISC;
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sim_debug(DEBUG_STATUS, &cdp_dev, "STATUS: %02o\n", *resp);
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chan_clr_done(dev);
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}
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@ -266,6 +272,7 @@ t_stat cdp_svc (UNIT *uptr)
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break;
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}
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image[i] = mem_to_hol[ch];
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sim_debug(DEBUG_DATA, &cdp_dev, "Data: %02o %04x\n", ch, image[i]);
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}
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switch(sim_punch_card(uptr, image)) {
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case CDSE_EMPTY:
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@ -32,7 +32,7 @@
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#define NUM_DEVS_CDR 0
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#endif
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#define UNIT_V_TYPE (UNIT_V_UF + 8)
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#define UNIT_V_TYPE (UNIT_V_UF + 7)
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#define UNIT_TYPE (0xf << UNIT_V_TYPE)
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#define GET_TYPE(x) ((UNIT_TYPE & (x)) >> UNIT_V_TYPE)
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#define SET_TYPE(x) (UNIT_TYPE & ((x) << UNIT_V_TYPE))
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@ -78,8 +78,8 @@ CONST char *cdr_description (DEVICE *dptr);
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DIB cdr_dib = { CHAR_DEV, &cdr_cmd, &cdr_nsi_cmd, &cdr_nsi_status };
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UNIT cdr_unit[] = {
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{ UDATA (&cdr_svc, UNIT_CDR(8), 0), 10000 },
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{ UDATA (&cdr_svc, UNIT_CDR(9), 0), 10000 },
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{ UDATA (&cdr_svc, UNIT_CDR(10), 0), 10000 },
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{ UDATA (&cdr_svc, UNIT_CDR(11), 0), 10000 },
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};
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@ -282,6 +282,7 @@ t_stat cdr_svc (UNIT *uptr)
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case CDSE_EMPTY:
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case CDSE_EOF:
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sim_card_detach(uptr);
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uptr->STATUS |= OPAT;
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sim_debug(DEBUG_DATA, &cdr_dev, "EOF: %d\n", i);
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break;
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case CDSE_ERROR:
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@ -302,7 +303,7 @@ t_stat cdr_svc (UNIT *uptr)
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sim_debug(DEBUG_DATA, &cdr_dev, "col: %04x %02o '%c'\n", image[i], ch, mem_to_ascii[ch]);
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if (ch == 0xff) {
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uptr->STATUS |= ERROR;
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break;
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ch = 077;
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}
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}
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sim_debug(DEBUG_DATA, &cdr_dev, "DATA: %03o\n", ch);
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@ -234,7 +234,7 @@ t_opcode;
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#define NMASK 037777400
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#define MMASK 037777000
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#define UNIT_V_ADDR 24
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#define UNIT_V_ADDR (UNIT_V_UF + 9)
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#define UNIT_M_ADDR (077 << UNIT_V_ADDR)
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#define GET_UADDR(x) ((UNIT_M_ADDR & (x)) >> UNIT_V_ADDR)
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#define UNIT_ADDR(x) (UNIT_M_ADDR & ((x) << UNIT_V_ADDR))
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@ -84,8 +84,8 @@ CONST char *lpr_description (DEVICE *dptr);
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DIB lpr_dib = { CHAR_DEV, &lpr_cmd, &lpr_nsi_cmd, &lpr_nsi_status };
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UNIT lpr_unit[] = {
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{ UDATA (&lpr_svc, UNIT_LPR(13), 0), 10000 },
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{ UDATA (&lpr_svc, UNIT_LPR(14), 0), 10000 },
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{ UDATA (&lpr_svc, UNIT_LPR(15), 0), 10000 },
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};
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@ -220,7 +220,7 @@ void lpr_nsi_cmd(int dev, uint32 cmd) {
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chan_set_done(GET_UADDR(uptr->flags));
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return;
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}
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uptr->CMD |= 0;
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uptr->CMD |= AUTO;
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uptr->STATUS = BUSY;
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sim_activate(uptr, uptr->wait);
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chan_clr_done(GET_UADDR(uptr->flags));
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@ -304,16 +304,16 @@ t_stat lpr_svc (UNIT *uptr)
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len = 120;
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else if (LW_160(uptr->flags))
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len = 160;
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for (i = 0; i < len && eor == 0; i++) {
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i = 0;
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while (eor == 0 && i <sizeof(buffer)-4) {
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eor = chan_output_char(GET_UADDR(uptr->flags), &ch, 0);
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sim_debug(DEBUG_DATA, &lpr_dev, "DATA: %03o\n", ch);
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switch (ch & 060) {
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case 000: ch = 0060 | (ch & 017); break;
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case 020: ch = 0040 | (ch & 017); break;
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case 040: ch = 0100 | (ch & 017); break;
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case 060: ch = 0120 | (ch & 017); break;
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if (uptr->CMD & AUTO) {
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uptr->CMD |= (int32)ch << 8;
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uptr->CMD &= ~AUTO;
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} else {
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sim_debug(DEBUG_DATA, &lpr_dev, "DATA: %03o\n", ch);
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buffer[i++] = mem_to_ascii[ch];
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}
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buffer[i] = ch;
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}
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buffer[i++] = '\r';
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buffer[i++] = '\n';
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@ -581,8 +581,13 @@ mt_boot(int32 unit_num, DEVICE * dptr)
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t_stat
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mt_attach(UNIT * uptr, CONST char *file)
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{
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t_stat r;
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uptr->STATUS = 0;
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return sim_tape_attach_ex(uptr, file, 0, 0);
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if ((r = sim_tape_attach_ex(uptr, file, 0, 0)) == SCPE_OK) {
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if (uptr->flags & UNIT_RO)
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uptr->flags |= MTUF_WLK;
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}
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return r;
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}
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t_stat
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@ -668,8 +668,10 @@ mta_attach(UNIT * uptr, CONST char *file)
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return r;
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uptr->STATUS &= ~OFFLINE;
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uptr->STATUS = ACCEPT;
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// chan_set_done(unit + GET_UADDR(dptr->flags));
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return SCPE_OK;
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if (uptr->flags & UNIT_RO)
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uptr->flags |= MTUF_WLK;
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chan_set_done(unit + GET_UADDR(dptr->flags));
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return r;
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}
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t_stat
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@ -124,7 +124,7 @@ uint8 mem_to_ascii[64] = {
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/* x0 x1 x2 x3 x4 x5 x6 x7 */
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'0', '1', '2', '3', '4', '5', '6', '7', /* 0x */
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'8', '9', ':', ';', '<', '=', '>', '?', /* 1x */
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' ', '!', '"', '#', '\\', '%', '&', '\'', /* 2x */
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' ', '!', '"', '#', '~', '%', '&', '\'', /* 2x */
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'(', ')', '*', '+', ',', '-', '.', '/', /* 3x */
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'@', 'A', 'B', 'C', 'D', 'E', 'F', 'G', /* 4x */
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'H', 'I', 'J', 'K', 'L', 'M', 'N', 'O', /* 5x */
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@ -157,7 +157,7 @@ const char ascii_to_mem[128] = {
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/* P Q R S T U V W */
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060, 061, 062, 063, 064, 065, 066, 067,
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/* X Y Z [ \ ] ^ _ */
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070, 071, 072, 073, 024, 075, 076, 077,
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070, 071, 072, 073, -1, 075, 076, 077,
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/* ` a b c d e f g */
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-1, 041, 042, 043, 044, 045, 046, 047, /* 14 -1 177 */
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/* h i j k l m n o */
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@ -165,49 +165,59 @@ const char ascii_to_mem[128] = {
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/* p q r s t u v w */
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060, 061, 062, 063, 064, 065, 066, 067,
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/* x y z { | } ~ del*/
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070, 071, 072, 024, -1, -1, -1, -1,
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070, 071, 072, 024, -1, -1, 024, -1,
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};
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/*
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* Translate internal code to Holerith for punch cards.
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* This uses IBM029 encoding rather then ICL1900 punch codes.
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*
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* Char 029 ICL1900
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* # 8+3 8+3
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* @ 8+4 8+4
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* ( 12+8+5 8+5
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* ) 11+8+5 8+6
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* ] 10+8+6 8+7
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* + 12+10 12+8+2
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* . 12+8+3 12+8+3
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* : 8+5 12+8+4
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* ; 11+8+6 12+8+5
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* ' 8+5 12+8+6
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* ! 10+8+2 12+8+7
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* [ 12+8+4 11+8+2
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* $ 11+8+3 11+8+3
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* * 11+8+4 11+8+4
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* > 8+6 11+8+5
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* = 10+8+5 11+8+6
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* ^ 10+8+7 11+8+7
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* lb 11+8+6 10+8+2 \
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* , 10+8+3 10+8+3
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* % 10+8+4 10+8+4
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* ? 8+2 10+8+5
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* = 10+8+5 10+8+6
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* _ 8+6 10+8+7
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*/
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uint16 mem_to_hol[64] = {
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/* 0 1 2 3 4 5 6 7 */
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0x200, 0x100, 0x080, 0x040, 0x020, 0x010, 0x008, 0x004, /* 0x */
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/* 8 9 : ; < = > ? */
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0x002, 0x001, 0x812, 0x822, 0x40A, 0x20A, 0x412, 0x212, /* 1x */
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/* bl ! " # lb, % & ` */
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0x000, 0x206, 0x600, 0x042, 0x242, 0x222, 0x800, 0x80a, /* 2x */
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0x002, 0x001, 0x082, 0x40A, 0x80A, 0x00A, 0x20A, 0x206, /* 1x */
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/* bl ! " # ~ % & ' */
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0x000, 0x482, 0x006, 0x042, 0x806, 0x222, 0x800, 0x012, /* 2x */
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/* ( ) * + , - . / */
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0x012, 0x00a, 0x422, 0xA00, 0x282, 0x400, 0x842, 0x300, /* 3x */
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0x812, 0x412, 0x422, 0x80A, 0x242, 0x400, 0x842, 0x300, /* 3x */
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/* @ A B C D E F G */
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0x012, 0x900, 0x880, 0x840, 0x820, 0x810, 0x808, 0x804, /* 4x */
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0x022, 0x900, 0x880, 0x840, 0x820, 0x810, 0x808, 0x804, /* 4x */
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/* H I J K L M N O */
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0x802, 0x801, 0x500, 0x480, 0x440, 0x420, 0x410, 0x408, /* 5x */
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/* P Q R S T U V W */
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0x404, 0x402, 0x401, 0x280, 0x240, 0x220, 0x210, 0x208, /* 6x */
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/* X Y Z [ $ ] ^ _ */
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0x204, 0x202, 0x201, 0x482, 0x442, 0x006, 0x406, 0x206, /* 7x */
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0x204, 0x202, 0x201, 0xA00, 0x442, 0x882, 0x406, 0x212, /* 7x */
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};
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uint8 hol_to_mem[4096];
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/* 2+8 22 12+2+8 33 11+2+8 73 0+2+8 24
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3+8 23 12+3+8 36 11+3+8 74 0+3+8 34
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4+8 40 12+4+8 13 11+4+8 32 0+4+8 25
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5+8 30 12+5+8 12 11+5+8 16 0+5+8 17
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6+8 31 12+6+8 27 11+6+8 14 0+6+8 15
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7+8 75 12+7+8 21 11+7+8 76 0+7+8 77
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0-9 00 -> 11
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12+0 -> 26
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12+n -> 40+n
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11 -> 35
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11+0 -> 22
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11+n -> 51+n
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10 -> 0
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10+1 -> 37
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10+n -> 61
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*/
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/* Load a card image file into memory. */
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@ -222,8 +232,9 @@ sim_load(FILE * fileref, CONST char *cptr, CONST char *fnam, int flag)
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int checksum;
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if (match_ext(fnam, "card")) {
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fgets(buffer, 100, fileref);
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addr = 0;
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addr = 020;
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while (fgets(buffer, 100, fileref)) {
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/* Convert bits into image */
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memset(image, 0, sizeof(image));
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@ -235,7 +246,9 @@ sim_load(FILE * fileref, CONST char *cptr, CONST char *fnam, int flag)
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fprintf(stderr, "Char %c: %s", buffer[j], buffer);
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return SCPE_FMT;
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}
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fprintf(stderr, "'%c' %02o ", buffer[j], image[j]);
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}
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fprintf(stderr, "\n\r");
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for (j = 0; j < 64; ) {
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data = 0;
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for (k = 0; k < 4; k++)
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@ -245,6 +258,7 @@ sim_load(FILE * fileref, CONST char *cptr, CONST char *fnam, int flag)
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M[addr++] = data;
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}
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}
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return SCPE_OK;
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} else if (match_ext(fnam, "txt")) {
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while (fgets(buffer, 100, fileref)) {
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@ -116,8 +116,8 @@ CONST char *ptp_description (DEVICE *dptr);
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DIB ptp_dib = { CHAR_DEV, &ptp_cmd, &ptp_nsi_cmd, &ptp_nsi_status };
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UNIT ptp_unit[] = {
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{ UDATA (&ptp_svc, UNIT_PTP(6), 0), 10000 },
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{ UDATA (&ptp_svc, UNIT_PTP(7), 0), 10000 },
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{ UDATA (&ptp_svc, UNIT_PTP(8), 0), 10000 },
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{ UDATA (&ptp_svc, UNIT_PTP(9), 0), 10000 },
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};
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@ -31,6 +31,8 @@
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#define NUM_DEVS_PTR 0
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#endif
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#if (NUM_DEVS_PTR > 0)
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#define PP_V_MODE (UNIT_V_UF + 0)
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#define PP_M_MODE (1 << PP_V_MODE)
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#define UNIT_V_TYPE (UNIT_V_UF + 1)
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@ -43,7 +45,6 @@
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#define PP_MODE_7B 0
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#define PP_MODE_7P 1
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#define CMD u3
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#define STATUS u4
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#define HOLD u5
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@ -66,8 +67,6 @@
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#define BETA_SHIFT 075
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#define DELTA_SHIFT 076
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#if (NUM_DEVS_PTR > 0)
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#define T1915_1 0
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#define T1915_2 1
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#define T1916_1 2
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