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SEL32: Adjust polling rate for ethernet and com devices.

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SEL32: Update doc with latest disk drive specifications.
SEL32: continue code cleanup.
This commit is contained in:
James C. Bevier 2021-12-02 14:41:15 -07:00
parent e300fe81bf
commit 19e8d17334
4 changed files with 19 additions and 8 deletions
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21
SEL32/sel32_com.c
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@ -31,9 +31,14 @@
/* Constants */
#define COM_LINES 8 /* lines defined */
#define COML_WAIT 500
//Change from 500 to 5000 12/02/2021
//Change from 5000 to 4000 12/02/2021
//#define COML_WAIT 500
#define COML_WAIT 4000
//Change from 1000 to 5000 12/02/2021
//#define COM_WAIT 5000
#define COM_WAIT 1000
//#define COM_WAIT 1000
#define COM_WAIT 5000
#define COM_NUMLIN com_desc.lines /* curr # lines */
#define COMC 0 /* channel thread */
@ -593,7 +598,7 @@ t_stat coml_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
chan_write_byte(chsa, &ch); /* write status */
/* byte 2 modem status */
// SNS_DELDSR will be set if just connected, clear at end
// SNS_DELDSR will be set if just connected, clear at end
ch = (uptr->SNS >> 8) & 0xff; /* CTS & DSR bits in byte 2 */
chan_write_byte(chsa, &ch); /* write status */
@ -946,7 +951,9 @@ t_stat comc_srv(UNIT *uptr)
sim_debug(DEBUG_DETAIL, &com_dev,
"comc_srv POLL DONE on chsa %04x\n", chsa);
/* this says to use 200, but simh really uses 50000 for cnt */
return sim_clock_coschedule(uptr, 200); /* continue poll */
/* changed 12/02/2021 from 200 to 5000 */
// return sim_clock_coschedule(uptr, 200); /* continue poll */
return sim_clock_coschedule(uptr, 5000); /* continue poll */
// return sim_activate(uptr, 10000); /* continue poll */
// return sim_activate(uptr, 5000); /* continue poll */
}
@ -1049,7 +1056,8 @@ t_stat comi_srv(UNIT *uptr)
if (uptr->CNT == com_data[ln].incnt) { /* input empty */
uptr->CMD &= ~COM_INPUT; /* no input available */
}
sim_activate(uptr, uptr->wait); /* wait */
/* change 02DEC21*/ sim_activate(uptr, uptr->wait); /* wait */
// change 02DEC21*/ sim_clock_coschedule(uptr, 1000); /* continue poll */
return SCPE_OK;
}
/* command is completed */
@ -1063,7 +1071,8 @@ t_stat comi_srv(UNIT *uptr)
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
}
}
sim_activate(uptr, uptr->wait); /* wait */
// change 02DEC21 sim_activate(uptr, uptr->wait); /* wait */
/* change 02DEC21*/ sim_clock_coschedule(uptr, 1000); /* continue poll */
return SCPE_OK;
}
/* not connected, so dump chars on ground */

4
SEL32/sel32_ec.c
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@ -1144,7 +1144,9 @@ wr_end:
//XX sim_clock_coschedule(uptr, 1500); /* continue poll */
//HH sim_activate(uptr, 1511); /* continue poll */
/* this is OK for mode 0, 1, 2, 3 */
sim_activate(uptr, 2511); /* continue poll */
//12dec21 sim_activate(uptr, 2511); /* continue poll */
/* this is really a 50000 cnt poll by simh */
sim_clock_coschedule(uptr, 1000); /* continue poll */
return SCPE_OK;
}
/* get queue length */

2
SEL32/sel32_hsdp.c
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@ -501,7 +501,7 @@ hsdp_type[] =
/* Class F Disc Devices */
/* For MPX */
{"MH040", 5, 192, 20, 407, 411, 0x40}, /* 0 411 40M XXXX */
{"MH080", 5, 192, 22, 819, 823, 0x40}, /* 1 823 80M 8138 */
{"MH080", 5, 192, 20, 819, 823, 0x40}, /* 1 823 80M 8138 */
{"MH160", 10, 192, 20, 819, 823, 0x40}, /* 2 823 160M 8148 */
{"MH300", 19, 192, 20, 819, 823, 0x40}, /* 3 823 300M 9346 */
{"MH337", 10, 192, 45, 819, 823, 0x40}, /* 4 823 337M 8887 DP337 */

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doc/sel32_doc.doc
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