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KA10: Fixes fro 340 display.

This commit is contained in:
Richard Cornwell 2020-03-16 19:39:21 -04:00
commit 2a9ecf0865

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@ -117,7 +117,7 @@ extern uint64 SW; /* switch register */
* number of DPY_CYCLES to delay int
* too small and host CPU doesn't run enough!
*/
#define INT_COUNT (500/DPY_CYCLE_US)
#define INT_COUNT (100/DPY_CYCLE_US)
#define STAT_REG u3
#define INT_COUNTDOWN u4
@ -181,10 +181,23 @@ const char *dpy_description (DEVICE *dptr)
/* until it's done just one place! */
static void dpy_set_int_done(UNIT *uptr)
{
uptr->STAT_REG |= CONI_INT_DONE;
uptr->INT_COUNTDOWN = INT_COUNT;
}
/* update interrupt request */
static void check_interrupt (UNIT *uptr)
{
if (uptr->STAT_REG & CONI_INT_SPEC) {
uint32 sc = uptr->STAT_REG & CONX_SC;
set_interrupt(DPY_DEVNUM, sc >> CONX_SC_SHIFT);
} else if (uptr->STAT_REG & CONI_INT_DONE) {
uint32 dc = uptr->STAT_REG & CONX_DC;
set_interrupt(DPY_DEVNUM, dc>>CONX_DC_SHIFT);
} else {
clr_interrupt(DPY_DEVNUM);
}
}
/* return true if display not stopped */
int dpy_update_status (UNIT *uptr, ty340word status, int done)
{
@ -199,12 +212,7 @@ int dpy_update_status (UNIT *uptr, ty340word status, int done)
/* XXX also set in "rfd" callback: decide! */
dpy_set_int_done(uptr);
}
if (uptr->STAT_REG & CONI_INT_SPEC) {
uint32 sc = uptr->STAT_REG & CONX_SC;
if (sc) { /* PI channel set? */
set_interrupt(DPY_DEVNUM, sc >> CONX_SC_SHIFT);
}
}
check_interrupt(uptr);
return running;
}
@ -287,12 +295,8 @@ t_stat dpy_svc (UNIT *uptr)
display_age(DPY_CYCLE_US, 0); /* age the display */
if (uptr->INT_COUNTDOWN && --uptr->INT_COUNTDOWN == 0) {
if (uptr->STAT_REG & CONI_INT_DONE) { /* delayed int? */
uint32 dc = uptr->STAT_REG & CONX_DC;
if (dc) { /* PI channel set? */
set_interrupt(DPY_DEVNUM, dc>>CONX_DC_SHIFT);
}
}
uptr->STAT_REG |= CONI_INT_DONE;
check_interrupt (uptr);
}
return SCPE_OK;
}