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IBM360: General cleanup of storage protection.

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This commit is contained in:
Richard Cornwell
2020-03-09 00:00:45 -04:00
parent 179f859c4d
commit 49c5feeb43
10 changed files with 249 additions and 184 deletions
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1
IBM360/ibm360_cdp.c
View File

@@ -115,7 +115,6 @@ DEVICE cdp_dev = {
uint8 cdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
DEVICE *dptr = find_dev_from_unit(uptr);
int unit = (uptr - dptr->units);
uint8 ch;
if ((uptr->u3 & (CDP_CARD|CDP_CMDMSK)) != 0) {
if ((uptr->flags & UNIT_ATT) != 0)

2
IBM360/ibm360_cdr.c
View File

@@ -110,7 +110,6 @@ DEVICE cdr_dev = {
uint8 cdr_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
DEVICE *dptr = find_dev_from_unit(uptr);
int unit = (uptr - dptr->units);
uint8 ch;
if ((uptr->u3 & CDR_CMDMSK) != 0) {
if ((uptr->flags & UNIT_ATT) != 0)
@@ -249,7 +248,6 @@ t_stat
cdr_boot(int32 unit_num, DEVICE * dptr)
{
UNIT *uptr = &dptr->units[unit_num];
t_stat r;
if ((uptr->flags & UNIT_ATT) == 0)
return SCPE_UNATT; /* attached? */

49
IBM360/ibm360_chan.c
View File

@@ -410,7 +410,6 @@ int
chan_read_byte(uint16 addr, uint8 *data) {
int chan = find_subchan(addr);
int byte;
int k;
/* Abort if we have any errors */
if (chan < 0)
@@ -466,9 +465,7 @@ chan_read_byte(uint16 addr, uint8 *data) {
int
chan_write_byte(uint16 addr, uint8 *data) {
int chan = find_subchan(addr);
int byte;
int offset;
int k;
uint32 mask;
/* Abort if we have any errors */
@@ -685,7 +682,6 @@ startio(uint16 addr) {
int chan = find_subchan(addr);
DIB *dibp = dev_unit[addr];
UNIT *uptr;
uint8 status;
/* Find channel this device is on, if no none return cc=3 */
if (chan < 0 || dibp == 0) {
@@ -879,7 +875,7 @@ int haltio(uint16 addr) {
int chan = find_subchan(addr);
DIB *dibp = dev_unit[addr];
UNIT *uptr;
uint8 status;
int cc;
/* Find channel this device is on, if no none return cc=3 */
if (chan < 0 || dibp == 0) {
@@ -894,16 +890,34 @@ int haltio(uint16 addr) {
sim_debug(DEBUG_CMD, &cpu_dev, "HIO %x %x %x %x\n", addr, chan,
ccw_cmd[chan], ccw_flags[chan]);
/* If channel busy, set end of buffer, return cc=2 */
if (ccw_cmd[chan]) {
chan_byte[chan] = BUFF_CHNEND;
return 2;
/* If any error pending save csw and return cc=1 */
if (chan_status[chan] & (STATUS_PCI|STATUS_ATTN|STATUS_CHECK|\
STATUS_PROT|STATUS_PCHK|STATUS_EXPT)) {
sim_debug(DEBUG_CMD, &cpu_dev, "HIO %x %x %x cc=0\n", addr, chan,
chan_status[chan]);
return 0;
}
/* Not executing a command, issue halt if available */
if (dibp->halt_io != NULL)
chan_status[chan] = dibp->halt_io(uptr) << 8;
return 0;
if (dibp->halt_io != NULL) {
/* Let device do it's thing */
cc = dibp->halt_io(uptr);
sim_debug(DEBUG_CMD, &cpu_dev, "HIO %x %x cc=%d\n", addr, chan, cc);
if (cc == 1)
M[0x44 >> 2] = (((uint32)chan_status[chan]) << 16) |
(M[0x44 >> 2] & 0xffff);
return cc;
}
/* If channel active, tell it to terminate */
if (ccw_cmd[chan])
chan_byte[chan] = BUFF_CHNEND;
/* Store CSW and return 1. */
sim_debug(DEBUG_CMD, &cpu_dev, "HIO %x %x cc=1\n", addr, chan);
M[0x44 >> 2] = (((uint32)chan_status[chan]) << 16) |
(M[0x44 >> 2] & 0xffff);
return 1;
}
/*
@@ -934,7 +948,6 @@ t_stat chan_boot(uint16 addr, DEVICE *dptyr) {
int chan = find_subchan(addr);
DIB *dibp = dev_unit[addr];
UNIT *uptr;
uint8 status;
int i;
if (chan < 0 || dibp == 0)
@@ -1006,7 +1019,7 @@ scan_chan(uint16 mask, int irq_en) {
sim_debug(DEBUG_EXP, &cpu_dev, "Scan(%x %x %x %x) end\n", i,
chan_status[i], imask, mask);
if ((chan_status[i] & STATUS_DEND) != 0 &&
(imask & mask) != 0 || loading != 0) {
((imask & mask) != 0 || loading != 0)) {
pend = chan_dev[i];
break;
}
@@ -1059,7 +1072,7 @@ scan_chan(uint16 mask, int irq_en) {
t_stat
chan_set_devs()
{
int i, j;
uint32 i, j;
for(i = 0; i < MAX_DEV; i++) {
dev_unit[i] = NULL; /* Device pointer */
@@ -1070,7 +1083,6 @@ chan_set_devs()
UNIT *uptr = dptr->units;
DIB *dibp = (DIB *) dptr->ctxt;
int addr;
int chan;
/* If no DIB, not channel device */
if (dibp == NULL)
@@ -1100,8 +1112,6 @@ set_dev_addr(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
DIB *dibp;
t_value newdev;
t_stat r;
int num;
int type;
int i;
int devaddr;
@@ -1122,7 +1132,7 @@ set_dev_addr(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
if (r != SCPE_OK)
return r;
if ((newdev >> 8) > channels)
if ((newdev >> 8) > (t_value)channels)
return SCPE_ARG;
if (newdev >= MAX_DEV)
@@ -1177,7 +1187,6 @@ t_stat
show_dev_addr(FILE * st, UNIT * uptr, int32 v, CONST void *desc)
{
DEVICE *dptr;
DIB *dibp;
int addr;

13
IBM360/ibm360_com.c
View File

@@ -238,7 +238,6 @@ uint8 coml_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
uint16 addr = GET_UADDR(uptr->u3);
DEVICE *dptr = find_dev_from_unit(uptr);
int unit = (uptr - dptr->units);
uint8 ch;
sim_debug(DEBUG_CMD, dptr, "CMD unit=%d %x\n", unit, cmd);
if ((uptr->u3 & 0xff) != 0) {
@@ -274,17 +273,18 @@ uint8 coml_haltio(UNIT *uptr) {
DEVICE *dptr = find_dev_from_unit(uptr);
int unit = (uptr - dptr->units);
int cmd = uptr->u3 & 0xff;
uint8 ch;
sim_debug(DEBUG_CMD, dptr, "HLTIO unit=%d %x\n", unit, cmd);
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return 3;
switch (cmd) {
case 0:
case CMD_DIS: /* Disable line */
case CMD_DIAL: /* Dial call */
case 0x4:
/* Short commands nothing to do */
return 0;
/* Short commands nothing to do */
break;
case CMD_INH: /* Read data without timeout */
case CMD_RD: /* Read in data from com line */
@@ -302,7 +302,7 @@ uint8 coml_haltio(UNIT *uptr) {
uptr->u3 &= ~0xffff;
break;
}
return SNS_CHNEND|SNS_DEVEND;
return 1;
}
/* Handle per unit commands */
@@ -476,7 +476,6 @@ com_reset(DEVICE * dptr)
void
coml_ini(UNIT * uptr, t_bool f)
{
UNIT *srv;
}
t_stat
@@ -502,7 +501,6 @@ com_detach(UNIT * uptr)
{
t_stat r;
int i;
UNIT *srv;
for (i = 0; i< com_desc.lines; i++) {
(void)tmxr_set_get_modem_bits(&com_ldsc[i], 0, TMXR_MDM_DTR, NULL);
@@ -517,7 +515,6 @@ com_detach(UNIT * uptr)
t_stat com_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
const char *cptr)
{
int i;
fprint_set_help (st, dptr);
fprint_show_help (st, dptr);
return SCPE_OK;

17
IBM360/ibm360_con.c
View File

@@ -116,7 +116,6 @@ con_ini(UNIT *uptr, t_bool f) {
uint8 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
int u = (uptr - con_unit);
uint8 ch;
if ((uptr->u3 & CON_MSK) != 0)
return SNS_BSY;
@@ -171,11 +170,8 @@ uint8 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
break;
case 4: /* Sense */
sim_debug(DEBUG_CMD, &con_dev, "%d: Cmd SNS %02x\n", u, uptr->u5);
/* Check if request pending */
ch = uptr->u5;
chan_write_byte(GET_UADDR(uptr->u3), &ch);
return SNS_CHNEND|SNS_DEVEND;
uptr->u3 |= cmd & CON_MSK;
return 0;
default: /* invalid command */
uptr->u5 |= SNS_CMDREJ;
@@ -199,6 +195,15 @@ con_srv(UNIT *uptr) {
switch (cmd) {
case 0x4:
sim_debug(DEBUG_CMD, &con_dev, "%d: Cmd SNS %02x\n", u, uptr->u5);
/* Check if request pending */
ch = uptr->u5;
chan_write_byte(addr, &ch);
chan_end(addr, SNS_CHNEND|SNS_DEVEND);
uptr->u3 &= ~(CON_MSK);
break;
case CON_WR:
case CON_ACR:
if (chan_read_byte(addr, &ch)) {

295
IBM360/ibm360_cpu.c
View File

@@ -176,6 +176,7 @@ int timer_tics; /* Access count for TOD */
#define B1(x) (((x) >> 12) & 0xf)
#define D1(x) ((x) & 0xfff)
#define X2(x) R2(x)
#define NEG(x) (uint32)(-(int32)(x))
#define PTE_LEN 0xff000000 /* Page table length */
#define PTE_ADR 0x00fffffe /* Address of table */
@@ -505,7 +506,7 @@ int TransAddr(uint32 va, uint32 *pa) {
seg = (page & 0xff00) << 4;
/* Quick check if TLB correct */
entry = tlb[page & 0xff];
fprintf(stderr, "translatex: %08x %08x\r\n", entry, page);
// fprintf(stderr, "translatex: %08x %08x\r\n", entry, page);
if ((entry & TLB_VALID) != 0 && ((entry ^ seg) & TLB_SEG) == 0) {
*pa = (va & page_mask) | ((entry & TLB_PHY) << page_shift);
if (va >= MEMSIZE) {
@@ -517,7 +518,7 @@ int TransAddr(uint32 va, uint32 *pa) {
/* TLB not correct, try loading correct entry */
seg = (va >> seg_shift) & seg_mask; /* Segment number to word address */
page = (va >> page_shift) & page_index;
fprintf(stderr, "translate: %08x %03x %03x\r\n", va, seg, page);
// fprintf(stderr, "translate: %08x %03x %03x\r\n", va, seg, page);
/* Check address against lenght of segment table */
if (seg > seg_len) {
if ((cpu_unit[0].flags & FEAT_370) == 0)
@@ -529,14 +530,14 @@ int TransAddr(uint32 va, uint32 *pa) {
return 1;
}
addr = (((seg << 2) + seg_addr) & AMASK);
fprintf(stderr, "translate0: %08x\r\n", addr);
// fprintf(stderr, "translate0: %08x\r\n", addr);
if (addr >= MEMSIZE) {
storepsw(OPPSW, IRC_ADDR);
return 1;
}
/* Get pointer to page table */
entry = M[addr >> 2];
fprintf(stderr, "translate1: %08x\r\n", entry);
// fprintf(stderr, "translate1: %08x\r\n", entry);
/* Check if entry valid and in correct length */
if (entry & PTE_VALID || page > (entry >> 24)) {
if ((cpu_unit[0].flags & FEAT_370) == 0)
@@ -550,7 +551,7 @@ int TransAddr(uint32 va, uint32 *pa) {
/* Now we need to fetch the actual entry */
addr = (entry & PTE_ADR) + (page << 1);
addr &= AMASK;
fprintf(stderr, "translate2: %08x\r\n", entry);
// fprintf(stderr, "translate2: %08x\r\n", entry);
if (addr >= MEMSIZE) {
storepsw(OPPSW, IRC_ADDR);
return 1;
@@ -558,7 +559,7 @@ int TransAddr(uint32 va, uint32 *pa) {
entry = M[addr >> 2];
entry >>= (addr & 2) ? 0 : 16;
entry &= 0xffff;
fprintf(stderr, "translate3: %08x\r\n", entry);
// fprintf(stderr, "translate3: %08x\r\n", entry);
if ((entry & pte_mbz) != 0) {
if ((cpu_unit[0].flags & FEAT_370) == 0)
@@ -586,7 +587,7 @@ int TransAddr(uint32 va, uint32 *pa) {
seg = (page & 0xff00) << 4;
tlb[page & 0xff] = entry;
*pa = (va & page_mask) | ((entry & TLB_PHY) << page_shift);
fprintf(stderr, "translatef: %08x\r\n", *pa);
// fprintf(stderr, "translatef: %08x\r\n", *pa);
if (va >= MEMSIZE) {
storepsw(OPPSW, IRC_ADDR);
return 1;
@@ -600,51 +601,54 @@ int TransAddr(uint32 va, uint32 *pa) {
* success.
*/
int ReadFull(uint32 addr, uint32 *data) {
uint32 temp;
uint32 pa;
int offset;
uint8 k;
/* Validate address */
if (TransAddr(addr, &addr))
if (TransAddr(addr, &pa))
return 1;
offset = addr & 0x3;
addr >>= 2;
/* Check storage key */
if (st_key != 0) {
uint8 k;
if ((cpu_unit[0].flags & FEAT_PROT) == 0) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
k = key[addr >> 9];
k = key[pa >> 11];
if ((k & 0x8) != 0 && (k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
key[addr >> 9] |= 0x4;
key[pa >> 11] |= 0x4;
}
*data = M[addr];
offset = pa & 0x3;
if (offset != 0 && (cpu_unit[0].flags & FEAT_STOR) == 0) {
storepsw(OPPSW, IRC_SPEC);
return 1;
}
pa >>= 2;
*data = M[pa];
if (offset != 0) {
if ((cpu_unit[0].flags & FEAT_STOR) == 0) {
storepsw(OPPSW, IRC_SPEC);
return 1;
}
temp = addr + 1;
/* Check if possible next page */
if ((temp & 0x3ff) == 0) {
if (TransAddr(temp << 2, &temp))
uint32 temp;
uint8 k;
temp = pa + 4;
if ((temp & 0x7FC) == 0) {
/* Check if possible next page */
if (TransAddr(addr + 4, &temp))
return 1;
temp >>= 2;
}
if ((temp & 0x1ff) == 0 && st_key != 0) {
k = key[temp >> 9];
if ((k & 0x8) != 0 && (k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
/* Check access protection */
if (st_key != 0) {
k = key[temp >> 11];
if ((k & 0x8) != 0 && (k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
}
}
temp >>= 2;
temp = M[temp];
*data <<= 8 * offset;
temp >>= 8 * (4 - offset);
@@ -698,7 +702,6 @@ int WriteFull(uint32 addr, uint32 data) {
int offset;
uint32 pa;
uint32 pa2;
uint8 k;
/* Validate address */
if (TransAddr(addr, &pa))
@@ -718,46 +721,60 @@ int WriteFull(uint32 addr, uint32 data) {
}
offset = pa & 0x3;
pa >>= 2;
if (offset != 0 && (cpu_unit[0].flags & FEAT_STOR) == 0) {
storepsw(OPPSW, IRC_SPEC);
return 1;
}
/* Check storage key */
if (st_key != 0) {
uint8 k;
if ((cpu_unit[0].flags & FEAT_PROT) == 0) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
k = key[pa >> 9];
k = key[pa >> 11];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
key[pa >> 9] |= 0x6;
key[pa >> 11] |= 0x6;
}
pa2 = pa + 4;
/* Check if we handle unaligned access */
if (offset != 0) {
if ((cpu_unit[0].flags & FEAT_STOR) == 0) {
storepsw(OPPSW, IRC_SPEC);
return 1;
if (offset != 0 && (pa2 & 0x7FC) == 0) {
addr += 4;
/* Check if in storage area */
if (per_en && (cregs[9] & 0x20000000) != 0) {
if (cregs[10] <= cregs[11]) {
if (addr >= cregs[10] && addr <= cregs[11]) {
per_code |= 0x2000;
}
} else {
if (addr >= cregs[11] || addr <= cregs[10]) {
per_code |= 0x2000;
}
}
}
/* Check if new page or new protection zone */
if ((pa & 0x1ff) == 0x1ff) {
/* Validate address */
if (TransAddr(addr + 4, &pa2))
/* Validate address */
if (TransAddr(addr, &pa2))
return 1;
/* Check against storage key */
if (st_key != 0) {
uint8 k;
k = key[pa2 >> 11];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
pa2 >>= 2;
if (st_key != 0) {
k = key[(pa2) >> 9];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
key[pa2 >> 9] |= 0x6;
}
} else
pa2 = pa + 1;
key[pa2 >> 11] |= 0x6;
}
}
pa >>= 2;
pa2 >>= 2;
switch (offset) {
case 0:
@@ -788,30 +805,42 @@ int WriteFull(uint32 addr, uint32 data) {
int WriteByte(uint32 addr, uint32 data) {
uint32 mask;
uint32 pa;
uint8 k;
int offset;
/* Validate address */
if (TransAddr(addr, &pa))
return 1;
offset = 8 * (3 - (pa & 0x3));
pa >>= 2;
/* Check if in storage area */
if (per_en && (cregs[9] & 0x20000000) != 0) {
if (cregs[10] <= cregs[11]) {
if (addr >= cregs[10] && addr <= cregs[11]) {
per_code |= 0x2000;
}
} else {
if (addr >= cregs[11] || addr <= cregs[10]) {
per_code |= 0x2000;
}
}
}
/* Check storage key */
if (st_key != 0) {
uint8 k;
if ((cpu_unit[0].flags & FEAT_PROT) == 0) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
k = key[pa >> 9];
k = key[pa >> 11];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
key[pa >> 9] |= 0x6;
key[pa >> 11] |= 0x6;
}
offset = 8 * (3 - (pa & 0x3));
pa >>= 2;
mask = 0xff;
data &= mask;
data <<= offset;
@@ -827,15 +856,25 @@ int WriteHalf(uint32 addr, uint32 data) {
uint32 pa;
uint32 pa2;
int offset;
int o;
/* Validate address */
if (TransAddr(addr, &pa))
return 1;
offset = pa & 0x3;
pa >>= 2;
/* Check if in storage area */
if (per_en && (cregs[9] & 0x20000000) != 0) {
if (cregs[10] <= cregs[11]) {
if (addr >= cregs[10] && addr <= cregs[11]) {
per_code |= 0x2000;
}
} else {
if (addr >= cregs[11] || addr <= cregs[10]) {
per_code |= 0x2000;
}
}
}
offset = pa & 0x3;
/* Check if we handle unaligned access */
if ((offset & 1) != 0 && (cpu_unit[0].flags & FEAT_STOR) == 0) {
storepsw(OPPSW, IRC_SPEC);
@@ -844,36 +883,53 @@ int WriteHalf(uint32 addr, uint32 data) {
/* Check storage key */
if (st_key != 0) {
uint8 k;
if ((cpu_unit[0].flags & FEAT_PROT) == 0) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
k = key[pa >> 9];
k = key[pa >> 11];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
key[pa >> 9] |= 0x6;
key[pa >> 11] |= 0x6;
}
if (offset == 3) {
/* Check if new page or new protection zone */
if ((pa & 0x1ff) == 0x1ff) {
/* Validate address */
if (TransAddr(addr + 4, &pa2))
return 1;
pa2 >>= 2;
if (st_key != 0) {
k = key[(pa2) >> 9];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
pa2 = pa + 4;
if (offset == 3 && (pa2 & 0x7FC) == 0) {
addr += 4;
/* Check if in storage area */
if (per_en && (cregs[9] & 0x20000000) != 0) {
if (cregs[10] <= cregs[11]) {
if (addr >= cregs[10] && addr <= cregs[11]) {
per_code |= 0x2000;
}
} else {
if (addr >= cregs[11] || addr <= cregs[10]) {
per_code |= 0x2000;
}
key[pa2 >> 9] |= 0x6;
}
} else
pa2 = pa + 1;
}
/* Validate address */
if (TransAddr(addr, &pa2))
return 1;
/* Check against storage key */
if (st_key != 0) {
uint8 k;
k = key[(pa2) >> 11];
if ((k & 0xf0) != st_key) {
storepsw(OPPSW, IRC_PROT);
return 1;
}
key[pa2 >> 11] |= 0x6;
}
}
pa >>= 2;
pa2 >>= 2;
mask = 0xffff;
data &= mask;
@@ -901,7 +957,6 @@ int WriteHalf(uint32 addr, uint32 data) {
}
t_stat
sim_instr(void)
{
@@ -922,7 +977,7 @@ sim_instr(void)
uint8 zone;
uint16 irq;
int e1, e2;
int temp, temp2;
int temp;
#ifdef USE_64BIT
t_uint64 src1L;
t_uint64 src2L;
@@ -1318,10 +1373,10 @@ exe:
} else if (addr1 >= MEMSIZE) {
storepsw(OPPSW, IRC_ADDR);
} else if (cpu_unit[0].flags & FEAT_PROT) {
if (TransAddr(addr1, &addr2))
break;
/* 370 mask = 0xfe */
key[addr2 >> 11] = src1 & 0xf8;
if ((cpu_unit[0].flags & FEAT_370) != 0)
key[addr1 >> 11] = src1 & 0xfe;
else
key[addr1 >> 11] = src1 & 0xf8;
}
break;
@@ -1336,11 +1391,11 @@ exe:
} else if (addr1 >= MEMSIZE) {
storepsw(OPPSW, IRC_ADDR);
} else {
if (TransAddr(addr1, &addr2))
break;
/* 360 mask = 0xf8 */
dest &= 0xffffff00;
dest |= key[addr2 >> 11];
if ((cpu_unit[0].flags & FEAT_370) != 0)
dest |= key[addr1 >> 11] & 0xfe;
else
dest |= key[addr1 >> 11] & 0xf8;
regs[reg1] = dest;
per_mod |= 1 << reg1;
}
@@ -1460,7 +1515,7 @@ exe:
case OP_LCR:
if (dest == MSIGN)
goto set_cc3;
dest = -dest;
dest = NEG(dest);
/* Fall through */
case OP_LTR:
@@ -1472,7 +1527,7 @@ set_cc:
case OP_LNR:
if ((dest & MSIGN) == 0)
dest = -dest;
dest = (dest ^ FMASK) + 1;
goto set_cc;
case OP_LA:
@@ -1498,7 +1553,7 @@ set_cc:
case OP_S:
case OP_SR:
case OP_SH:
src2 = -src2;
src2 = NEG(src2);
/* Fall through */
case OP_A:
@@ -1519,7 +1574,7 @@ set_cc3:
case OP_SL:
case OP_SLR:
src2 = -src2;
src2 = NEG(src2);
/* Fall through */
case OP_AL:
@@ -1556,16 +1611,16 @@ set_cc3:
if (src1 & MSIGN) {
fill = 1;
src1 = -src1;
src1 = NEG(src1);
}
if (src2 & MSIGN) {
fill ^= 1;
src2 = -src2;
src2 = NEG(src2);
}
#ifdef USE_64BIT
src1L = ((t_uint64)src1) * ((t_uint64)src2);
if (fill)
src1L = -src1L;
src1L = NEG(src1L);
if (op != OP_MH) {
STDBL(reg1, src1L);
} else {
@@ -1618,11 +1673,11 @@ set_cc3:
if (src1L & MSIGNL) {
fill = 3;
src1L = -src1L;
src1L = NEG(src1L);
}
if (src2 & MSIGN) {
fill ^= 1;
src2 = -src2;
src2 = NEG(src2);
}
src2L = src1L % (t_uint64)src2;
src1L = src1L / (t_uint64)src2;
@@ -2104,7 +2159,6 @@ save_dbl:
uint32 page;
uint32 entry;
fprintf(stderr, "LRA0: %08x\r\n", addr1);
/* RX in RS range */
if (X2(reg) != 0)
addr1 = (addr1 + regs[X2(reg)]) & AMASK;
@@ -2161,7 +2215,6 @@ save_dbl:
}
addr2 = (addr1 & page_mask) | ((entry & TLB_PHY) << 8);
fprintf(stderr, "LRA7: %08x\r\n",addr2);
cc = 0;
regs[reg1] = addr2;
per_mod |= 1 << reg1;
@@ -2398,7 +2451,7 @@ save_dbl:
}
/* Twos compliment if needed */
if (fill == 0xB || fill == 0xD)
dest = -dest;
dest = NEG(dest);
regs[reg1] = dest;
break;
@@ -2408,7 +2461,7 @@ save_dbl:
src1 = 0;
src1h = 0;
if (dest & MSIGN) { /* Save sign */
dest = -dest;
dest = NEG(dest);
fill = 1;
} else
fill = 0;
@@ -2827,11 +2880,11 @@ fprintf(stderr, "Set TOD %016llx\r\n", tod_clock);
storepsw(OPPSW, IRC_OPR);
goto supress;
case 0x13: /* RRB */
if ((cpu_unit[0].flags & FEAT_DAT) == 0) {
storepsw(OPPSW, IRC_OPR);
goto supress;
}
/* Set storage block reference bit to zero */
addr1 >>= 1;
dest = key[addr1];
key[addr1] &= 0xfd; /* Clear reference bit */
cc = (dest >> 1) & 03;
break;
default:
storepsw(OPPSW, IRC_OPR);
@@ -2979,8 +3032,8 @@ fprintf(stderr, "Set TOD %016llx\r\n", tod_clock);
if (ReadFull(addr1, &dest))
goto supress;
cregs[reg1] = dest;
sim_debug(DEBUG_CDATA, &cpu_dev,"Loading: CR %x %08x IC=%08x %x\n\r", reg1, dest, PC, reg);
fprintf(stderr, "Loading: CR %x %08x IC=%08x %x\n\r", reg1, dest, PC, reg);
sim_debug(DEBUG_CDATA, &cpu_dev,"Loading: CR %x %06x %08x IC=%08x %x\n\r", reg1, addr1, dest, PC, reg);
fprintf(stderr, "Loading: CR %x %06x %08x IC=%08x %x\n\r", reg1, addr1, dest, PC, reg);
switch (reg1) {
case 0x0: /* General controll register */
/* CR0 values
@@ -5559,15 +5612,24 @@ dec_div(int op, uint32 addr1, uint8 len1, uint32 addr2, uint8 len2)
t_stat cpu_reset (DEVICE *dptr)
{
int i;
sysmsk = st_key = cc = pmsk = irqcode = flags = irqaddr = loading = 0;
dat_en = irq_en = ext_en = per_en = 0;
chan_set_devs();
/* Create memory array if it does not exist. */
if (M == NULL) { /* first time init? */
sim_brk_types = sim_brk_dflt = SWMASK ('E');
M = (uint32 *) calloc (((uint32) MEMSIZE) >> 2, sizeof (uint32));
if (M == NULL)
return SCPE_MEM;
}
/* Set up channels */
chan_set_devs();
sysmsk = irqcode = irqaddr = loading = 0;
st_key = cc = pmsk = ec_mode = interval_irq = flags = 0;
dat_en = irq_en = ext_en = per_en = 0;
clk_state = CLOCK_UNSET;
for (i = 0; i < 256; i++)
tlb[i] = 0;
for (i = 0; i < 4096; i++)
key[i] = 0;
for (i = 0; i < 16; i++)
cregs[i] = 0;
return SCPE_OK;
@@ -5683,7 +5745,7 @@ if ((mc != 0) && !get_yn ("Really truncate memory [N]?", FALSE))
nM = (uint32 *) calloc (val >> 2, sizeof (uint32));
if (nM == NULL)
return SCPE_MEM;
clim = (val < MEMSIZE)? val >> 2: max;
clim = ((t_addr)val < MEMSIZE)? val >> 2: max;
for (i = 0; i < clim; i++)
nM[i] = M[i];
free (M);
@@ -5753,7 +5815,6 @@ cpu_show_hist(FILE * st, UNIT * uptr, int32 val, CONST void *desc)
for (k = 0; k < lnt; k++) { /* print specified */
h = &hst[(++di) % hst_lnt]; /* entry pointer */
if (h->pc & HIST_PC) { /* instruction? */
int i;
fprintf(st, "%06x %06x %06x %08x %08x %08x %1x %04x ",
h->pc & PAMASK, h->addr1 & PAMASK, h->addr2 & PAMASK,
h->src1, h->src2, h->dest, h->cc, h->inst[0]);
@@ -5770,12 +5831,10 @@ cpu_show_hist(FILE * st, UNIT * uptr, int32 val, CONST void *desc)
fputc('\n', st); /* end line */
} /* end else instruction */
if (h->pc & HIST_LPW) { /* load PSW */
int i;
fprintf(st, " LPSW %06x %08x %08x\n", h->pc & PAMASK, h->src1, h->src2);
fprintf(st," LPSW %06x %08x %08x\n", h->pc & PAMASK, h->src1, h->src2);
} /* end else instruction */
if (h->pc & HIST_SPW) { /* load PSW */
int i;
fprintf(st, " SPSW %06x %08x %08x\n", h->pc & PAMASK, h->src1, h->src2);
fprintf(st," SPSW %06x %08x %08x\n", h->pc & PAMASK, h->src1, h->src2);
} /* end else instruction */
} /* end for */
return SCPE_OK;

21
IBM360/ibm360_dasd.c
View File

@@ -185,7 +185,7 @@ struct dasd_t
uint16 tpos; /* Track position */
uint16 rpos; /* Start of current record */
uint16 dlen; /* remaining in data */
uint16 tsize; /* Size of one track include rounding */
uint32 tsize; /* Size of one track include rounding */
uint8 state; /* Current state */
uint8 klen; /* remaining in key */
uint8 filemsk; /* Current file mask */
@@ -196,9 +196,9 @@ struct dasd_t
struct disk_t
{
const char *name; /* Type Name */
unsigned int cyl; /* Number of cylinders */
unsigned int heads; /* Number of heads/cylinder */
unsigned int bpt; /* Max bytes per track */
int cyl; /* Number of cylinders */
int heads; /* Number of heads/cylinder */
int bpt; /* Max bytes per track */
uint8 sen_cnt; /* Number of sense bytes */
uint8 dev_type; /* Device type code */
}
@@ -454,7 +454,8 @@ void dasd_adjpos(UNIT * uptr)
/* Set ourselves to start of track */
data->state = DK_POS_HA;
data->rpos = data->rec = data->count = data->klen = data->dlen = 0;
data->rec = data->klen = 0;
data->rpos = data->count = data->dlen = 0;
data->tstart = (uptr->u4 & 0xff) * data->tsize;
rec = &data->cbuf[data->rpos + data->tstart];
/* Skip forward until we reach pos */
@@ -722,7 +723,7 @@ index:
}
switch (cmd) {
case 0: /* No command, stop tape */
case 0: /* No command */
break;
case 0x14:
case 0x34:
@@ -1559,6 +1560,13 @@ wrckd:
break;
case DK_NOP:
sim_debug(DEBUG_DETAIL, dptr, "NOP=%d %x\n", unit, cmd);
(void)chan_read_byte(addr, &ch);
uptr->u6 = 0;
uptr->u3 &= ~(0xff);
chan_end(addr, SNS_CHNEND|SNS_DEVEND);
break;
case DK_WR_SCKD: /* Write special count, key and data */
default:
@@ -1762,7 +1770,6 @@ dasd_boot(int32 unit_num, DEVICE * dptr)
{
UNIT *uptr = &dptr->units[unit_num];
struct dasd_t *data = (struct dasd_t *)(uptr->up7);
t_stat r;
if ((uptr->flags & UNIT_ATT) == 0)
return SCPE_UNATT; /* attached? */

8
IBM360/ibm360_lpr.c
View File

@@ -118,7 +118,7 @@ DEVICE lpr_dev = {
t_stat
lpr_setlpp(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int i;
t_addr i;
if (cptr == NULL)
return SCPE_ARG;
if (uptr == NULL)
@@ -177,7 +177,7 @@ print_line(UNIT * uptr)
uptr->pos += i;
sim_debug(DEBUG_DETAIL, &lpr_dev, "%s", out);
uptr->u4++;
if (uptr->u4 > uptr->capac) {
if ((t_addr)uptr->u4 > uptr->capac) {
uptr->u4 = 1;
}
@@ -187,8 +187,6 @@ print_line(UNIT * uptr)
uint8 lpr_startcmd(UNIT * uptr, uint16 chan, uint8 cmd)
{
uint8 ch;
if ((uptr->u3 & LPR_CMDMSK) != 0) {
if ((uptr->flags & UNIT_ATT) != 0)
return SNS_BSY;
@@ -258,8 +256,6 @@ lpr_srv(UNIT *uptr) {
print_line(uptr);
uptr->u3 &= ~(LPR_FULL|LPR_CMDMSK);
uptr->u6 = 0;
if (cmd == 0x3)
chan_end(addr, SNS_CHNEND);
set_devattn(addr, SNS_DEVEND);
return SCPE_OK;
}

25
IBM360/ibm360_mt.c
View File

@@ -228,7 +228,6 @@ uint8 mt_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
uint16 addr = GET_UADDR(uptr->u3);
DEVICE *dptr = find_dev_from_unit(uptr);
int unit = (uptr - dptr->units);
uint8 ch;
if (mt_busy[GET_DEV_BUF(dptr->flags)] != 0 || (uptr->u3 & MT_CMDMSK) != 0) {
sim_debug(DEBUG_CMD, dptr, "CMD busy unit=%d %x\n", unit, cmd);
@@ -451,7 +450,7 @@ t_stat mt_srv(UNIT * uptr)
if (uptr->u3 & MT_CONV) {
sim_debug(DEBUG_DATA, dptr, "Read raw data unit=%d %d %02x %02x\n",
unit, uptr->u4, ch, uptr->u6);
if (uptr->u6 == 0 && uptr->u4 < uptr->hwmark) {
if (uptr->u6 == 0 && (t_addr)uptr->u4 < uptr->hwmark) {
uptr->u6 = MT_CONV1 | ch;
sim_activate(uptr, 20);
return SCPE_OK;
@@ -474,7 +473,7 @@ t_stat mt_srv(UNIT * uptr)
if (chan_write_byte(addr, &ch)) {
sim_debug(DEBUG_DATA, dptr, "Read unit=%d EOR\n\r", unit);
/* If not read whole record, skip till end */
if (uptr->u4 < uptr->hwmark) {
if ((t_addr)uptr->u4 < uptr->hwmark) {
/* Send dummy character to force SLI */
chan_write_byte(addr, &ch);
sim_activate(uptr, (uptr->hwmark-uptr->u4) * 20);
@@ -487,7 +486,7 @@ t_stat mt_srv(UNIT * uptr)
} else {
sim_debug(DEBUG_DATA, dptr, "Read data unit=%d %d %02x\n\r",
unit, uptr->u4, ch);
if (uptr->u4 >= uptr->hwmark) { /* In IRG */
if ((t_addr)uptr->u4 >= uptr->hwmark) { /* In IRG */
/* Handle end of record */
uptr->u3 &= ~MT_CMDMSK;
mt_busy[bufnum] &= ~1;
@@ -591,7 +590,7 @@ t_stat mt_srv(UNIT * uptr)
if (uptr->u3 & MT_TRANS)
ch = bcd_to_ebcdic[ch];
if (uptr->u3 & MT_CONV) {
if (uptr->u6 == 0 && uptr->u4 < uptr->hwmark) {
if (uptr->u6 == 0 && (t_addr)uptr->u4 < uptr->hwmark) {
uptr->u6 = MT_CONV1 | ch;
sim_activate(uptr, 20);
return SCPE_OK;
@@ -654,7 +653,7 @@ t_stat mt_srv(UNIT * uptr)
mt_busy[bufnum] &= ~1;
}
break;
case MT_BSR:
switch (uptr->u4 ) {
case 0:
@@ -693,7 +692,7 @@ t_stat mt_srv(UNIT * uptr)
break;
}
break;
case MT_BSF:
switch(uptr->u4) {
case 0:
@@ -732,7 +731,7 @@ t_stat mt_srv(UNIT * uptr)
break;
}
break;
case MT_FSR:
switch(uptr->u4) {
case 0:
@@ -772,7 +771,7 @@ t_stat mt_srv(UNIT * uptr)
break;
}
break;
case MT_FSF:
switch(uptr->u4) {
case 0:
@@ -807,8 +806,7 @@ t_stat mt_srv(UNIT * uptr)
break;
}
break;
case MT_ERG:
switch (uptr->u4) {
case 0:
@@ -834,7 +832,7 @@ t_stat mt_srv(UNIT * uptr)
mt_busy[bufnum] &= ~1;
}
break;
case MT_REW:
if (uptr->u4 == 0) {
uptr->u4 ++;
@@ -847,7 +845,7 @@ t_stat mt_srv(UNIT * uptr)
set_devattn(addr, SNS_DEVEND);
}
break;
case MT_RUN:
if (uptr->u4 == 0) {
uptr->u4 ++;
@@ -910,7 +908,6 @@ t_stat
mt_boot(int32 unit_num, DEVICE * dptr)
{
UNIT *uptr = &dptr->units[unit_num];
t_stat r;
if ((uptr->flags & UNIT_ATT) == 0)
return SCPE_UNATT; /* attached? */

2
IBM360/ibm360_sys.c
View File

@@ -405,8 +405,6 @@ t_opcode soptab[] = {
void fprint_inst(FILE *of, uint16 *val) {
uint8 inst = (val[0] >> 8) & 0xff;
int i;
int l = 1;
t_opcode *tab;
for (tab = optab; tab->name != NULL; tab++) {