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mirror of https://github.com/rcornwell/sims.git synced 2026-01-13 15:27:04 +00:00

KA10: Cleanup code issues for KS byte I/O.

This commit is contained in:
Richard Cornwell 2022-01-19 09:54:06 -05:00
parent 4fa23999ad
commit 5992cc26ed
2 changed files with 23 additions and 15 deletions

View File

@ -94,6 +94,9 @@ uba_read(t_addr addr, int ctl, uint64 *data, int access)
*data = 0;
return 0;
}
*data = 0;
uba_status[ubm] |= UBST_TIM | UBST_NED;
return 1;
}
/* Look for device */
@ -105,13 +108,19 @@ uba_read(t_addr addr, int ctl, uint64 *data, int access)
dibp->uba_addr == (addr & (~dibp->uba_mask))) {
uint16 buf;
int r = dibp->rd_io(dptr, addr, &buf, access);
*data = (uint64)buf;
if (r)
break;
if (access == BYTE) {
if ((addr & 1) != 0)
buf >>= 8;
buf &= 0377;
}
*data = (uint64)buf;
return r;
}
}
sim_debug(DEBUG_EXP, &cpu_dev, "No UBA device %02o %08o\n", ctl, addr);
*data = 0;
uba_status[ubm] |= UBST_TIM | UBST_NED;
return 1;
}
@ -131,6 +140,7 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
return 1;
}
sim_debug(DEBUG_EXP, &cpu_dev, "UBA device write %02o %08o %012llo %d\n", ctl, addr, data, access);
if (access == BYTE) {
if ((addr & 1) != 0)
data = (data & 0377) << 8;
@ -168,6 +178,7 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
return 0;
}
uba_status[ubm] |= UBST_TIM | UBST_NED;
return 1;
}
/* Look for device */
@ -177,6 +188,7 @@ uba_write(t_addr addr, int ctl, uint64 data, int access)
continue;
if (ctl == dibp->uba_ctl && dibp->uba_addr == (addr & (~dibp->uba_mask))) {
uint16 buf = (uint16)(data & 0177777);
sim_debug(DEBUG_EXP, &cpu_dev, "UBA device write %02o %08o %012llo %06o\n", ctl, addr, data, buf);
int r = dibp->wr_io(dptr, addr, buf, access);
if (r)
break;

View File

@ -4703,9 +4703,11 @@ st_pi:
}
hst[hst_p].pc = HIST_PC | ((BYF5)? (HIST_PC2|PC) : IA);
hst[hst_p].ea = AB;
#if KL
#if KL | KS
if (extend)
hst[hst_p].pc |= HIST_PCE;
#endif
#if KL
hst[hst_p].pc |= (pc_sect << 18);
hst[hst_p].ea |= (sect << 18);
#endif
@ -5851,9 +5853,6 @@ dpnorm:
if ((FLAGS & BYTI)) {
AB = (AB + 1) & RMASK;
MB = MQ;
#if KL | KS
FLAGS &= ~BYTI;
#endif
if (Mem_write(0, 0))
goto last;
FLAGS &= ~BYTI;
@ -5900,15 +5899,15 @@ dpnorm:
#endif
AR &= FMASK;
MB = AR;
FLAGS |= BYTI;
if (Mem_write(0, 0))
goto last;
FLAGS |= BYTI;
#if KL | KS
AB = (AB + 1) & RMASK;
MB = MQ & CMASK;
FLAGS &= ~BYTI;
if (Mem_write(0, 0))
goto last;
FLAGS &= ~BYTI;
break;
#endif
}
@ -11237,7 +11236,6 @@ skip_op:
goto its_rd;
}
#endif
BR = get_reg(AC);
if (uba_read(AB, ctl, &MB, WORD)) {
io_fault:
fault_data = (020LL << 30) | BIT8 | BIT10;
@ -11246,6 +11244,7 @@ io_fault:
page_fault = 1;
goto last;
}
BR &= 0177777;
if ((BR & MB) == 0)
PC = (PC + 1) & RMASK;
AR = MB;
@ -11260,6 +11259,7 @@ io_fault:
#endif
if (uba_read(AB, ctl, &MB, WORD))
goto io_fault;
BR &= 0177777;
if ((BR & MB) != 0)
PC = (PC + 1) & RMASK;
AR = MB;
@ -11394,8 +11394,7 @@ its_wr:
#endif
if (uba_read(AB, ctl, &MB, BYTE))
goto io_fault;
if (AB & 1)
BR >>= 8;
BR &= 0377;
if ((BR & MB) == 0)
PC = (PC + 1) & RMASK;
AR = MB;
@ -11410,8 +11409,7 @@ its_wr:
#endif
if (uba_read(AB, ctl, &MB, BYTE))
goto io_fault;
if (AB & 1)
BR >>= 8;
BR &= 0377;
if ((BR & MB) != 0)
PC = (PC + 1) & RMASK;
break;
@ -11428,8 +11426,6 @@ its_rdb:
#endif
if (uba_read(AB, ctl, &AR, BYTE))
goto io_fault;
if (AB & 1)
AR >>= 8;
set_reg(AC, AR);
break;
@ -11471,7 +11467,7 @@ its_wrb:
#endif
if (uba_read(AB, ctl, &MB, BYTE))
goto io_fault;
MB &= ~BR;
MB &= ~(BR);
if (uba_write(AB, ctl, MB, BYTE))
goto io_fault;
AR = MB;