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https://github.com/rcornwell/sims.git
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KA10: Fixed KL10 FE printer to work.
This commit is contained in:
Richard Cornwell
parent
a5a63ac7b2
commit
69ffb39566
354
PDP10/kl10_fe.c
354
PDP10/kl10_fe.c
@ -305,10 +305,11 @@ DEVICE dte_dev = {
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#define LPST us9
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#define LPCNT us10
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#define PTRMSK 00777 /* Current data load pointer */
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#define EOFFLG 01000 /* Tops 20 wants EOF */
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#define HDSFLG 02000 /* Tell Tops 20 The current device status */
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#define ACKFLG 04000 /* Post an acknowwledge message */
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#define EOFFLG 001 /* Tops 20 wants EOF */
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#define HDSFLG 002 /* Tell Tops 20 The current device status */
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#define ACKFLG 004 /* Post an acknowwledge message */
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#define INTFLG 010 /* Send interrupt */
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#define DELFLG 020 /* Previous character was delimiter */
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#define MARGIN 6
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@ -329,8 +330,86 @@ t_stat lp20_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
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const char *lp20_description (DEVICE *dptr);
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char lp20_buffer[134 * 3];
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#define LP20_RAM_RAP 010000 /* RAM Parity */
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#define LP20_RAM_INT 04000 /* Interrrupt bit */
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#define LP20_RAM_DEL 02000 /* Delimiter bit */
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#define LP20_RAM_TRN 01000 /* Translation bite */
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#define LP20_RAM_PI 00400 /* Paper Instruction */
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#define LP20_RAM_CHR 00377 /* Character translation */
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uint16 lp20_vfu[256];
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uint16 lp20_ram[256];
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uint16 lp20_dvfu[] = { /* Default VFU */
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/* 66 line page with 6 line margin */
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00377, /* Line 0 8 7 6 5 4 3 2 1 */
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00220, /* Line 1 8 5 */
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00224, /* Line 2 8 5 3 */
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00230, /* Line 3 8 5 4 */
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00224, /* Line 4 8 5 3 */
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00220, /* Line 5 8 5 */
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00234, /* Line 6 8 5 4 3 */
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00220, /* Line 7 8 5 */
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00224, /* Line 8 8 5 3 */
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00230, /* Line 9 8 5 4 */
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00264, /* Line 10 8 6 5 3 */
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00220, /* Line 11 8 5 */
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00234, /* Line 12 8 5 4 3 */
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00220, /* Line 13 8 5 */
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00224, /* Line 14 8 5 3 */
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00230, /* Line 15 8 5 4 */
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00224, /* Line 16 8 5 3 */
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00220, /* Line 17 8 5 */
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00234, /* Line 18 8 5 4 3 */
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00220, /* Line 19 8 5 */
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00364, /* Line 20 8 7 6 5 3 */
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00230, /* Line 21 8 5 4 */
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00224, /* Line 22 8 5 3 */
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00220, /* Line 23 8 5 */
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00234, /* Line 24 8 5 4 3 */
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00220, /* Line 25 8 5 */
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00224, /* Line 26 8 5 3 */
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00230, /* Line 27 8 5 4 */
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00224, /* Line 28 8 5 3 */
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00220, /* Line 29 8 5 */
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00276, /* Line 30 8 6 5 4 3 2 */
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00220, /* Line 31 8 5 */
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00224, /* Line 32 8 5 3 */
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00230, /* Line 33 8 5 4 */
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00224, /* Line 34 8 5 3 */
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00220, /* Line 35 8 5 */
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00234, /* Line 36 8 5 4 3 */
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00220, /* Line 37 8 5 */
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00224, /* Line 38 8 5 3 */
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00230, /* Line 39 8 5 4 */
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00364, /* Line 40 8 7 6 5 3 */
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00220, /* Line 41 8 5 */
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00234, /* Line 42 8 5 4 3 */
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00220, /* Line 43 8 5 */
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00224, /* Line 44 8 5 3 */
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00230, /* Line 45 8 5 4 */
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00224, /* Line 46 8 5 3 */
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00220, /* Line 47 8 5 */
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00234, /* Line 48 8 5 4 3 */
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00220, /* Line 49 8 5 */
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00264, /* Line 50 8 6 5 3 */
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00230, /* Line 51 8 5 4 */
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00224, /* Line 52 8 5 3 */
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00220, /* Line 53 8 5 */
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00234, /* Line 54 8 5 4 3 */
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00220, /* Line 55 8 5 */
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00224, /* Line 56 8 5 3 */
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00230, /* Line 57 8 5 4 */
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00224, /* Line 58 8 5 3 */
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00220, /* Line 59 8 5 */
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00020, /* Line 60 5 */
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00020, /* Line 61 5 */
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00020, /* Line 62 5 */
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00020, /* Line 63 5 */
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00020, /* Line 64 5 */
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04020, /* Line 65 12 5 */
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010000, /* End of form */
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};
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struct _buffer lp20_queue;
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@ -476,7 +555,7 @@ t_stat dte_devio(uint32 dev, uint64 *data) {
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if (res & DTE_CO11SR)
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dte_unit[0].STATUS |= (DTE_11RELD);
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if (res & DTE_CO11DB) {
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sim_debug(DEBUG_CONO, &dte_dev, "CTY Ring 11 DB\n");
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sim_debug(DEBUG_CONO, &dte_dev, "CTY Ring 11 DB\n");
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dte_unit[0].STATUS |= DTE_11DB;
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sim_activate(&dte_unit[0], 200);
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}
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@ -765,6 +844,7 @@ error:
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uptr->STATUS |= DTE_10DB;
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set_interrupt(DTE_DEVNUM, dte_unit[0].STATUS);
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}
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sim_debug(DEBUG_DETAIL, &dte_dev, "DTE: error %012llo\n", word);
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return;
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}
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@ -786,14 +866,14 @@ error:
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in->dcnt = (uint16)(iword & 0177777);
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/* Read in data */
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dp = &in->data[0];
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for (cnt = in->dcnt; cnt >= 0; cnt --) {
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for (cnt = in->dcnt; cnt > 0; cnt --) {
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/* Read in data */
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s = Mem_read_byte(0, dp, 0);
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if (s == 0)
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goto error;
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in->sz = s;
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sim_debug(DEBUG_DATA, &dte_dev, "DTE: Read Idata: %06o %03o %03o %06o\n",
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*dp, *dp >> 8, *dp & 0377, ((*dp & 0377) << 8) | ((*dp >> 8) & 0377));
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sim_debug(DEBUG_DATA, &dte_dev, "DTE: Read Idata: %06o %03o %03o %06o cnt=%o\n",
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*dp, *dp >> 8, *dp & 0377, ((*dp & 0377) << 8) | ((*dp >> 8) & 0377), cnt);
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dp++;
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if (s <= 8)
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cnt--;
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@ -921,22 +1001,23 @@ dte_function(UNIT *uptr)
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#if (NUM_DEVS_LP20 > 0)
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/* Handle printer data */
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if (cmd->dev == PRI_EMLPT) {
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uptr->LPST &= ~(EOFFLG);
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if (!sim_is_active(&lp20_unit))
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sim_activate(&lp20_unit, 1000);
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// lp20_unit.LPST &= ~EOFFLG;
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while (cmd->dptr < cmd->dcnt) {
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if (((lp20_queue.in_ptr + 1) & 0xff) == lp20_queue.out_ptr)
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return;
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ch = (int32)(cmd->data[cmd->dptr >> 1]);
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if ((cmd->dptr & 1) == 0)
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ch >>= 8;
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ch &= 0177;
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if (((lp20_queue.in_ptr + 1) & 0xff) == lp20_queue.out_ptr)
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return;
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lp20_queue.buff[lp20_queue.in_ptr] = ch;
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lp20_queue.in_ptr = (lp20_queue.in_ptr + 1) & 0xff;
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cmd->dptr++;
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}
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if (cmd->dptr != cmd->dcnt)
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return;
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sim_debug(DEBUG_DETAIL, &dte_dev, "LP20 done\n");
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break;
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}
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#endif
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@ -955,16 +1036,16 @@ dte_function(UNIT *uptr)
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if (cmd->sz > 8)
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cmd->dcnt += cmd->dcnt;
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while (cmd->dptr < cmd->dcnt) {
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if (((otty->in_ptr + 1) & 0xff) == otty->out_ptr)
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return;
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ch = (int32)(cmd->data[cmd->dptr >> 1]);
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if ((cmd->dptr & 1) == 0)
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ch >>= 8;
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ch &= 0177;
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if (ch != 0) {
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sim_debug(DEBUG_DETAIL, &dte_dev, "TTY queue %o %d\n", ch, ln);
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if (((otty->in_ptr + 1) & 0xff) == otty->out_ptr)
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return;
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otty->buff[otty->in_ptr] = ch;
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otty->in_ptr = (otty->in_ptr + 1) & 0xff;
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sim_debug(DEBUG_DATA, &dte_dev, "TTY queue %o %d\n", ch, ln);
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}
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cmd->dptr++;
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}
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@ -983,17 +1064,17 @@ cty:
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if (cmd->sz > 8)
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cmd->dcnt += cmd->dcnt;
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while (cmd->dptr < cmd->dcnt) {
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if (((cty_out.in_ptr + 1) & 0xff) == cty_out.out_ptr)
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return;
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ch = (int32)(cmd->data[cmd->dptr >> 1]);
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if ((cmd->dptr & 1) == 0)
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ch >>= 8;
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ch &= 0177;
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if (ch != 0) {
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sim_debug(DEBUG_DETAIL, &dte_dev, "CTY queue %o\n", ch);
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ch = sim_tt_outcvt( ch, TT_GET_MODE(uptr->flags));
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if (((cty_out.in_ptr + 1) & 0xff) == cty_out.out_ptr)
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return;
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cty_out.buff[cty_out.in_ptr] = (char)(ch & 0xff);
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cty_out.in_ptr = (cty_out.in_ptr + 1) & 0xff;
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sim_debug(DEBUG_DATA, &dte_dev, "CTY queue %o\n", ch);
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}
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cmd->dptr++;
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}
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@ -1010,12 +1091,12 @@ cty:
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ln = (ch >> 8);
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ch &= 0177;
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if (ch != 0 && ln == PRI_CTYDV) {
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if (((cty_out.in_ptr + 1) & 0xff) == cty_out.out_ptr)
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return;
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sim_debug(DEBUG_DETAIL, &dte_dev, "CTY queue %o\n", ch);
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ch = sim_tt_outcvt( ch, TT_GET_MODE(uptr->flags));
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cty_out.buff[cty_out.in_ptr] = (char)(ch & 0xff);
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cty_out.in_ptr = (cty_out.in_ptr + 1) & 0xff;
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if (((cty_out.in_ptr + 1) & 0xff) == cty_out.out_ptr)
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return;
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sim_debug(DEBUG_DATA, &dte_dev, "CTY queue %o\n", ch);
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} else
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if (ch != 0 && ln >= NUM_DLS && ln <= tty_desc.lines) {
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struct _buffer *otty;
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@ -1023,9 +1104,9 @@ cty:
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otty = &tty_out[ln];
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if (((otty->in_ptr + 1) & 0xff) == otty->out_ptr)
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return;
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sim_debug(DEBUG_DETAIL, &dte_dev, "TTY queue %o %d\n", ch, ln);
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otty->buff[otty->in_ptr] = ch;
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otty->in_ptr = (otty->in_ptr + 1) & 0xff;
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sim_debug(DEBUG_DATA, &dte_dev, "TTY queue %o %d\n", ch, ln);
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}
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cmd->dptr+=2;
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}
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@ -1043,23 +1124,15 @@ cty:
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#if (NUM_DEVS_LP20 > 0)
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if (cmd->dev == PRI_EMLPT) {
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if (cmd->data[0] != 0) {
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data1[0] = 2;
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data1[0] = 2 << 8;
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data1[1] = 0;
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data1[2] = 0;
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if (dte_queue(PRI_EMHDS+PRI_IND_FLG, PRI_EMLPT, 3, data1) == 0)
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return;
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if (dte_queue(PRI_EMHDS+PRI_IND_FLG, PRI_EMLPT, 3, data1) == 0)
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return;
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} else {
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lp20_unit.LPST |= HDSFLG;
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if (!sim_is_active(&lp20_unit))
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sim_activate(&lp20_unit, 1000);
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// data1[0] = 0;
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// data1[1] = (lp20_unit.LINE == 0) ? 0x1: 0;
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// if (lp20_unit.LPST & EOFFLG)
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// data1[0] |= 040;
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//
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// if (lp20_unit.LPST & VFUFLG)
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// data1[1] |= 04;
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// data1[2] = 0; //0100220;
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}
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}
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#endif
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@ -1080,27 +1153,14 @@ cty:
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case PRI_EMHDS: /* Here is device status */
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if (cmd->dev == PRI_EMLPT) {
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sim_debug(DEBUG_DETAIL, &dte_dev, "LPT HDS %06o %06o %06o\n", cmd->data[0], cmd->data[1], cmd->data[2]);
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// data1[0] = 0;
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// data1[1] = (lp20_unit.LINE == 0) ? 0x1: 0;
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if (cmd->data[0] & 040) {
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// data1[0] |= 040;
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lp20_unit.LPST |= EOFFLG;
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lp20_unit.LPCNT = 0;
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}
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lp20_unit.LPST |= HDSFLG;
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sim_debug(DEBUG_DETAIL, &dte_dev, "LPT HDS %06o \n", lp20_unit.LPST);
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if (!sim_is_active(&lp20_unit))
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sim_activate(&lp20_unit, 1000);
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// if (lp20_unit.LPST & VFUFLG)
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// data1[1] |= 04;
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// data1[2] = 0100220;
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// if (dte_queue(PRI_EMHDS+PRI_IND_FLG, PRI_EMLPT, 3, data1) == 0)
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// return;
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// if (cmd->data[0] & 040) {
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// lp20_unit.LPST |= EOFFLG;
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// }
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// if ((lp20_unit.LPST & EOFFLG) != 0 && dte_queue(PRI_EMHDS+PRI_IND_FLG, PRI_EMLPT, 3, data1) == 0)
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// return;
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// lp20_unit.LPST &= ~EOFFLG;
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}
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break;
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#if (NUM_DEVS_LP20 > 0)
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@ -1108,11 +1168,16 @@ cty:
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if (cmd->dev == PRI_EMLPT) {
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int ln = lp20_unit.LPCNT;
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while (cmd->dptr < cmd->dcnt) {
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lp20_vfu[ln++] = cmd->data[cmd->dptr++];
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uint16 d = cmd->data[cmd->dptr++];
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if (d == (0357 << 8))
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lp20_vfu[ln++] = 010000; /* Signal end of page */
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else
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lp20_vfu[ln++] = ((d >> 8) & 077) | ((d <<6) & 07700);
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}
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lp20_unit.LPCNT = ln;
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// lp20_unit.LPST |= ACKFLG;
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data1[0] = 0;
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for (ln = 0; ln < 256; ln++)
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sim_debug(DEBUG_DETAIL, &lp20_dev, "LP20 VFU %02d => %04o\n", ln, lp20_vfu[ln]);
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data1[0] = 0;
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if (dte_queue(PRI_EMLBE, PRI_EMLPT, 1, data1) == 0)
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sim_activate(uptr, 1000);
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}
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@ -1126,7 +1191,6 @@ cty:
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lp20_ram[ln] = cmd->data[cmd->dptr];
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}
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lp20_unit.LPCNT = ln;
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// lp20_unit.LPST |= ACKFLG;
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for (ln = 0; ln < 256; ln++)
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sim_debug(DEBUG_DETAIL, &lp20_dev, "LP20 RAM %02x => %04x\n", ln, lp20_ram[ln]);
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data1[0] = 0;
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@ -1143,7 +1207,7 @@ cty:
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int ln = cmd->data[0] - NUM_DLS;
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sim_debug(DEBUG_DETAIL, &dte_dev, "Flush out %d %o\n", ln, cmd->data[0]);
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if (ln == (NUM_DLS - PRI_CTYDV))
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if (ln == (NUM_DLS - PRI_CTYDV))
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cty_out.in_ptr = cty_out.out_ptr = 0;
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else
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tty_out[ln].in_ptr = tty_out[ln].out_ptr = 0;
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@ -1283,7 +1347,7 @@ void dte_transfer(UNIT *uptr) {
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cnt -= 2;
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if (out->func & PRI_IND_FLG) {
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uint16 dwrd = out->dcnt;
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sim_debug(DEBUG_DATA, &dte_dev, "DTE: Indirect %o %o\n", cnt, out->dcnt);
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sim_debug(DEBUG_DATA, &dte_dev, "DTE: Indirect %o %o\n", cnt, out->dcnt);
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dwrd |= (out->sdev << 8);
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if (!Mem_write_byte(0, &dwrd))
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goto error;
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@ -1492,7 +1556,6 @@ dte_queue(int func, int dev, int dcnt, uint16 *data)
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out->func = func;
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out->dev = dev;
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out->dcnt = (dcnt-1)*2;
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// out->dcnt = dcnt*2;
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out->spare = 0;
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sim_debug(DEBUG_DATA, &dte_dev, "DTE: %d %d queue resp: %o (%o) f=%o %s d=%o\n",
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dte_out_ptr, dte_out_res, out->cnt, out->dcnt, out->func,
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@ -1788,31 +1851,29 @@ lp20_printline(UNIT *uptr, int nl) {
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int trim = 0;
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uint16 data1 = 1;
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/* Trim off trailing blanks */
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while (uptr->COL >= 0 && lp20_buffer[uptr->POS - 1] == ' ') {
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while (uptr->COL >= 0 && lp20_buffer[uptr->COL - 1] == ' ') {
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uptr->COL--;
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uptr->POS--;
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trim = 1;
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}
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lp20_buffer[uptr->POS] = '\0';
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lp20_buffer[uptr->COL] = '\0';
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sim_debug(DEBUG_DETAIL, &lp20_dev, "LP output %d %d [%s]\n", uptr->COL, nl, lp20_buffer);
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/* Stick a carraige return and linefeed as needed */
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if (uptr->COL != 0 || trim)
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lp20_buffer[uptr->POS++] = '\r';
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lp20_buffer[uptr->COL++] = '\r';
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if (nl != 0) {
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lp20_buffer[uptr->POS++] = '\n';
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lp20_buffer[uptr->COL++] = '\n';
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uptr->LINE++;
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}
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if (nl > 0 && uptr->LINE >= ((int32)uptr->capac - MARGIN)) {
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lp20_buffer[uptr->POS++] = '\f';
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uptr->LINE = 0;
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if (nl > 0 && lp20_vfu[uptr->LINE] == 010000) {
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lp20_buffer[uptr->COL++] = '\f';
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uptr->LINE = 1;
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} else if (nl < 0 && uptr->LINE >= (int32)uptr->capac) {
|
||||
uptr->LINE = 0;
|
||||
uptr->LINE = 1;
|
||||
}
|
||||
|
||||
sim_fwrite(&lp20_buffer, 1, uptr->POS, uptr->fileref);
|
||||
uptr->pos += uptr->POS;
|
||||
sim_fwrite(&lp20_buffer, 1, uptr->COL, uptr->fileref);
|
||||
uptr->pos += uptr->COL;
|
||||
uptr->COL = 0;
|
||||
uptr->POS = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1827,16 +1888,20 @@ lp20_output(UNIT *uptr, char c) {
|
||||
lp20_printline(uptr, 1);
|
||||
if ((uptr->flags & UNIT_UC) && (c & 0140) == 0140)
|
||||
c &= 0137;
|
||||
else if (c >= 040 && c < 0177) {
|
||||
lp20_buffer[uptr->POS++] = c;
|
||||
uptr->COL++;
|
||||
else if (c >= 040 && c < 0177) { /* If printable */
|
||||
lp20_buffer[uptr->COL++] = c;
|
||||
} if (c == 011) { /* Tab */
|
||||
lp20_buffer[uptr->COL++] = ' ';
|
||||
while ((uptr->COL & 07) != 0)
|
||||
lp20_buffer[uptr->COL++] = ' ';
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
t_stat lp20_svc (UNIT *uptr)
|
||||
{
|
||||
char c;
|
||||
char ch;
|
||||
uint16 ram_ch;
|
||||
uint16 data1[5];
|
||||
int l = uptr->LINE;
|
||||
|
||||
@ -1845,93 +1910,78 @@ t_stat lp20_svc (UNIT *uptr)
|
||||
if (dte_dev.flags & TYPE_RSX20 && uptr->LPST & HDSFLG) {
|
||||
data1[0] = 0;
|
||||
|
||||
data1[1] = (uptr->LINE == 0) ? 0x1: 0;
|
||||
if (uptr->LPST & EOFFLG)
|
||||
data1[0] |= 040;
|
||||
// if (uptr->LPST & VFUFLG)
|
||||
// data1[1] |= 04;
|
||||
data1[1] = (uptr->LINE == 1) ? 01<<8: 0;
|
||||
sim_debug(DEBUG_DETAIL, &dte_dev, "LPT queue %06o %06o \n", lp20_unit.LPST, uptr->LPST);
|
||||
if (uptr->LPST & EOFFLG) {
|
||||
data1[0] |= 040 << 8;
|
||||
uptr->LPCNT = 0;
|
||||
}
|
||||
if (uptr->LPST & INTFLG) {
|
||||
data1[1] |= 02 << 8;
|
||||
uptr->LPCNT = 0;
|
||||
}
|
||||
data1[2] = 0110200; //0100220;
|
||||
if (dte_queue(PRI_EMHDS+PRI_IND_FLG, PRI_EMLPT, 4, data1) == 0)
|
||||
sim_activate(uptr, 1000);
|
||||
// if ((uptr->LPST & (EOFFLG)) == (EOFFLG)) {
|
||||
// data1[0] = (PRI_EMLPT << 8);
|
||||
// if (dte_queue(PRI_EMLBE, PRI_EMLPT, 1, data1) == 0)
|
||||
// sim_activate(uptr, 1000);
|
||||
// uptr->LPST &= ~ACKFLG;
|
||||
// }
|
||||
uptr->LPST &= ~(HDSFLG|EOFFLG);
|
||||
uptr->LPST &= ~(HDSFLG);
|
||||
}
|
||||
|
||||
if (lp20_queue.out_ptr == lp20_queue.in_ptr)
|
||||
return SCPE_OK;
|
||||
while (lp20_queue.out_ptr != lp20_queue.in_ptr) {
|
||||
c = lp20_queue.buff[lp20_queue.out_ptr];
|
||||
ch = lp20_queue.buff[lp20_queue.out_ptr];
|
||||
lp20_queue.out_ptr = (lp20_queue.out_ptr + 1) & 0xff;
|
||||
if (c < 040) { /* Control character */
|
||||
sim_debug(DEBUG_DETAIL, &lp20_dev, "LP deque %02x %04x\n", c, lp20_ram[c] );
|
||||
switch(c) {
|
||||
case 011: /* Horizontal tab, space to 8'th column */
|
||||
lp20_output(uptr, ' ');
|
||||
while ((uptr->COL & 07) != 0)
|
||||
lp20_output(uptr, ' ');
|
||||
break;
|
||||
case 015: /* Carriage return, print line */
|
||||
lp20_printline(uptr, 0);
|
||||
break;
|
||||
case 012: /* Line feed, print line, space one line */
|
||||
lp20_printline(uptr, 1);
|
||||
break;
|
||||
case 014: /* Form feed, skip to top of page */
|
||||
lp20_printline(uptr, 0);
|
||||
ram_ch = lp20_ram[ch];
|
||||
|
||||
/* If previous was delimiter or translation do it */
|
||||
if (uptr->LPST & DELFLG || (ram_ch & (LP20_RAM_DEL|LP20_RAM_TRN)) != 0) {
|
||||
ch = ram_ch & LP20_RAM_CHR;
|
||||
uptr->LPST &= ~DELFLG;
|
||||
if (ram_ch & LP20_RAM_DEL)
|
||||
uptr->LPST |= DELFLG;
|
||||
}
|
||||
/* Flag if interrupt set */
|
||||
if (ram_ch & LP20_RAM_INT)
|
||||
uptr->LPST |= HDSFLG|INTFLG;
|
||||
/* Check if paper motion */
|
||||
if (ram_ch & LP20_RAM_PI) {
|
||||
int lines = 0; /* Number of new lines to output */
|
||||
lp20_printline(uptr, (ram_ch & 037) != 020); /* Print any buffered line */
|
||||
sim_debug(DEBUG_DETAIL, &lp20_dev, "LP deque %02x %04x\n", ch, ram_ch);
|
||||
if ((ram_ch & 020) == 0) { /* Find channel mark in output */
|
||||
while ((lp20_vfu[uptr->LINE] & (1 << (ram_ch & 017))) == 0) {
|
||||
sim_debug(DEBUG_DETAIL, &lp20_dev, "LP skip chan %04x %04x %d\n", lp20_vfu[uptr->LINE], ram_ch, uptr->LINE);
|
||||
if (lp20_vfu[uptr->LINE] & 010000) { /* Hit bottom of form */
|
||||
sim_fwrite("\014", 1, 1, uptr->fileref);
|
||||
uptr->pos++;
|
||||
uptr->LINE = 0;
|
||||
break;
|
||||
case 013: /* Vertical tab, Skip mod 20 */
|
||||
lp20_printline(uptr, 1);
|
||||
while((uptr->LINE % 20) != 0) {
|
||||
sim_fwrite("\r\n", 1, 2, uptr->fileref);
|
||||
uptr->pos+=2;
|
||||
uptr->LINE++;
|
||||
}
|
||||
break;
|
||||
case 020: /* Skip half page */
|
||||
lp20_printline(uptr, 1);
|
||||
while((uptr->LINE % 30) != 0) {
|
||||
sim_fwrite("\r\n", 1, 2, uptr->fileref);
|
||||
uptr->pos+=2;
|
||||
uptr->LINE++;
|
||||
}
|
||||
break;
|
||||
case 021: /* Skip even lines */
|
||||
lp20_printline(uptr, 1);
|
||||
while((uptr->LINE % 2) != 0) {
|
||||
sim_fwrite("\r\n", 1, 2, uptr->fileref);
|
||||
uptr->pos+=2;
|
||||
uptr->LINE++;
|
||||
}
|
||||
break;
|
||||
case 022: /* Skip triple lines */
|
||||
lp20_printline(uptr, 1);
|
||||
while((uptr->LINE % 3) != 0) {
|
||||
sim_fwrite("\r\n", 1, 2, uptr->fileref);
|
||||
uptr->pos+=2;
|
||||
uptr->LINE++;
|
||||
}
|
||||
break;
|
||||
case 023: /* Skip one line */
|
||||
lp20_printline(uptr, -1);
|
||||
break;
|
||||
default: /* Ignore */
|
||||
lines = 0;
|
||||
uptr->LINE = 1;
|
||||
break;
|
||||
}
|
||||
lines++;
|
||||
uptr->LINE++;
|
||||
}
|
||||
} else {
|
||||
while ((ram_ch & 017) != 0) {
|
||||
sim_debug(DEBUG_DETAIL, &lp20_dev, "LP skip line %04x %04x %d\n", lp20_vfu[uptr->LINE], ram_ch, uptr->LINE);
|
||||
if (lp20_vfu[uptr->LINE] & 010000) { /* Hit bottom of form */
|
||||
sim_fwrite("\014", 1, 1, uptr->fileref);
|
||||
uptr->pos++;
|
||||
lines = 0;
|
||||
uptr->LINE = 1;
|
||||
}
|
||||
lines++;
|
||||
uptr->LINE++;
|
||||
ram_ch--;
|
||||
}
|
||||
}
|
||||
if (uptr->LINE == 0) {
|
||||
uptr->LPST |= HDSFLG;
|
||||
sim_activate(uptr, 1000);
|
||||
}
|
||||
} else {
|
||||
sim_debug(DEBUG_DETAIL, &lp20_dev, "LP deque %02x '%c' %04x\n", c, c, lp20_ram[c] );
|
||||
lp20_output(uptr, c);
|
||||
for(;lines > 0; lines--) {
|
||||
sim_fwrite("\r\n", 1, 2, uptr->fileref);
|
||||
uptr->pos+=2;
|
||||
}
|
||||
} else if (ch != 0) {
|
||||
sim_debug(DEBUG_DETAIL, &lp20_dev, "LP deque %02x '%c' %04x\n", ch, ch, ram_ch);
|
||||
lp20_output(uptr, ch);
|
||||
}
|
||||
}
|
||||
if (lp20_queue.out_ptr == lp20_queue.in_ptr) {
|
||||
@ -1953,9 +2003,27 @@ t_stat lp20_svc (UNIT *uptr)
|
||||
t_stat lp20_reset (DEVICE *dptr)
|
||||
{
|
||||
UNIT *uptr = &lp20_unit;
|
||||
int i;
|
||||
uptr->POS = 0;
|
||||
uptr->COL = 0;
|
||||
uptr->LINE = 1;
|
||||
/* Clear RAM & VFU */
|
||||
for (i = 0; i < 256; i++) {
|
||||
lp20_ram[i] = 0;
|
||||
lp20_vfu[i] = 0;
|
||||
}
|
||||
|
||||
/* Load default VFU into VFU */
|
||||
memcpy(&lp20_vfu, lp20_dvfu, sizeof(lp20_dvfu));
|
||||
lp20_ram[012] = LP20_RAM_TRN|LP20_RAM_PI|7; /* Line feed, print line, space one line */
|
||||
lp20_ram[013] = LP20_RAM_TRN|LP20_RAM_PI|6; /* Vertical tab, Skip mod 20 */
|
||||
lp20_ram[014] = LP20_RAM_TRN|LP20_RAM_PI|0; /* Form feed, skip to top of page */
|
||||
lp20_ram[015] = LP20_RAM_TRN|LP20_RAM_PI|020; /* Carrage return */
|
||||
lp20_ram[020] = LP20_RAM_TRN|LP20_RAM_PI|1; /* Skip half page */
|
||||
lp20_ram[021] = LP20_RAM_TRN|LP20_RAM_PI|2; /* Skip even lines */
|
||||
lp20_ram[022] = LP20_RAM_TRN|LP20_RAM_PI|3; /* Skip triple lines */
|
||||
lp20_ram[023] = LP20_RAM_TRN|LP20_RAM_PI|4; /* Skip one line */
|
||||
lp20_ram[024] = LP20_RAM_TRN|LP20_RAM_PI|5;
|
||||
sim_cancel (&lp20_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user