mirror of
https://github.com/rcornwell/sims.git
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SEL32: Add SCSI disk support for UTX.
SEL32: Do code cleanup for disk support code. SEL32: Allow RTC to be disabled/enabled. SEL32: Add "set RTC enable" to tests init files.
This commit is contained in:
@@ -587,8 +587,8 @@ loop:
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}
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sim_debug(DEBUG_XIO, &cpu_dev,
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"load_ccw @%06x before start_cmd chan %04x status %04x count %04x\n",
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chp->chan_caw, chan, chp->chan_status, chp->ccw_count);
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"load_ccw @%06x before start_cmd chan %04x status %04x count %04x SNS %08x\n",
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chp->chan_caw, chan, chp->chan_status, chp->ccw_count, uptr->u5);
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/* call the device startcmd function to process the current command */
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/* just replace device status bits */
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@@ -600,6 +600,7 @@ loop:
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chp->chan_caw, chan, chp->chan_status, chp->ccw_count);
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/* see if bad status */
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// if (chp->chan_status & (STATUS_ATTN|STATUS_CHECK|STATUS_EXPT)) {
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if (chp->chan_status & (STATUS_ATTN|STATUS_ERROR)) {
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chp->chan_status |= STATUS_CEND; /* channel end status */
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chp->ccw_flags = 0; /* no flags */
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@@ -926,8 +927,8 @@ sim_debug(DEBUG_EXP, &cpu_dev, "chan_end4 BUFF_NEXT chp %p chan_byte %04x\n", ch
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chp->chan_byte = BUFF_DONE; /* we are done */
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/* store_csw will change chan_byte to BUFF_POST */
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store_csw(chp); /* store the status */
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// sim_debug(DEBUG_EXP, &cpu_dev,
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// "chan_end5 BUFF_POST chp %p chan_byte %04x\n", chp, chp->chan_byte);
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sim_debug(DEBUG_EXP, &cpu_dev,
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"chan_end5 BUFF_POST chp %p chan_byte %04x\n", chp, chp->chan_byte);
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sim_debug(DEBUG_XIO, &cpu_dev,
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"chan_end after store_csw call chsa %04x status %08x chan_byte %02x\n",
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chsa, chp->chan_status, chp->chan_byte);
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@@ -1067,8 +1068,10 @@ nothere:
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}
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sim_debug(DEBUG_EXP, &cpu_dev,
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"checkxio chsa %04x flags UNIT_ATTABLE %1x UNIT_ATT %1x\n",
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chsa, (uptr->flags & UNIT_ATTABLE)?1:0, (uptr->flags & UNIT_ATT)?1:0);
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"checkxio chsa %04x flags UNIT_ATTABLE %1x UNIT_ATT %1x UNIT_DIS %1x\n",
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chsa, (uptr->flags & UNIT_ATTABLE)?1:0, (uptr->flags & UNIT_ATT)?1:0,
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(uptr->flags & UNIT_DIS)?1:0);
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/* check for the device being defined and attached in simh */
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if ((uptr->flags & UNIT_ATTABLE) && ((uptr->flags & UNIT_ATT) == 0)) {
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sim_debug(DEBUG_EXP, &cpu_dev,
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@@ -1137,6 +1140,14 @@ t_stat startxio(uint16 chsa, uint32 *status) {
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uint32 word1, word2, cmd;
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sim_debug(DEBUG_XIO, &cpu_dev, "startxio entry chsa %04x\n", chsa);
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#ifdef DEBUG_DISK
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chan_icb = find_int_icb(chsa); /* Interrupt level context block address */
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iocla = RMW(chan_icb+16); /* iocla is in wd 4 of ICB */
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incha = RMW(chan_icb+20); /* post inch addr in ICB+5w */
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sim_debug(DEBUG_XIO, &cpu_dev,
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"startxio debug chsa %04x iocla %06x incha %06x IOCD1 %08x IOCD2 %08x\n",
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chsa, iocla, incha, RMW(iocla), RMW(iocla+4));
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#endif
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dibp = dib_unit[chsa]; /* get the DIB pointer */
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chp = find_chanp_ptr(chsa); /* find the chanp pointer */
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@@ -1148,8 +1159,14 @@ t_stat startxio(uint16 chsa, uint32 *status) {
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}
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uptr = chp->unitptr; /* get the unit ptr */
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sim_debug(DEBUG_EXP, &cpu_dev,
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"startxio chsa %04x flags UNIT_ATTABLE %1x UNIT_ATT %1x UNIT_DIS %1x\n",
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chsa, (uptr->flags & UNIT_ATTABLE)?1:0, (uptr->flags & UNIT_ATT)?1:0,
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(uptr->flags & UNIT_DIS)?1:0);
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if ((uptr->flags & UNIT_ATTABLE) && ((uptr->flags & UNIT_ATT) == 0) &&
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(uptr->flags & UNIT_SUBCHAN) == 0) { /* is unit attached? */
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(uptr->flags & UNIT_SUBCHAN) == 0) { /* is unit attached? */
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sim_debug(DEBUG_EXP, &cpu_dev,
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"startxio chsa %04x device not present, CC3 returned flags %08x\n", chsa, uptr->flags);
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*status = CC3BIT; /* not attached, so error CC3 */
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@@ -1163,8 +1180,6 @@ t_stat startxio(uint16 chsa, uint32 *status) {
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sim_debug(DEBUG_XIO, &cpu_dev,
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"SIO Busy INTS ACT FIFO #%1x irq %02x SPAD %08x INTS %08x chan_byte %02x\n",
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FIFO_Num(SPAD[inta+0x80] & 0x7f00), inta, SPAD[inta+0x80], INTS[inta], chp->chan_byte);
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// *status = CC4BIT|CC3BIT; /* busy, so CC3&CC4 */
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// return SCPE_OK; /* just busy CC3&CC4 */
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}
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#endif
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@@ -1250,7 +1265,8 @@ t_stat startxio(uint16 chsa, uint32 *status) {
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/* We are queueing the SIO */
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/* Queue us to continue IOCL from cpu level & make busy */
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chp->chan_byte = BUFF_NEXT; /* have main pick us up */
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sim_debug(DEBUG_EXP, &cpu_dev, "startxio BUFF_NEXT chp %p chan_byte %04x\n", chp, chp->chan_byte);
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sim_debug(DEBUG_EXP, &cpu_dev,
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"startxio BUFF_NEXT chp %p chan_byte %04x\n", chp, chp->chan_byte);
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RDYQ_Put(chsa); /* queue us up */
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sim_debug(DEBUG_XIO, &cpu_dev,
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"$$$ SIO queued chsa %04x iocla %06x IOCD1 %08x IOCD2 %08x\n",
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@@ -1293,7 +1309,6 @@ t_stat testxio(uint16 chsa, uint32 *status) { /* test XIO */
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}
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/* check for a Command or data chain operation in progresss */
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//715if (chp->chan_byte & BUFF_BUSY) {
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if ((chp->chan_byte & BUFF_BUSY) && chp->chan_byte != BUFF_POST) {
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sim_debug(DEBUG_XIO, &cpu_dev,
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"testxio busy return CC4 chsa %04x chan %04x\n", chsa, chan);
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@@ -1527,7 +1542,7 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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sim_debug(DEBUG_XIO, &cpu_dev,
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"haltxio halt_io call return ERROR FIFO #%1x chan %04x retstat %08x cstat %08x\n",
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FIFO_Num(chsa), chan, tempa, chp->chan_status);
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#if 1 /* 081320 */
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/* chan_end called in hio device service routine */
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/* the device is no longer busy, post status */
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/* remove SLI, PCI and Unit check status bits */
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@@ -1540,6 +1555,9 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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*status = CC2BIT; /* status stored */
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goto hioret; /* CC2 and OK */
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}
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#else
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/*81320*/ goto hiogret; /* CC1 and OK */
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#endif
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}
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/* the device is not busy, so cmd has not started */
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}
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@@ -1561,8 +1579,14 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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/* remove SLI, PCI and Unit check status bits */
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if (post_csw(chp, ((STATUS_LENGTH|STATUS_PCI|STATUS_EXPT) << 16))) {
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/* TODO clear SLI bit in status */
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#ifdef TEST4EC_NOWORK
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//81320 INTS[inta] &= ~INTS_REQ; /* clear any level request */
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//81320 *status = CC2BIT; /* status stored from SIO, so CC2 */
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*status = CC1BIT; /* request accepted */
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#else
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INTS[inta] &= ~INTS_REQ; /* clear any level request */
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*status = CC2BIT; /* status stored from SIO, so CC2 */
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#endif
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goto hioret; /* just return */
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}
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}
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@@ -1671,9 +1695,10 @@ sim_debug(DEBUG_EXP, &cpu_dev, "rsctlxio BUFF_EMPTY chp %p chan_byte %04x\n", ch
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t_stat chan_boot(uint16 chsa, DEVICE *dptr) {
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int chan = get_chan(chsa);
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DIB *dibp = (DIB *)dptr->ctxt; /* get pointer to DIB for this device */
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UNIT *uptr = find_unit_ptr(chsa); /* find pointer to unit on channel */
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CHANP *chp = 0;
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sim_debug(DEBUG_EXP, &cpu_dev, "Channel Boot chan/device addr %04x\n", chsa);
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sim_debug(DEBUG_EXP, &cpu_dev, "Channel Boot chan/device addr %04x SNS %08x\n", chsa, uptr->u5);
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if (dibp == 0) /* if no channel or device, error */
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return SCPE_IOERR; /* error */
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if (dibp->chan_prg == NULL) /* must have channel information for each device */
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@@ -1968,8 +1993,8 @@ sim_debug(DEBUG_EXP, &cpu_dev, "scan_chan BUFF_DONE chp %p chan_byte %04x\n", ch
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chan, FIFO_Num(chan), i, chp->chan_inch_addr, chsa, chan_icba, chp->chan_byte);
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if (post_csw(chp, 0)) {
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sim_debug(DEBUG_IRQ, &cpu_dev,
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"scan_chanx %04x POST FIFO #%1x irq %02x inch %06x chan_icba %06x chan_byte %02x\n",
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chan, FIFO_Num(chan), i, chp->chan_inch_addr, chan_icba, chp->chan_byte);
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"scan_chanx %04x POST FIFO #%1x irq %02x inch %06x chan_icba+20 %08x chan_byte %02x\n",
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chan, FIFO_Num(chan), i, chp->chan_inch_addr, RMW(chan_icba+20), chp->chan_byte);
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} else {
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sim_debug(DEBUG_IRQ, &cpu_dev,
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"scan_chanx %04x NOT POSTED FIFO #%1x irq %02x inch %06x chan_icba %06x chan_byte %02x\n",
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@@ -2016,7 +2041,7 @@ DEVICE *get_dev(UNIT *uptr)
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return uptr->dptr; /* return valid pointer */
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/* the device pointer in the unit is not set up, do it now */
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/* This should never happed as the pointer is setup in first reset call */
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/* This should never happen as the pointer is setup in first reset call */
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for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* do all devices */
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for (j = 0; j < dptr->numunits; j++) { /* do all units for device */
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if (uptr == (dptr->units + j)) { /* match found? */
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@@ -2084,7 +2109,8 @@ t_stat chan_set_devs() {
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chp->ccw_cmd = 0; /* read command */
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chp->chan_inch_addr = 0; /* clear address of stat dw in memory */
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if ((uptr->flags & UNIT_DIS) == 0 || (uptr->flags & UNIT_SUBCHAN) != 0) { /* is unit marked disabled? */
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/* is unit marked disabled? */
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if ((uptr->flags & UNIT_DIS) == 0 || (uptr->flags & UNIT_SUBCHAN) != 0) {
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/* see if this is unit zero */
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if ((chsa & 0xff) == 0) {
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/* we have channel mux or dev 0 of units */
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@@ -2171,11 +2197,13 @@ t_stat set_dev_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc) {
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return SCPE_IERR; /* no, arg error */
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dptr = get_dev(uptr); /* find the device from unit pointer */
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if (dptr == NULL) { /* device not found, so error */
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fprintf(stderr, "Set dev no DEVICE ptr %s\r\n", cptr);
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return SCPE_IERR; /* error */
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}
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dibp = (DIB *)dptr->ctxt; /* get dib pointer from device struct */
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if (dibp == NULL) { /* we need a DIB */
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fprintf(stderr, "Set dev no DIB ptr %s\r\n", cptr);
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return SCPE_IERR; /* no DIB, so error */
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}
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@@ -93,7 +93,8 @@ DEVICE rtc_dev = {
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1, 8, 8, 1, 8, 8,
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NULL, NULL, &rtc_reset, /* examine, deposit, reset */
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NULL, NULL, NULL, /* boot, attach, detach */
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NULL, DEV_DEBUG|DEV_DISABLE, 0, dev_debug, /* dib, dev flags, debug flags, debug */
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NULL, DEV_DEBUG|DEV_DIS|DEV_DISABLE, 0, dev_debug, /* dib, dev flags, debug flags, debug */
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// NULL, DEV_DEBUG|DEV_DISABLE, 0, dev_debug, /* dib, dev flags, debug flags, debug */
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NULL, NULL, &rtc_help, /* ?, ?, help */
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NULL, NULL, &rtc_desc, /* ?, ?, description */
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};
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@@ -116,8 +117,8 @@ t_stat rtc_srv (UNIT *uptr)
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/* stop clock interrupts for dexp debugging */
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rtc_pie = 0;
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#endif
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/* id clock sisabled, do not do interrupts */
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if (((uptr->flags & DEV_DIS) == 0) && rtc_pie) {
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/* if clock disabled, do not do interrupts */
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if (((rtc_dev.flags & DEV_DIS) == 0) && rtc_pie) {
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time_t result = time(NULL);
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sim_debug(DEBUG_CMD, &rtc_dev, "RT Clock int time %08x\n", (uint32)result);
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if (((INTS[rtc_lvl] & INTS_ENAB) || /* make sure enabled */
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@@ -188,9 +188,6 @@ uint16 com_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
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uint16 com_haltio(UNIT *uptr);
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void com_ini(UNIT *, t_bool);
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void coml_ini(UNIT *, t_bool);
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t_stat com_reset(DEVICE *);
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t_stat com_attach(UNIT *, CONST char *);
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t_stat com_detach(UNIT *);
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t_stat comc_srv(UNIT *uptr);
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t_stat como_srv(UNIT *uptr);
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t_stat comi_srv(UNIT *uptr);
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@@ -175,6 +175,7 @@ uint32 CPUSTATUS; /* cpu status word */
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uint32 TRAPSTATUS; /* trap status word */
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uint32 SPAD[256]; /* Scratch pad memory */
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uint32 INTS[112]; /* Interrupt status flags */
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uint32 pad[16]; /* In case of wrong access */
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uint32 CMCR; /* Cache Memory Control Register */
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uint32 SMCR; /* Shared Memory Control Register */
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uint32 CMSMC; /* V9 Cache/Shadow Memory Configuration */
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@@ -6619,8 +6620,9 @@ mcheck:
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#ifdef TEST
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{
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DIB *dibp = dib_chan[chan]; /* get channel dib pointer */
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//?? CHANP *chp = dibp->chan_prg; /* get channel prog pointer */
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CHANP *chp = find_chanp_ptr(chan<<8); /* get channel prog pointer */
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if (dibp != 0) {
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CHANP *chp = dibp->chan_prg; /* get channel prog pointer */
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if ((chp != 0) && post_csw(chp, 0)) {
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sim_debug(DEBUG_XIO, &cpu_dev,
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"DCI After checkxio call removed FIFO entry chp %p\n", chp);
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@@ -123,7 +123,7 @@
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#define NUM_DEVS_SCFI 1 /* 1 scfi (SCSI) disk drive units */
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#define NUM_UNITS_SCFI 1 /* 1 of 4 disk drive devices */
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#define NUM_DEVS_SCSI 2 /* 2 scsi (MFP SCSI) scsi buss units */
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#define NUM_UNITS_SCSI 2 /* 2 of 4 scsi disk drive devices */
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#define NUM_UNITS_SCSI 2 /* 2 scsi disk drive devices */
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#define NUM_DEVS_RTOM 1 /* 1 IOP RTOM channel */
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#define NUM_UNITS_RTOM 1 /* 1 IOP RTOM device (clock & interval timer) */
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#define NUM_DEVS_LPR 1 /* 1 IOP Line printer */
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@@ -313,20 +313,20 @@ UNIT dda_unit[] = {
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};
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DIB dda_dib = {
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disk_preio, /* Pre start I/O */
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disk_startcmd, /* Start a command */
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NULL, /* Stop I/O */
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NULL, /* Test I/O */
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NULL, /* Post I/O */
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disk_ini, /* init function */
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dda_unit, /* Pointer to units structure */
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dda_chp, /* Pointer to chan_prg structure */
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NUM_UNITS_DISK, /* number of units defined */
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0x07, /* 8 devices - device mask */
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0x0800, /* parent channel address */
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0, /* fifo input index */
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0, /* fifo output index */
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{0}, /* interrupt status fifo for channel */
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disk_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
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disk_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
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NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
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NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
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NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
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disk_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
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dda_unit, /* UNIT* units */ /* Pointer to units structure */
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dda_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
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NUM_UNITS_DISK, /* uint8 numunits */ /* number of units defined */
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0x07, /* uint8 mask */ /* 8 devices - device mask */
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0x0800, /* uint16 chan_addr */ /* parent channel address */
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0, /* uint32 chan_fifo_in */ /* fifo input index */
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0, /* uint32 chan_fifo_out */ /* fifo output index */
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{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
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};
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DEVICE dda_dev = {
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@@ -356,20 +356,20 @@ UNIT ddb_unit[] = {
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};
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DIB ddb_dib = {
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disk_preio, /* Pre Start I/O */
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disk_startcmd, /* Start a command SIO */
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NULL, /* Stop I/O HIO */
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NULL, /* Test I/O TIO */
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NULL, /* Post I/O */
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disk_ini, /* init function */
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ddb_unit, /* Pointer to units structure */
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ddb_chp, /* Pointer to chan_prg structure */
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NUM_UNITS_DISK, /* number of units defined */
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0x07, /* 8 devices - device mask */
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0x0C00, /* parent channel address */
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0, /* fifo input index */
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0, /* fifo output index */
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{0}, /* interrupt status fifo for channel */
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disk_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
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disk_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
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NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
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NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
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NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
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disk_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
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ddb_unit, /* UNIT* units */ /* Pointer to units structure */
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ddb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
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NUM_UNITS_DISK, /* uint8 numunits */ /* number of units defined */
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0x07, /* uint8 mask */ /* 8 devices - device mask */
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0x0C00, /* uint16 chan_addr */ /* parent channel address */
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0, /* uint32 chan_fifo_in */ /* fifo input index */
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0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE ddb_dev = {
|
||||
@@ -445,7 +445,8 @@ uint16 disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
uptr->u4, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
uptr->CMDu3 |= DSK_INCH2; /* use 0xF0 for inch, just need int */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
//J sim_activate(uptr, 20); /* start things off */
|
||||
sim_activate(uptr, 50); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
@@ -454,57 +455,29 @@ uint16 disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
case DSK_WD: /* Write command 0x01 */
|
||||
case DSK_RD: /* Read command 0x02 */
|
||||
case DSK_LMR: /* read mode register 0x15 */
|
||||
|
||||
case DSK_NOP: /* NOP 0x03 */
|
||||
case DSK_SNS: /* Sense 0x04 */
|
||||
case DSK_WSL: /* WSL 0x31 */
|
||||
case DSK_RSL: /* RSL 0x32 */
|
||||
case DSK_WTL: /* WTL 0x51 */
|
||||
case DSK_RTL: /* RTL 0x52 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"disk_startcmd starting disk seek r/w cmd %02x chsa %04x\n",
|
||||
cmd, chsa);
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_NOP: /* NOP 0x03 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_SNS: /* Sense 0x04 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
break;
|
||||
|
||||
case DSK_WSL: /* WSL 0x31 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_RSL: /* RSL 0x32 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_WTL: /* WTL 0x51 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_RTL: /* RTL 0x52 */
|
||||
uptr->CMDu3 |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
//J sim_activate(uptr, 20); /* start things off */
|
||||
sim_activate(uptr, 30); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"disk_startcmd done with disk_startcmd %02x chsa %04x SNS %08x\n",
|
||||
"disk_startcmd done with bad disk cmd %02x chsa %04x SNS %08x\n",
|
||||
cmd, chsa, uptr->SNS);
|
||||
if (uptr->SNS & 0xff) /* any other cmd is error */
|
||||
if (uptr->SNS & 0xff) /* any other cmd is error */
|
||||
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK;
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
//J sim_activate(uptr, 20); /* start things off */
|
||||
sim_activate(uptr, 50); /* start things off */
|
||||
return SNS_CHNEND|SNS_DEVEND;
|
||||
}
|
||||
|
||||
@@ -513,8 +486,7 @@ t_stat disk_srv(UNIT *uptr)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->CMDu3);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
DIB *dibp = (DIB *)dptr->ctxt; /* get DIB address */
|
||||
CHANP *chp = (CHANP *)dibp->chan_prg; /* get pointer to channel program */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int cmd = uptr->CMDu3 & DSK_CMDMSK;
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
uint32 trk=0, cyl=0, sec=0;
|
||||
@@ -785,7 +757,8 @@ t_stat disk_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_CMD, dptr, "disk_srv seek over on cylinder unit=%02x %04x %04x\n",
|
||||
unit, uptr->STAR >> 16, uptr->CHS >> 16);
|
||||
uptr->CHS = uptr->STAR; /* we are there */
|
||||
sim_activate(uptr, 10);
|
||||
//J sim_activate(uptr, 10);
|
||||
sim_activate(uptr, 15);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -886,6 +859,7 @@ t_stat disk_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_EXP, dptr,
|
||||
"disk_srv seeking unit=%02x to cyl %04x trk %02x sec %02x\n",
|
||||
unit, cyl, trk, buf[3]);
|
||||
//J sim_activate(uptr, 20); /* start us off */
|
||||
sim_activate(uptr, 20); /* start us off */
|
||||
} else {
|
||||
/* we are on cylinder/track/sector, so go on */
|
||||
@@ -1018,7 +992,8 @@ t_stat disk_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_DATA, dptr,
|
||||
"DISK sector read complete, %x bytes to go from diskfile /%04x/%02x/%02x\n",
|
||||
chp->ccw_count, STAR2CYL(uptr->CHS), ((uptr->CHS) >> 8)&0xff, (uptr->CHS&0xff));
|
||||
sim_activate(uptr, 10); /* wait to read next sector */
|
||||
//J sim_activate(uptr, 10); /* wait to read next sector */
|
||||
sim_activate(uptr, 15); /* wait to read next sector */
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -1092,7 +1067,8 @@ t_stat disk_srv(UNIT *uptr)
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
sim_activate(uptr, 10); /* keep writing */
|
||||
//J sim_activate(uptr, 10); /* keep writing */
|
||||
sim_activate(uptr, 15); /* keep writing */
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -1326,11 +1302,11 @@ void disk_ini(UNIT *uptr, t_bool f)
|
||||
uptr->CHS = 0; /* set CHS to cyl/hd/sec = 0 */
|
||||
uptr->STAR = 0; /* set STAR to cyl/hd/sec = 0 */
|
||||
uptr->CMDu3 &= LMASK; /* remove old status bits & cmd */
|
||||
uptr->SNS = ((uptr->SNS & MASK24) | (disk_type[i].type << 24)); /* save mode value */
|
||||
// uptr->SNS = ((uptr->SNS & MASK24) | (disk_type[i].type << 24)); /* save mode value */
|
||||
/* total sectors on disk */
|
||||
uptr->capac = CAP(i); /* size in sectors */
|
||||
|
||||
sim_debug(DEBUG_EXP, &dda_dev, "DMA init device %s on unit DMA%.1x cap %x %d\n",
|
||||
sim_debug(DEBUG_EXP, &dda_dev, "DMA init device %s on unit DMA%04x cap %x %d\n",
|
||||
dptr->name, GET_UADDR(uptr->CMDu3), uptr->capac, uptr->capac);
|
||||
}
|
||||
|
||||
@@ -1566,6 +1542,7 @@ int disk_format(UNIT *uptr) {
|
||||
t_stat disk_attach(UNIT *uptr, CONST char *file)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->CMDu3);
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
DIB *dibp = 0;
|
||||
@@ -1633,7 +1610,8 @@ fmt:
|
||||
/* check for valid configured disk */
|
||||
/* must have valid DIB and Channel Program pointer */
|
||||
dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
//??if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (chp == NULL)) {
|
||||
sim_debug(DEBUG_CMD, dptr, "ERROR===ERROR\nDISK device %s not configured on system, aborting\n",
|
||||
dptr->name);
|
||||
printf("ERROR===ERROR\nDISK device %s not configured on system, aborting\n",
|
||||
|
||||
@@ -307,7 +307,7 @@ uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
// CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"ec_startcmd chsa %04x unit %d cmd %02x CMD %08x\n",
|
||||
@@ -349,8 +349,7 @@ t_stat ec_srv(UNIT *uptr)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
DIB *dibp = (DIB *)dptr->ctxt; /* get DIB address */
|
||||
CHANP *chp = (CHANP *)dibp->chan_prg; /* get pointer to channel program */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int cmd = uptr->CMD & EC_CMDMSK;
|
||||
uint32 mema;
|
||||
int i;
|
||||
@@ -631,17 +630,16 @@ runt:
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* initialize the disk */
|
||||
/* initialize the ethernet */
|
||||
void ec_ini(UNIT *uptr, t_bool f)
|
||||
{
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
|
||||
/* start out at sector 0 */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
uptr->SNS = 0; /* save mode value */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
uptr->SNS = 0; /* save mode value */
|
||||
|
||||
sim_debug(DEBUG_EXP, &dda_dev, "EC init device %s on unit EC%.1x cap %x %d\n",
|
||||
dptr->name, GET_UADDR(uptr->CMD), uptr->capac, uptr->capac);
|
||||
sim_debug(DEBUG_EXP, &dda_dev,
|
||||
"EC init device %s on unit EC%04x\n", dptr->name, GET_UADDR(uptr->CMD));
|
||||
}
|
||||
|
||||
static char *
|
||||
@@ -818,8 +816,6 @@ void ec_packet_debug(struct ec_device *ec, const char *action,
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
t_stat ec_show_mode (FILE* st, UNIT* uptr, int32 val, CONST void* desc)
|
||||
{
|
||||
fprintf(st, "MODE=%d", GET_MODE(uptr->flags));
|
||||
|
||||
@@ -29,13 +29,13 @@
|
||||
|
||||
/* useful conversions */
|
||||
/* Fill STAR value from cyl, trk, sec data */
|
||||
#define CHS2STAR(c,h,s) (((c<<16) & 0xffff0000)|((h<<8) & 0xff00)|(s & 0xff))
|
||||
#define CHS2STAR(c,h,s) (((c<<16) & LMASK)|((h<<8) & 0xff00)|(s & 0xff))
|
||||
/* convert STAR value to number of sectors */
|
||||
#define STAR2SEC(star,spt,spc) ((star&0xff)+(((star>>8)&0xff)*spt)+((star>>16)*spc))
|
||||
/* convert STAR value to number of heads or tracks */
|
||||
#define STAR2TRK(star,tpc) ((star >> 16) * tpc + ((star >> 8) & 0x0ff))
|
||||
/* convert STAR value to number of cylinders */
|
||||
#define STAR2CYL(star) ((star >> 16) & 0xffff)
|
||||
#define STAR2CYL(star) ((star >> 16) & RMASK)
|
||||
/* convert byte value to number of sectors mod sector size */
|
||||
#define BYTES2SEC(bytes,ssize) (((bytes) + (ssize-1)) >> 10)
|
||||
/* get sectors per track for specified type */
|
||||
@@ -374,20 +374,20 @@ UNIT dpa_unit[] = {
|
||||
};
|
||||
|
||||
DIB dpa_dib = {
|
||||
hsdp_preio, /* Pre start I/O */
|
||||
hsdp_startcmd, /* Start a command */
|
||||
NULL, /* Stop I/O */
|
||||
NULL, /* Test I/O */
|
||||
NULL, /* Post I/O */
|
||||
hsdp_ini, /* init function */
|
||||
dpa_unit, /* Pointer to units structure */
|
||||
dpa_chp, /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_HSDP, /* number of units defined */
|
||||
0x0E, /* 8 devices - device mask */
|
||||
0x0800, /* parent channel address */
|
||||
0, /* fifo input index */
|
||||
0, /* fifo output index */
|
||||
{0}, /* interrupt status fifo for channel */
|
||||
hsdp_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
hsdp_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
|
||||
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
|
||||
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
|
||||
hsdp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
dpa_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
dpa_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_HSDP, /* uint8 numunits */ /* number of units defined */
|
||||
0x0E, /* uint8 mask */ /* 8 devices - device mask */
|
||||
0x0800, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE dpa_dev = {
|
||||
@@ -417,20 +417,20 @@ UNIT dpb_unit[] = {
|
||||
|
||||
|
||||
DIB dpb_dib = {
|
||||
hsdp_preio, /* Pre Start I/O */
|
||||
hsdp_startcmd, /* Start a command SIO */
|
||||
NULL, /* Stop I/O HIO */
|
||||
NULL, /* Test I/O TIO */
|
||||
NULL, /* Post I/O */
|
||||
hsdp_ini, /* init function */
|
||||
dpb_unit, /* Pointer to units structure */
|
||||
dpb_chp, /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_HSDP, /* number of units defined */
|
||||
0x0E, /* 8 devices - device mask */
|
||||
0x0C00, /* parent channel address */
|
||||
0, /* fifo input index */
|
||||
0, /* fifo output index */
|
||||
{0}, /* interrupt status fifo for channel */
|
||||
hsdp_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
hsdp_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
|
||||
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
|
||||
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
|
||||
hsdp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
dpb_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
dpb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_HSDP, /* uint8 numunits */ /* number of units defined */
|
||||
0x0E, /* uint8 mask */ /* 8 devices - device mask */
|
||||
0x0C00, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE dpb_dev = {
|
||||
@@ -459,28 +459,28 @@ uint32 hsdpsec2star(uint32 daddr, int type)
|
||||
uint16 hsdp_preio(UNIT *uptr, uint16 chan)
|
||||
{
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
uint16 addr = GET_UADDR(uptr->CMD);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int unit = (uptr - dptr->units);
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "hsdp_preio CMD %08x unit %02x\n", uptr->CMD, unit);
|
||||
sim_debug(DEBUG_DETAIL, dptr, "hsdp_preio CMD %08x unit %02x\n", uptr->CMD, unit);
|
||||
if ((uptr->CMD & 0xff00) != 0) { /* just return if busy */
|
||||
return SNS_BSY;
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "hsdp_preio unit %02x chsa %04x OK\n", unit, addr);
|
||||
sim_debug(DEBUG_DETAIL, dptr, "hsdp_preio unit %02x chsa %04x OK\n", unit, chsa);
|
||||
return 0; /* good to go */
|
||||
}
|
||||
|
||||
uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
uint16 addr = GET_UADDR(uptr->CMD);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
CHANP *chp = find_chanp_ptr(addr); /* find the chanp pointer */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_startcmd addr %04x unit %02x cmd %02x CMD %08x\n",
|
||||
addr, unit, cmd, uptr->CMD);
|
||||
"hsdp_startcmd chsa %04x unit %02x cmd %02x CMD %08x\n",
|
||||
chsa, unit, cmd, uptr->CMD);
|
||||
if ((uptr->flags & UNIT_ATT) == 0) { /* unit attached status */
|
||||
sim_debug(DEBUG_CMD, dptr, "hsdp_startcmd unit %02x not attached\n", unit);
|
||||
uptr->SNS |= SNS_INTVENT; /* unit intervention required */
|
||||
@@ -505,7 +505,7 @@ uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
case DSK_INCH: /* INCH 0x0 */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_startcmd starting INCH %06x cmd, chsa %04x MemBuf %08x cnt %04x\n",
|
||||
uptr->u4, addr, chp->ccw_addr, chp->ccw_count);
|
||||
uptr->u4, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
uptr->CMD |= DSK_INCH2; /* use 0xF0 for inch, just need int */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
@@ -517,54 +517,25 @@ uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
case DSK_WD: /* Write command 0x01 */
|
||||
case DSK_RD: /* Read command 0x02 */
|
||||
case DSK_LMR: /* read mode register */
|
||||
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_startcmd starting disk seek r/w cmd %02x addr %04x\n",
|
||||
cmd, addr);
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_NOP: /* NOP 0x03 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_SNS: /* Sense 0x04 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
break;
|
||||
|
||||
case DSK_WSL: /* WSL 0x31 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_RSL: /* RSL 0x32 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_WTL: /* WTL 0x51 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_RTL: /* RTL 0x52 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_startcmd starting disk cmd %02x chsa %04x\n",
|
||||
cmd, chsa);
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_startcmd done with hsdp_startcmd %02x addr %04x SNS %08x\n",
|
||||
cmd, addr, uptr->SNS);
|
||||
"hsdp_startcmd done with hsdp_startcmd %02x chsa %04x SNS %08x\n",
|
||||
cmd, chsa, uptr->SNS);
|
||||
if (uptr->SNS & 0xff) /* any other cmd is error */
|
||||
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK;
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
@@ -576,8 +547,7 @@ t_stat hsdp_srv(UNIT *uptr)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
DIB *dibp = (DIB *)dptr->ctxt; /* get DIB address */
|
||||
CHANP *chp = (CHANP *)dibp->chan_prg; /* get pointer to channel program */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int cmd = uptr->CMD & DSK_CMDMSK;
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
uint32 trk, cyl, sec;
|
||||
@@ -676,7 +646,7 @@ t_stat hsdp_srv(UNIT *uptr)
|
||||
#endif
|
||||
uptr->CMD &= LMASK; /* remove old cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_srv cmd INCH chsa %04x addr %06x count %04x completed\n",
|
||||
"hsdp_srv cmd INCH chsa %04x chsa %06x count %04x completed\n",
|
||||
chsa, mema, chp->ccw_count);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
}
|
||||
@@ -975,13 +945,13 @@ goout:
|
||||
|
||||
/* just seek to the location where we will r/w data */
|
||||
if ((sim_fseek(uptr->fileref, tstart, SEEK_SET)) != 0) { /* do seek */
|
||||
sim_debug(DEBUG_EXP, dptr, "disk_srv Error on seek to %04x\n", tstart);
|
||||
sim_debug(DEBUG_EXP, dptr, "hsdp_srv Error on seek to %04x\n", tstart);
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
/* we are on cylinder/track/sector zero, so go on */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "disk_srv done seek trk 0\n");
|
||||
sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv done seek trk 0\n");
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_DEVEND|SNS_CHNEND);
|
||||
return SCPE_OK;
|
||||
@@ -1423,7 +1393,7 @@ void hsdp_ini(UNIT *uptr, t_bool f)
|
||||
uptr->CHS = 0; /* set CHS to cyl/hd/sec = 0 */
|
||||
uptr->STAR = 0; /* set STAR to cyl/hd/sec = 0 */
|
||||
uptr->CMD &= LMASK; /* clear out the flags but leave ch/sa */
|
||||
uptr->SNS = ((uptr->SNS & MASK24) | (hsdp_type[i].type << 24)); /* save mode value */
|
||||
// uptr->SNS = ((uptr->SNS & MASK24) | (hsdp_type[i].type << 24)); /* save mode value */
|
||||
/* total sectors on disk */
|
||||
uptr->capac = CAP(i); /* size in sectors */
|
||||
|
||||
@@ -1655,6 +1625,7 @@ int hsdp_format(UNIT *uptr) {
|
||||
t_stat hsdp_attach(UNIT *uptr, CONST char *file)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
DIB *dibp = 0;
|
||||
@@ -1722,7 +1693,8 @@ fmt:
|
||||
/* check for valid configured disk */
|
||||
/* must have valid DIB and Channel Program pointer */
|
||||
dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
//??if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (chp == NULL)) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"ERROR===ERROR\nHSDP device %s not configured on system, aborting\n",
|
||||
dptr->name);
|
||||
|
||||
@@ -448,6 +448,7 @@ t_stat lpr_attach(UNIT *uptr, CONST char *file)
|
||||
{
|
||||
t_stat r;
|
||||
uint16 chsa = GET_UADDR(uptr->CMDu3); /* get address of lpr device */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
DEVICE *dptr = get_dev(uptr); /* get device pointer */
|
||||
DIB *dibp = 0;
|
||||
|
||||
@@ -460,7 +461,8 @@ t_stat lpr_attach(UNIT *uptr, CONST char *file)
|
||||
/* check for valid configured lpr */
|
||||
/* must have valid DIB and Channel Program pointer */
|
||||
dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
//??if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (chp == NULL)) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"ERROR===ERROR\nLPR device %s not configured on system, aborting\n",
|
||||
dptr->name);
|
||||
|
||||
@@ -134,11 +134,11 @@ void mfp_ini(UNIT *uptr, t_bool f)
|
||||
int unit = (uptr - mfp_unit); /* unit 0 */
|
||||
DEVICE *dptr = &mfp_dev; /* one and only dummy device */
|
||||
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"MFP init device %s controller/device %04x\n",
|
||||
dptr->name, GET_UADDR(uptr->u3));
|
||||
mfp_data[unit].incnt = 0; /* no input data */
|
||||
uptr->u5 = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev,
|
||||
"MFP init device %s controller/device %04x SNS %08x\n",
|
||||
dptr->name, GET_UADDR(uptr->u3), uptr->u5);
|
||||
}
|
||||
|
||||
/* start an I/O operation */
|
||||
@@ -232,31 +232,68 @@ t_stat mfp_srv(UNIT *uptr)
|
||||
if (cmd == MFP_SID) { /* send 12 byte Status ID data */
|
||||
uint8 ch;
|
||||
|
||||
/* Word 0 */
|
||||
/* Word 0 */ /* board mod 4324724 = 0x0041fd74 */
|
||||
#ifdef USE_OLD_UTX
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 0 */
|
||||
ch = 0x41;
|
||||
chan_write_byte(chsa, &ch); /* write byte 1 */
|
||||
ch = 0x80;
|
||||
ch = 0xfd;
|
||||
chan_write_byte(chsa, &ch); /* write byte 2 */
|
||||
ch = 0x74;
|
||||
chan_write_byte(chsa, &ch); /* write byte 3 */
|
||||
#else
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 0 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 1 */
|
||||
ch = 0x81;
|
||||
chan_write_byte(chsa, &ch); /* write byte 2 */
|
||||
ch = 0x02;
|
||||
chan_write_byte(chsa, &ch); /* write byte 3 */
|
||||
#endif
|
||||
|
||||
/* Word 1 */
|
||||
/* Word 1 */ /* firmware 4407519 = 0x004340df */
|
||||
#ifdef USE_OLD_UTX
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 4 */
|
||||
ch = 0x43;
|
||||
chan_write_byte(chsa, &ch); /* write byte 5 */
|
||||
ch = 0x40;
|
||||
chan_write_byte(chsa, &ch); /* write byte 6 */
|
||||
ch = 0xdf;
|
||||
chan_write_byte(chsa, &ch); /* write byte 7 */
|
||||
#else
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 4 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 5 */
|
||||
ch = 0x80;
|
||||
chan_write_byte(chsa, &ch); /* write byte 6 */
|
||||
ch = 0x02;
|
||||
chan_write_byte(chsa, &ch); /* write byte 7 */
|
||||
#endif
|
||||
|
||||
/* Word 2 */
|
||||
/* Word 2 */ /* firmware rev 4259588 = 0x0040ff04 */
|
||||
#ifdef USE_OLD_UTX
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 8 */
|
||||
ch = 0x40;
|
||||
chan_write_byte(chsa, &ch); /* write byte 9 */
|
||||
ch = 0xff;
|
||||
chan_write_byte(chsa, &ch); /* write byte 10 */
|
||||
ch = 0x04;
|
||||
chan_write_byte(chsa, &ch); /* write byte 11 */
|
||||
#else
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 8 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 9 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 10 */
|
||||
ch = 0x14;
|
||||
chan_write_byte(chsa, &ch); /* write byte 11 */
|
||||
#endif
|
||||
|
||||
uptr->u3 &= LMASK; /* nothing left, command complete */
|
||||
sim_debug(DEBUG_CMD, &mfp_dev, "mfp_srv SID chan %02x: chnend|devend\n", chsa);
|
||||
|
||||
184
SEL32/sel32_mt.c
184
SEL32/sel32_mt.c
@@ -291,20 +291,20 @@ UNIT mta_unit[] = {
|
||||
CHANP mta_chp[NUM_UNITS_MT] = {0};
|
||||
|
||||
DIB mta_dib = {
|
||||
NULL, /* Pre Start I/O */
|
||||
mt_startcmd, /* Start a command */
|
||||
NULL, /* Stop I/O */
|
||||
NULL, /* Test I/O */
|
||||
NULL, /* Post I/O */
|
||||
mt_ini, /* init function */
|
||||
mta_unit, /* Pointer to units structure */
|
||||
mta_chp, /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_MT, /* number of units defined */
|
||||
0x07, /* 8 devices - device mask */
|
||||
0x1000, /* parent channel address */
|
||||
0, /* fifo input index */
|
||||
0, /* fifo output index */
|
||||
{0} /* interrupt status fifo for channel */
|
||||
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
mt_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
|
||||
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
|
||||
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
|
||||
mt_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
mta_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
mta_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_MT, /* uint8 numunits */ /* number of units defined */
|
||||
0x07, /* uint8 mask */ /* 8 devices - device mask */
|
||||
0x1000, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE mta_dev = {
|
||||
@@ -335,20 +335,20 @@ UNIT mtb_unit[] = {
|
||||
|
||||
/* device information block */
|
||||
DIB mtb_dib = {
|
||||
NULL, /* Pre Start I/O */
|
||||
mt_startcmd, /* Start a command */
|
||||
NULL, /* Stop I/O */
|
||||
NULL, /* Test I/O */
|
||||
NULL, /* Post I/O */
|
||||
mt_ini, /* init function */
|
||||
mtb_unit, /* Pointer to units structure */
|
||||
mtb_chp, /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_MT, /* number of units defined */
|
||||
0x07, /* 8 devices - device mask */
|
||||
0x1800, /* parent channel address */
|
||||
0, /* fifo input index */
|
||||
0, /* fifo output index */
|
||||
0, /* interrupt status fifo for channel */
|
||||
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
|
||||
mt_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
|
||||
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
|
||||
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
|
||||
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
|
||||
mt_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
|
||||
mtb_unit, /* UNIT* units */ /* Pointer to units structure */
|
||||
mtb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
|
||||
NUM_UNITS_MT, /* uint8 numunits */ /* number of units defined */
|
||||
0x07, /* uint8 mask */ /* 8 devices - device mask */
|
||||
0x1800, /* uint16 chan_addr */ /* parent channel address */
|
||||
0, /* uint32 chan_fifo_in */ /* fifo input index */
|
||||
0, /* uint32 chan_fifo_out */ /* fifo output index */
|
||||
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
|
||||
};
|
||||
|
||||
DEVICE mtb_dev = {
|
||||
@@ -454,52 +454,52 @@ uint16 mt_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
}
|
||||
|
||||
/* Map simH errors into machine errors */
|
||||
t_stat mt_error(UNIT *uptr, uint16 addr, t_stat r, DEVICE *dptr)
|
||||
t_stat mt_error(UNIT *uptr, uint16 chsa, t_stat r, DEVICE *dptr)
|
||||
{
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "mt_error status %08x\n", r);
|
||||
mt_busy[GET_DEV_BUF(dptr->flags)] &= ~1; /* not busy anymore */
|
||||
|
||||
switch (r) { /* switch on return value */
|
||||
case MTSE_OK: /* no error */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
break;
|
||||
|
||||
case MTSE_TMK: /* tape mark */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "FILE MARK\n");
|
||||
uptr->SNS |= SNS_FMRKDT; /* file mark detected */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
|
||||
case MTSE_WRP: /* write protected */
|
||||
uptr->SNS |= SNS_WRP; /* write protected */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "WRITE PROTECT %08x\n", r); /* operator intervention */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
break;
|
||||
|
||||
case MTSE_UNATT: /* unattached */
|
||||
uptr->SNS |= SNS_INTVENT; /* unit intervention required */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "ATTENTION %08x\n", r); /* operator intervention */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
|
||||
case MTSE_IOERR: /* IO error */
|
||||
case MTSE_FMT: /* invalid format */
|
||||
case MTSE_RECE: /* error in record */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "ERROR %08x\n", r);
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
break;
|
||||
|
||||
case MTSE_BOT: /* beginning of tape */
|
||||
uptr->SNS |= SNS_LOAD; /* tape at BOT */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "BOT\n");
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done with command */
|
||||
break;
|
||||
|
||||
case MTSE_INVRL: /* invalid rec lnt */
|
||||
case MTSE_EOM: /* end of medium */
|
||||
uptr->SNS |= SNS_EOT; /* tape at EOT */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "EOT\n");
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
}
|
||||
return SCPE_OK;
|
||||
@@ -508,14 +508,12 @@ t_stat mt_error(UNIT *uptr, uint16 addr, t_stat r, DEVICE *dptr)
|
||||
/* Handle processing of tape requests. */
|
||||
t_stat mt_srv(UNIT *uptr)
|
||||
{
|
||||
uint16 addr = GET_UADDR(uptr->CMD);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
// DIB *dibp = (DIB *)dptr->ctxt; /* get DIB address */
|
||||
// CHANP *chp = (CHANP *)dibp->chan_prg; /* get pointer to channel program */
|
||||
int unit = (uptr - dptr->units);
|
||||
int cmd = uptr->CMD & MT_CMDMSK;
|
||||
int bufnum = GET_DEV_BUF(dptr->flags);
|
||||
CHANP *chp = find_chanp_ptr(addr); /* find the chanp pointer */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
t_mtrlnt reclen;
|
||||
t_stat r = SCPE_ARG; /* Force error if not set */
|
||||
int i;
|
||||
@@ -529,7 +527,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->SNS |= SNS_INTVENT; /* unit intervention required */
|
||||
mt_busy[bufnum] &= ~1; /* make our buffer not busy */
|
||||
if (cmd != MT_SENSE) { /* we are completed with unit check status */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
}
|
||||
@@ -540,21 +538,21 @@ t_stat mt_srv(UNIT *uptr)
|
||||
mema = chp->ccw_addr; /* get inch or buffer addr */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"mt_srv starting INCH %06x cmd, chsa %04x MemBuf %06x cnt %04x\n",
|
||||
mema, addr, chp->ccw_addr, chp->ccw_count);
|
||||
mema, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
if (len == 0) {
|
||||
/* we have invalid count, error, bail out */
|
||||
uptr->CMD &= ~(0xffff); /* remove old status bits & cmd */
|
||||
uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
for (i=0; i < len; i++) {
|
||||
if (chan_read_byte(addr, &buf[i])) {
|
||||
if (chan_read_byte(chsa, &buf[i])) {
|
||||
/* we have error, bail out */
|
||||
uptr->CMD &= ~(0xffff); /* remove old status bits & cmd */
|
||||
uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
/* just dump data */
|
||||
@@ -567,7 +565,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
/* we have error, bail out */
|
||||
uptr->CMD &= ~(0xffff); /* remove old status bits & cmd */
|
||||
uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
/* set halfwords 16 & 17 to 5 as default retry count in inch data */
|
||||
@@ -576,31 +574,31 @@ t_stat mt_srv(UNIT *uptr)
|
||||
WMH(mema+(16<<1),5); /* write left HW with count */
|
||||
WMH(mema+(17<<1),5); /* write right HW with count */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"mt_srv cmd INCH chsa %04x addr %06x count %04x completed INCH16 %08x\n",
|
||||
addr, mema, chp->ccw_count, RMW(mema+(8<<2)));
|
||||
"mt_srv cmd INCH chsa %04x chsa %06x count %04x completed INCH16 %08x\n",
|
||||
chsa, mema, chp->ccw_count, RMW(mema+(8<<2)));
|
||||
uptr->CMD &= ~MT_CMDMSK; /* clear the cmd */
|
||||
mt_busy[bufnum] &= ~1; /* make our buffer not busy */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
break;
|
||||
|
||||
case 0x80: /* other? */ /* default to NOP */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "mt_srv cmd 80 DIAG unit=%04x SNS %08x\n", unit, uptr->SNS);
|
||||
ch = (uptr->SNS >> 24) & 0xff; /* get sense byte 0 status */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "sense unit %02x byte 0 %02x\n", unit, ch);
|
||||
chan_write_byte(addr, &ch); /* write byte 0 */
|
||||
chan_write_byte(chsa, &ch); /* write byte 0 */
|
||||
ch = (uptr->SNS >> 16) & 0xff; /* get sense byte 1 status */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "sense unit %02x byte 1 %02x\n", unit, ch);
|
||||
chan_write_byte(addr, &ch); /* write byte 1 */
|
||||
chan_write_byte(chsa, &ch); /* write byte 1 */
|
||||
ch = (uptr->SNS >> 8) & 0xff; /* get sense byte 2 status */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "sense unit %02x byte 2 %02x\n", unit, ch);
|
||||
chan_write_byte(addr, &ch); /* write byte 2 */
|
||||
chan_write_byte(chsa, &ch); /* write byte 2 */
|
||||
ch = (uptr->SNS >> 0) & 0xff; /* get sense byte 3 status */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "sense unit %02x byte 3 %02x\n", unit, ch);
|
||||
chan_write_byte(addr, &ch); /* write byte 3 */
|
||||
chan_write_byte(chsa, &ch); /* write byte 3 */
|
||||
/* write zero extra status */
|
||||
for (ch=4; ch < 0xc; ch++) {
|
||||
uint8 zc = 0;
|
||||
chan_write_byte(addr, &zc); /* write zero byte */
|
||||
chan_write_byte(chsa, &zc); /* write zero byte */
|
||||
sim_debug(DEBUG_CMD, &mta_dev,
|
||||
"sense unit %02x byte %1x %02x\n", unit, ch, zc);
|
||||
}
|
||||
@@ -608,13 +606,13 @@ t_stat mt_srv(UNIT *uptr)
|
||||
mt_busy[bufnum] &= ~1; /* make our buffer not busy */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "mt_srv DIAG SNS %08x char complete unit=%02x\n",
|
||||
uptr->SNS, unit);
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
break;
|
||||
|
||||
case MT_NOP: /* 0x03 */ /* NOP motion command */
|
||||
uptr->CMD &= ~MT_CMDMSK; /* clear the cmd */
|
||||
mt_busy[bufnum] &= ~1; /* make our buffer not busy */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
break;
|
||||
|
||||
case MT_SENSE: /* 0x04 */ /* get sense data */
|
||||
@@ -624,7 +622,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
ch = 0;
|
||||
if (i<4)
|
||||
ch = (uptr->SNS >> (24-(i*8))) & 0xff; /* get 8 bits of status */
|
||||
chan_write_byte(addr, &ch); /* write zero byte */
|
||||
chan_write_byte(chsa, &ch); /* write zero byte */
|
||||
sim_debug(DEBUG_CMD, &mta_dev,
|
||||
"sense unit %02x byte %1x %02x\n", unit, i, ch);
|
||||
}
|
||||
@@ -632,7 +630,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
mt_busy[bufnum] &= ~1; /* make our buffer not busy */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "mt_srv SENSE %08x char complete unit=%02x\n",
|
||||
uptr->SNS, unit);
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
break;
|
||||
|
||||
case MT_READ: /* 0x02 */ /* read a record from the device */
|
||||
@@ -649,7 +647,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_CMD, &mta_dev,
|
||||
"mt_srv READ %04x char complete unit=%02x sense %08x\n",
|
||||
uptr->POS, unit, uptr->SNS);
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* set CE, DE */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* set CE, DE */
|
||||
break;
|
||||
}
|
||||
/* read is not completed, get an input char */
|
||||
@@ -659,7 +657,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
if ((r = sim_tape_rdrecf(uptr, &mt_buffer[bufnum][0], &reclen, BUFFSIZE)) != MTSE_OK) {
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "mt_srv READ fill buffer unit=%02x\n", unit);
|
||||
uptr->CMD &= ~(MT_CMDMSK|MT_READDONE); /* clear all but readdone & cmd */
|
||||
return mt_error(uptr, addr, r, dptr); /* process any error & return status */
|
||||
return mt_error(uptr, chsa, r, dptr); /* process any error & return status */
|
||||
}
|
||||
uptr->SNS &= ~(SNS_LOAD|SNS_EOT); /* reset BOT & EOT */
|
||||
uptr->POS = 0; /* reset buffer position */
|
||||
@@ -675,13 +673,13 @@ t_stat mt_srv(UNIT *uptr)
|
||||
ch = mt_buffer[bufnum][uptr->POS++];
|
||||
|
||||
/* Send character over to channel */
|
||||
if (chan_write_byte(addr, &ch)) {
|
||||
if (chan_write_byte(chsa, &ch)) {
|
||||
sim_debug(DEBUG_CMD, &mta_dev,
|
||||
"Read unit %02x EOR cnt %04x hwm %04x\n", unit, uptr->POS, uptr->hwmark);
|
||||
/* If not read whole record, skip till end */
|
||||
if ((uint32)uptr->POS < uptr->hwmark) {
|
||||
/* Send dummy character to force SLI */
|
||||
chan_write_byte(addr, &ch); /* write the byte */
|
||||
chan_write_byte(chsa, &ch); /* write the byte */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Read unit %02x send dump SLI\n", unit);
|
||||
sim_activate(uptr, (uptr->hwmark-uptr->POS) * 10); /* wait again */
|
||||
uptr->CMD |= MT_READDONE; /* read is done */
|
||||
@@ -692,7 +690,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
unit, uptr->POS, ch, uptr->hwmark);
|
||||
uptr->CMD &= ~MT_CMDMSK; /* clear the cmd */
|
||||
mt_busy[bufnum] &= ~1; /* set not busy */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* return end status */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return end status */
|
||||
} else {
|
||||
sim_debug(DEBUG_DETAIL, &mta_dev,
|
||||
"Read data @2 unit %02x cnt %04x ch %02x hwm %04x\n",
|
||||
@@ -712,7 +710,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
case MT_SETM: /* 0x83 */ /* set mode byte */
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "mt_srv cmd 0x83 SETM unit=%02x\n", unit);
|
||||
/* Grab data until channel has no more */
|
||||
if (chan_read_byte(addr, &ch)) {
|
||||
if (chan_read_byte(chsa, &ch)) {
|
||||
if (uptr->POS > 0) { /* Only if data in record */
|
||||
reclen = uptr->hwmark; /* set record length */
|
||||
ch = mt_buffer[bufnum][0]; /* get the first byte read */
|
||||
@@ -723,7 +721,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->POS = 0; /* no bytes anymore */
|
||||
uptr->CMD &= ~MT_CMDMSK; /* no cmd to do */
|
||||
mt_busy[bufnum] &= ~1; /* set not busy */
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* return end status */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return end status */
|
||||
}
|
||||
} else {
|
||||
mt_buffer[bufnum][uptr->POS++] = ch; /* save the character read in */
|
||||
@@ -741,12 +739,12 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[bufnum] &= ~1;
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Write write protected unit=%02x\n", unit);
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Grab data until channel has no more */
|
||||
if (chan_read_byte(addr, &ch)) {
|
||||
if (chan_read_byte(chsa, &ch)) {
|
||||
if (uptr->POS > 0) { /* Only if data in record */
|
||||
reclen = uptr->hwmark;
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Write unit=%02x Block %04x chars\n",
|
||||
@@ -754,7 +752,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
r = sim_tape_wrrecf(uptr, &mt_buffer[bufnum][0], reclen);
|
||||
uptr->POS = 0;
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_error(uptr, addr, r, dptr); /* Record errors */
|
||||
mt_error(uptr, chsa, r, dptr); /* Record errors */
|
||||
}
|
||||
} else {
|
||||
mt_buffer[bufnum][uptr->POS++] = ch;
|
||||
@@ -769,7 +767,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
if (uptr->CMD & MT_READDONE) {
|
||||
uptr->CMD &= ~(MT_CMDMSK|MT_READDONE);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
@@ -778,13 +776,13 @@ t_stat mt_srv(UNIT *uptr)
|
||||
if (sim_tape_bot(uptr)) {
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[GET_DEV_BUF(dptr->flags)] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Read backward unit=%02x\n", unit);
|
||||
if ((r = sim_tape_rdrecr(uptr, &mt_buffer[bufnum][0], &reclen, BUFFSIZE)) != MTSE_OK) {
|
||||
uptr->CMD &= ~(MT_CMDMSK|MT_READDONE);
|
||||
return mt_error(uptr, addr, r, dptr);
|
||||
return mt_error(uptr, chsa, r, dptr);
|
||||
}
|
||||
uptr->POS = reclen;
|
||||
uptr->hwmark = reclen;
|
||||
@@ -793,7 +791,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
|
||||
ch = mt_buffer[bufnum][--uptr->POS];
|
||||
|
||||
if (chan_write_byte(addr, &ch)) {
|
||||
if (chan_write_byte(chsa, &ch)) {
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Read unit=%02x EOR cnt %04x\n",
|
||||
unit, uptr->POS);
|
||||
/* If not read whole record, skip till end */
|
||||
@@ -804,14 +802,14 @@ t_stat mt_srv(UNIT *uptr)
|
||||
}
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
} else {
|
||||
sim_debug(DEBUG_DETAIL, &mta_dev, "Read data unit=%02x %04x %02x\n",
|
||||
unit, uptr->POS, ch);
|
||||
if (uptr->POS == 0) { /* In IRG */
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
} else
|
||||
sim_activate(uptr, 40);
|
||||
}
|
||||
@@ -823,7 +821,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[GET_DEV_BUF(dptr->flags)] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
uptr->POS ++;
|
||||
@@ -832,7 +830,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Write Mark unit=%02x\n", unit);
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
r = sim_tape_wrtmk(uptr);
|
||||
chan_end(addr, SNS_DEVEND);
|
||||
chan_end(chsa, SNS_DEVEND);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
}
|
||||
break;
|
||||
@@ -845,7 +843,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
if (sim_tape_bot(uptr)) {
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[GET_DEV_BUF(dptr->flags)] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
uptr->POS++;
|
||||
@@ -873,19 +871,19 @@ t_stat mt_srv(UNIT *uptr)
|
||||
case 2:
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
break;
|
||||
case 3: /* EOF */
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
uptr->SNS |= SNS_FMRKDT; /* file mark detected */
|
||||
chan_end(addr, SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
case 4: /* BOT */
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
uptr->SNS |= SNS_LOAD; /* set BOT detected */
|
||||
chan_end(addr, SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -897,7 +895,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
if (sim_tape_bot(uptr)) {
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
break;
|
||||
}
|
||||
uptr->POS++;
|
||||
@@ -922,13 +920,13 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
uptr->SNS |= SNS_FMRKDT; /* file mark detected */
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_DEVEND);
|
||||
chan_end(chsa, SNS_DEVEND);
|
||||
break;
|
||||
case 3: /* BOT */
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
uptr->SNS |= SNS_LOAD; /* set BOT */
|
||||
chan_end(addr, SNS_DEVEND);
|
||||
chan_end(chsa, SNS_DEVEND);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -965,19 +963,19 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Skip record Completed\n");
|
||||
chan_end(addr, SNS_DEVEND);
|
||||
chan_end(chsa, SNS_DEVEND);
|
||||
break;
|
||||
case 3:
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Skip record now at EOF\n");
|
||||
chan_end(addr, SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
case 4:
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
sim_debug(DEBUG_CMD, &mta_dev, "Skip record now at EOT\n");
|
||||
chan_end(addr, SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -1014,7 +1012,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
mt_busy[bufnum] &= ~1;
|
||||
sim_debug(DEBUG_CMD, &mta_dev,
|
||||
"Skip file done sense %08x unit %02x\n", uptr->SNS, unit);
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
break;
|
||||
case 3:
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
@@ -1022,7 +1020,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
mt_busy[bufnum] &= ~1;
|
||||
sim_debug(DEBUG_CMD, &mta_dev,
|
||||
"Skip file got EOT sense %08x unit %02x\n", uptr->SNS, unit);
|
||||
chan_end(addr, SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_DEVEND|SNS_UNITEXP);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -1034,7 +1032,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
uptr->CMD &= ~MT_CMDMSK;
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_DEVEND|SNS_UNITEXP);
|
||||
chan_end(chsa, SNS_DEVEND|SNS_UNITEXP);
|
||||
} else {
|
||||
uptr->POS ++;
|
||||
sim_activate(uptr, 500);
|
||||
@@ -1050,7 +1048,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
uptr->CMD &= ~(MT_CMDMSK);
|
||||
mt_busy[bufnum] &= ~1;
|
||||
/* we are done dev|chan end */
|
||||
chan_end(addr, SNS_DEVEND);
|
||||
chan_end(chsa, SNS_DEVEND);
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -1066,7 +1064,7 @@ t_stat mt_srv(UNIT *uptr)
|
||||
r = sim_tape_rewind(uptr);
|
||||
uptr->SNS |= SNS_LOAD; /* set BOT */
|
||||
mt_busy[bufnum] &= ~1;
|
||||
chan_end(addr, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we are done dev|chan end */
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -1112,6 +1110,7 @@ t_stat mt_reset(DEVICE *dptr)
|
||||
t_stat mt_attach(UNIT *uptr, CONST char *file)
|
||||
{
|
||||
uint16 chsa = GET_UADDR(uptr->CMD); /* get address of mt device */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
DEVICE *dptr = get_dev(uptr); /* get device pointer */
|
||||
t_stat r;
|
||||
DIB *dibp = 0;
|
||||
@@ -1129,7 +1128,8 @@ t_stat mt_attach(UNIT *uptr, CONST char *file)
|
||||
/* check for valid configured tape */
|
||||
/* must have valid DIB and Channel Program pointer */
|
||||
dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
//??if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (chp == NULL)) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"ERROR===ERROR\nMT device %s not configured on system, aborting\n",
|
||||
dptr->name);
|
||||
|
||||
@@ -368,10 +368,10 @@ uint16 scfi_preio(UNIT *uptr, uint16 chan)
|
||||
|
||||
uint16 scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
uint16 addr = GET_UADDR(uptr->CMD);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
CHANP *chp = find_chanp_ptr(addr); /* find the chanp pointer */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scfi_startcmd unit %02x cmd %04x CMD %08x\n",
|
||||
@@ -397,7 +397,7 @@ uint16 scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
case DSK_INCH: /* INCH 0x00 */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scfi_startcmd starting INCH %06x cmd, chsa %04x MemBuf %08x cnt %04x\n",
|
||||
uptr->u4, addr, chp->ccw_addr, chp->ccw_count);
|
||||
uptr->u4, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
uptr->CMD |= DSK_INCH2; /* use 0xf0 for inch, just need int */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
@@ -409,29 +409,18 @@ uint16 scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
case DSK_WD: /* Write command 0x01 */
|
||||
case DSK_RD: /* Read command 0x02 */
|
||||
case DSK_LMR: /* read mode register */
|
||||
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scfi_startcmd starting disk seek r/w cmd %02x addr %04x\n", cmd, addr);
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_NOP: /* NOP 0x03 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_SNS: /* Sense 0x04 */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scfi_startcmd starting disk seek r/w cmd %02x chsa %04x\n", cmd, chsa);
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
}
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scfi_startcmd done with scfi_startcmd %02x addr %04x SNS %08x\n",
|
||||
cmd, addr, uptr->SNS);
|
||||
"scfi_startcmd done with scfi_startcmd %02x chsa %04x SNS %08x\n",
|
||||
cmd, chsa, uptr->SNS);
|
||||
if (uptr->SNS & 0xff) /* any other cmd is error */
|
||||
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK;
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
@@ -444,8 +433,7 @@ t_stat scfi_srv(UNIT *uptr)
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
/* get pointer to Dev Info Blk for this device */
|
||||
DIB *dibp = (DIB *)dptr->ctxt;
|
||||
CHANP *chp = (CHANP *)dibp->chan_prg; /* get pointer to channel program */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int cmd = uptr->CMD & DSK_CMDMSK;
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
uint32 trk, cyl, sec;
|
||||
@@ -478,7 +466,6 @@ t_stat scfi_srv(UNIT *uptr)
|
||||
case DSK_INCH2: /* use 0xff for inch, just need int */
|
||||
{
|
||||
uint32 mema; /* memory address */
|
||||
// uint32 daws[8]; /* drive attribute registers */
|
||||
// uint32 i, j;
|
||||
uint32 i;
|
||||
|
||||
@@ -907,7 +894,7 @@ void scfi_ini(UNIT *uptr, t_bool f)
|
||||
int i = GET_TYPE(uptr->flags);
|
||||
|
||||
uptr->CMD &= ~0xffff; /* clear out the flags but leave ch/sa */
|
||||
uptr->SNS = ((uptr->SNS & 0x00ffffff) | (scfi_type[i].type << 24)); /* save mode value */
|
||||
// uptr->SNS = ((uptr->SNS & 0x00ffffff) | (scfi_type[i].type << 24)); /* save mode value */
|
||||
/* total sectors on disk */
|
||||
uptr->capac = CAP(i); /* disk size in sectors */
|
||||
|
||||
@@ -923,7 +910,6 @@ t_stat scfi_reset(DEVICE * dptr)
|
||||
|
||||
/* create the disk file for the specified device */
|
||||
int scfi_format(UNIT *uptr) {
|
||||
// uint16 addr = GET_UADDR(uptr->CMD);
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int32 ssize = scfi_type[type].ssiz * 4; /* disk sector size in bytes */
|
||||
@@ -987,6 +973,7 @@ int scfi_format(UNIT *uptr) {
|
||||
/* attach the selected file to the disk */
|
||||
t_stat scfi_attach(UNIT *uptr, CONST char *file) {
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
DIB *dibp = 0;
|
||||
@@ -1052,7 +1039,8 @@ fmt:
|
||||
/* check for valid configured disk */
|
||||
/* must have valid DIB and Channel Program pointer */
|
||||
dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
//??if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (dibp->chan_prg == NULL)) {
|
||||
if ((dib_unit[chsa] == NULL) || (dibp == NULL) || (chp == NULL)) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"ERROR===ERROR\nSCFI device %s not configured on system, aborting\n",
|
||||
dptr->name);
|
||||
|
||||
@@ -177,6 +177,7 @@ bits 24-31 - FHD head count (number of heads on FHD or number head on FHD option
|
||||
#define DSK_TCMD 0xD3 /* Transfer Command Packet (specifies CDB to send) */
|
||||
//#define DSK_ICH 0xFF /* Initialize Controller */
|
||||
#define DSK_FRE 0xF3 /* Reserved */
|
||||
#define DSK_SID 0x80 /* MFP stataus command */
|
||||
|
||||
#define STAR u4
|
||||
/* u4 - sector target address register (STAR) */
|
||||
@@ -276,8 +277,8 @@ scsi_type[] =
|
||||
{"SD1200", 15, 192, 49, 648, 1931, 0x40}, /*3 8835 1200M 1389584 sec */
|
||||
{"8820", 9, 256, 18, 324, 967, 0x41}, /*4 8820 150M */
|
||||
{"8821", 9, 256, 36, 648, 967, 0x41}, /*5 8828 300M */
|
||||
{"8833", 18, 256, 20, 648, 46725, 0x41}, /*6 8833 700M */
|
||||
{"8835", 18, 256, 20, 648, 46725, 0x41}, /*7 8835 1200M */
|
||||
{"8833", 18, 256, 20, 648, 1546, 0x41}, /*6 8833 700M */
|
||||
{"8835", 18, 256, 20, 648, 1931, 0x41}, /*7 8835 1200M */
|
||||
/* For UTX */
|
||||
{NULL, 0}
|
||||
};
|
||||
@@ -297,7 +298,7 @@ t_stat scsi_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *c
|
||||
const char *scsi_description (DEVICE *dptr);
|
||||
|
||||
/* One buffer per unit */
|
||||
#define BUFFSIZE (64)
|
||||
#define BUFFSIZE (256)
|
||||
uint8 scsi_buf[NUM_DEVS_SCSI][NUM_UNITS_SCSI][BUFFSIZE];
|
||||
uint8 scsi_pcmd[NUM_DEVS_SCSI][NUM_UNITS_SCSI];
|
||||
|
||||
@@ -315,13 +316,7 @@ MTAB scsi_mod[] = {
|
||||
UNIT sba_unit[] = {
|
||||
/* SET_TYPE(0) SD150 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7600)}, /* 0 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7601)}, /* 1 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7602)}, /* 2 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7603)}, /* 3 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7604)}, /* 4 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7605)}, /* 5 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7606)}, /* 6 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7607)}, /* 7 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7608)}, /* 1 */
|
||||
};
|
||||
|
||||
//DIB sba_dib = {scsi_preio, scsi_startcmd, NULL, NULL, NULL, scsi_ini, sba_unit, sba_chp, NUM_UNITS_SCSI, 0x0f, 0x0400, 0, 0, 0};
|
||||
@@ -360,13 +355,7 @@ CHANP sbb_chp[NUM_UNITS_SCSI] = {0};
|
||||
UNIT sbb_unit[] = {
|
||||
/* SET_TYPE(0) DM150 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7640)}, /* 0 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7641)}, /* 1 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7642)}, /* 2 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7643)}, /* 3 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7644)}, /* 4 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7645)}, /* 5 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7646)}, /* 6 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7647)}, /* 7 */
|
||||
{UDATA(&scsi_srv, UNIT_SCSI|SET_TYPE(0), 0), 0, UNIT_ADDR(0x7648)}, /* 1 */
|
||||
};
|
||||
|
||||
//DIB sdb_dib = {scsi_preio, scsi_startcmd, NULL, NULL, NULL, scsi_ini, sdb_unit, sdb_chp, NUM_UNITS_SCSI, 0x0f, 0x0c00, 0, 0, 0};
|
||||
@@ -427,14 +416,14 @@ uint16 scsi_preio(UNIT *uptr, uint16 chan)
|
||||
|
||||
uint16 scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
{
|
||||
uint16 addr = GET_UADDR(uptr->CMD);
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int unit = (uptr - dptr->units);
|
||||
CHANP *chp = find_chanp_ptr(addr); /* find the chanp pointer */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_startcmd unit %02x cmd %02x CMD %08x\n",
|
||||
unit, cmd, uptr->CMD);
|
||||
"scsi_startcmd unit %02x cmd %02x CMD %08x SNS %08x\n",
|
||||
unit, cmd, uptr->CMD, uptr->SNS);
|
||||
if ((uptr->flags & UNIT_ATT) == 0) { /* unit attached status */
|
||||
uptr->SNS |= SNS_INTVENT; /* unit intervention required */
|
||||
if (cmd != DSK_SNS) /* we are completed with unit check status */
|
||||
@@ -459,10 +448,21 @@ uint16 scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
#endif
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_startcmd starting INCH %06x cmd, chsa %04x MemBuf %08x cnt %04x\n",
|
||||
uptr->u4, addr, chp->ccw_addr, chp->ccw_count);
|
||||
uptr->u4, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
uptr->CMD |= DSK_INCH2; /* use 0xF0 for inch, just need int */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
// sim_activate(uptr, 20); /* start things off */
|
||||
sim_activate(uptr, 100); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_RCAP: /* Read Capacity 0x53 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_startcmd starting disk RCAP cmd %02x chsa %04x\n", cmd, chsa);
|
||||
// sim_activate(uptr, 200); /* start things off */
|
||||
sim_activate(uptr, 100); /* start things off */
|
||||
// sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
@@ -471,46 +471,27 @@ uint16 scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
|
||||
case DSK_WD: /* Write command 0x01 */
|
||||
case DSK_RD: /* Read command 0x02 */
|
||||
case DSK_LMR: /* read mode register */
|
||||
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_startcmd starting disk seek r/w cmd %02x addr %04x\n", cmd, addr);
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_NOP: /* NOP 0x03 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_SNS: /* Sense 0x04 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
case DSK_RCAP: /* Read Capacity 0x53 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
// case DSK_RCAP: /* Read Capacity 0x53 */
|
||||
/* Transfer Command Packet (specifies CDB to send) */
|
||||
case DSK_TCMD: /* Transfer command packet 0xD3 */
|
||||
case DSK_SID: /* channel Sense 0x80 */
|
||||
uptr->CMD |= cmd; /* save cmd */
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_startcmd starting disk seek r/w cmd %02x chsa %04x\n", cmd, chsa);
|
||||
// sim_activate(uptr, 20); /* start things off */
|
||||
sim_activate(uptr, 100); /* start things off */
|
||||
return 0;
|
||||
break;
|
||||
|
||||
}
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_startcmd done with scsi_startcmd %02x addr %04x SNS %08x\n",
|
||||
cmd, addr, uptr->SNS);
|
||||
"scsi_startcmd done with scsi_startcmd %02x chsa %04x SNS %08x\n",
|
||||
cmd, chsa, uptr->SNS);
|
||||
if (uptr->SNS & 0xff) /* any other cmd is error */
|
||||
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK;
|
||||
sim_activate(uptr, 20); /* start things off */
|
||||
// sim_activate(uptr, 20); /* start things off */
|
||||
sim_activate(uptr, 100); /* start things off */
|
||||
return SNS_CHNEND|SNS_DEVEND;
|
||||
}
|
||||
|
||||
@@ -520,8 +501,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
/* get pointer to Dev Info Blk for this device */
|
||||
DIB *dibp = (DIB *)dptr->ctxt;
|
||||
CHANP *chp = (CHANP *)dibp->chan_prg; /* get pointer to channel program */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */
|
||||
int cmd = uptr->CMD & DSK_CMDMSK;
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
int unit = (uptr - dptr->units);
|
||||
@@ -547,7 +527,8 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
}
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv cmd=%02x chsa %04x count %04x\n", cmd, chsa, chp->ccw_count);
|
||||
"scsi_srv cmd=%02x chsa %04x count %04x SNS %02x\n",
|
||||
cmd, chsa, chp->ccw_count, uptr->SNS);
|
||||
switch (cmd) {
|
||||
case 0: /* No command, stop disk */
|
||||
break;
|
||||
@@ -581,7 +562,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
#endif
|
||||
uptr->CMD &= LMASK; /* remove old cmd */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv cmd INCH chsa %04x addr %06x count %04x completed\n",
|
||||
"scsi_srv cmd INCH chsa %04x chsa %06x count %04x completed\n",
|
||||
chsa, mema, chp->ccw_count);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
}
|
||||
@@ -595,6 +576,47 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
/* 3 status wds are to be returned */
|
||||
/* Wd 1 MMXXXXXX board model # assume 00 00 08 02*/
|
||||
/* Wd 2 MMXXXXXX board firmware model # assume 00 00 08 02*/
|
||||
/* Wd 3 MMXXXXXX board firmware revision # assume 00 00 00 14*/
|
||||
case DSK_SID: /* 0x80 */ /* this is really for the MFP controller */
|
||||
/* send 12 byte Status ID data */
|
||||
/* Word 0 */ /* board mod 4324724 = 0x0041fd74 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 0 */
|
||||
ch = 0x41;
|
||||
chan_write_byte(chsa, &ch); /* write byte 1 */
|
||||
ch = 0xfd;
|
||||
chan_write_byte(chsa, &ch); /* write byte 2 */
|
||||
ch = 0x74;
|
||||
chan_write_byte(chsa, &ch); /* write byte 3 */
|
||||
|
||||
/* Word 1 */ /* firmware 4407519 = 0x004340df */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 4 */
|
||||
ch = 0x43;
|
||||
chan_write_byte(chsa, &ch); /* write byte 5 */
|
||||
ch = 0x40;
|
||||
chan_write_byte(chsa, &ch); /* write byte 6 */
|
||||
ch = 0xdf;
|
||||
chan_write_byte(chsa, &ch); /* write byte 7 */
|
||||
|
||||
/* Word 2 */ /* firmware rev 4259588 = 0x0040ff04 */
|
||||
ch = 0x00;
|
||||
chan_write_byte(chsa, &ch); /* write byte 8 */
|
||||
ch = 0x40;
|
||||
chan_write_byte(chsa, &ch); /* write byte 9 */
|
||||
ch = 0xff;
|
||||
chan_write_byte(chsa, &ch); /* write byte 10 */
|
||||
ch = 0x04;
|
||||
chan_write_byte(chsa, &ch); /* write byte 11 */
|
||||
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
sim_debug(DEBUG_CMD, dptr, "scsi_srv SID chan %02x: chnend|devend\n", chsa);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
|
||||
break;
|
||||
|
||||
case DSK_SNS: /* 0x4 */
|
||||
sim_debug(DEBUG_CMD, dptr, "scsi_startcmd CMD sense\n");
|
||||
|
||||
@@ -637,38 +659,6 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
|
||||
/* bytes 8-11 - drive mode register entries from assigned disk */
|
||||
ch = scsi_type[type].type & 0xff; /* type byte */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv datr unit=%02x 1 %02x\n",
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
ch = scsi_type[type].spt & 0xff; /* get sectors per track */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv datr unit=%02x 2 %02x\n",
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
ch = scsi_type[type].nhds & 0xff; /* get # MHD heads */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv datr unit=%02x 3 %02x\n",
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
ch = 0; /* no FHD heads */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv datr unit=%02x 4 %02x\n",
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
|
||||
/* bytes 12 & 13 are optional, so check if read done */
|
||||
/* TODO add drive status bits here */
|
||||
if ((test_write_byte_end(chsa)) == 0) {
|
||||
/* bytes 12 & 13 contain drive related status */
|
||||
ch = 0; /* zero for now */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv dsr unit=%02x 1 %02x\n",
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
|
||||
ch = 0x30; /* drive on cylinder and ready for now */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv dsr unit=%02x 2 %02x\n",
|
||||
unit, ch);
|
||||
chan_write_byte(chsa, &ch);
|
||||
}
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
break;
|
||||
@@ -693,7 +683,8 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_CMD, dptr, "scsi_srv seek over on cylinder unit=%02x %04x %04x\n",
|
||||
unit, uptr->STAR, uptr->CHS);
|
||||
uptr->CHS = uptr->STAR; /* we are there */
|
||||
sim_activate(uptr, 10);
|
||||
// sim_activate(uptr, 10);
|
||||
sim_activate(uptr, 40);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@@ -835,48 +826,175 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
if (uptr->SNS & SNS_TCMD) {
|
||||
/* we need to process a read TCMD data */
|
||||
int cnt = scsi_buf[bufnum][unit][4]; /* byte count of status to send */
|
||||
ch = scsi_buf[bufnum][unit][0]; /* return TCMD cmd */
|
||||
uptr->SNS &= ~SNS_TCMD; /* show not presessing TCMD cmd chain */
|
||||
ch = scsi_buf[bufnum][unit][0]; /* return TCMD cmd */
|
||||
uint32 cyl = CYL(type); /* number of cylinders */
|
||||
uint32 spt = SPT(type); /* sectors per track */
|
||||
uint32 ssb = SSB(type); /* sector size in bytes */
|
||||
int bcnt;
|
||||
/* cnt has # bytes to return (0xf0) */
|
||||
uint8 pagecode = scsi_buf[bufnum][unit][2] & 0x3f; /* get page code */
|
||||
uint8 pagecont = (scsi_buf[bufnum][unit][2] & 0xc0) >> 6; /* get page control */
|
||||
uptr->SNS &= ~SNS_TCMD; /* show not presessing TCMD cmd chain */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv returning TCMD cmd status, chsa %04x tcma %06x cnt %04x\n",
|
||||
chsa, chp->ccw_addr, chp->ccw_count);
|
||||
"scsi_srv processing TCMD read cmd %02x, chsa %04x tcma %06x cnt %04x\n",
|
||||
ch, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
/* ssize has sector size in bytes */
|
||||
for (i=0; i<cnt; i++) {
|
||||
buf[i] = 0; /* clear buffer */
|
||||
}
|
||||
/* set some sense data from SH.DCSCI driver code */
|
||||
buf[0] = 0xf0; /* page code */
|
||||
buf[4] = 0x81;
|
||||
buf[8] = 0x91;
|
||||
buf[12] = 0xf4;
|
||||
buf[17] = (uint8)HDS(type); /* # of heads */
|
||||
buf[23] = (uint8)SPT(type); /* Sect/track */
|
||||
// buf[27] = SPT(type); /* Sect/track */
|
||||
for (i=0; i<cnt; i++) {
|
||||
if (chan_write_byte(chsa, &buf[i])) {
|
||||
/* we have error, bail out */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK;
|
||||
switch (ch) {
|
||||
case 0x25: /* read capacity */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv TCMD read call DSK_RCAP cmd %02x, chsa %04x tcma %06x cnt %04x\n",
|
||||
ch, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
goto read_cap; /* use IOCL cmd processing */
|
||||
break;
|
||||
|
||||
case 0x28: /* read 10 byte cmd */
|
||||
/* blk is in bytes 2-5, sects is in 7-8 */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv TCMD call read cmd %02x, chsa %04x tcma %06x cnt %04x\n",
|
||||
ch, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
tstart = (scsi_buf[bufnum][unit][2] << 24) | /* get sector address */
|
||||
(scsi_buf[bufnum][unit][3] << 16) |
|
||||
(scsi_buf[bufnum][unit][4] << 8) |
|
||||
(scsi_buf[bufnum][unit][5]);
|
||||
bcnt = (scsi_buf[bufnum][unit][8] << 8) | /* get transfer block count */
|
||||
(scsi_buf[bufnum][unit][9]);
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv TCMD call read DATA cmd %02x, chsa %04x buf addr %08x SA %08x cnt %02x\n",
|
||||
ch, chsa, chp->ccw_addr, tstart, bcnt);
|
||||
|
||||
/* convert sect address to chs value */
|
||||
// uptr->CHS = scsisec2star(tstart, type);
|
||||
uptr->CHS = tstart;
|
||||
/* get byte address for seek */
|
||||
tstart = tstart * SSB(type);
|
||||
|
||||
/* just seek to the location where we will r/w data */
|
||||
if ((sim_fseek(uptr->fileref, tstart, SEEK_SET)) != 0) { /* do seek */
|
||||
sim_debug(DEBUG_EXP, dptr, "scsi_srv read TCMD Error on seek to %04x\n", tstart);
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
}
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD sense data chsa=%02x data %02x%02x%02x%02x %02x%02x%02x%02x\n",
|
||||
chsa, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD sense data chsa=%02x data %02x%02x%02x%02x %02x%02x%02x%02x\n",
|
||||
chsa, buf[8], buf[9], buf[10], buf[11], buf[12], buf[13], buf[14], buf[15]);
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD sense data chsa=%02x data %02x%02x%02x%02x %02x%02x%02x%02x\n",
|
||||
chsa, buf[16], buf[17], buf[18], buf[19], buf[20], buf[21], buf[22], buf[23]);
|
||||
/* we are on cylinder/track/sector, get data to write */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv TCMD done seek\n");
|
||||
tstart = uptr->CHS; /* get sector offset back */
|
||||
goto doread; /* use IOCL cmd processing */
|
||||
break;
|
||||
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
return SCPE_OK;
|
||||
case 0x1a: /* mode sense */
|
||||
for (i=0; i<cnt; i++) {
|
||||
buf[i] = 0; /* clear buffer */
|
||||
}
|
||||
/* test for "special" mpx status request */
|
||||
if (cnt == 0x18 && scsi_buf[bufnum][unit][2] == 0x03) {
|
||||
/* set some sense data from SH.DCSCI driver code */
|
||||
buf[0] = 0xf0; /* page length */
|
||||
buf[4] = 0x81; /* savable and page type 1 */
|
||||
buf[8] = 0x91;
|
||||
buf[12] = 0xf4;
|
||||
buf[17] = (uint8)HDS(type); /* # of heads */
|
||||
buf[23] = (uint8)SPT(type); /* Sect/track */
|
||||
// buf[27] = SPT(type); /* Sect/track */
|
||||
goto merge; /* go output data and return */
|
||||
}
|
||||
/* this is most likely UTX calling */
|
||||
pagecode = scsi_buf[bufnum][unit][2] & 0x3f; /* get page code */
|
||||
pagecont = (scsi_buf[bufnum][unit][2] & 0xc0) >> 6; /* get page control */
|
||||
/* pagecont = 0 return current values */
|
||||
/* pagecont = 1 return changable values */
|
||||
/* pagecont = 2 return default values */
|
||||
/* pagecont = 3 return saved values */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv TCMD read call MOD SEN cmd %02x pgcd %02x pgco %1x chsa %04x tcma %06x cnt %04x\n",
|
||||
ch, pagecode, pagecont, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
buf[0] = 0xf0; /* page length */
|
||||
if (pagecode == 3) {
|
||||
buf[2] = 0; /* 0x80 if write protected */
|
||||
buf[3] = 0; /* block descriptor length */
|
||||
// buf[4] = 0x83; /* savable and page type 3 */
|
||||
buf[4] = 0x03; /* not savable and page type 3 */
|
||||
buf[5] = 22; /* 22 data bytes follow */
|
||||
buf[6] = 0; /* tracks per zone ub */
|
||||
buf[7] = 1; /* tracks per zone lb */
|
||||
buf[8] = 0; /* alt sec per zone ub */
|
||||
buf[9] = 1; /* alt sec per zone lb */
|
||||
buf[10] = 0; /* alt trks per zone ub */
|
||||
buf[11] = 0; /* alt trks per zone lb */
|
||||
buf[12] = 0; /* alt trks per unit ub */
|
||||
buf[13] = 0; /* alt trks per unit lb */
|
||||
buf[14] = (uint8)((spt & 0xff00) >> 8); /* Sect/track */
|
||||
buf[15] = (uint8)((spt & 0x00ff)); /* Sect/track */
|
||||
buf[16] = (uint8)((ssb & 0xff00) >> 8); /* Sect size */
|
||||
buf[17] = (uint8)((ssb & 0x00ff)); /* Sect size */
|
||||
buf[18] = 0; /* interleave ub */
|
||||
buf[19] = 0; /* interleave lb */
|
||||
buf[20] = 0; /* track skew factor ub */
|
||||
buf[21] = 0; /* track skew factor lb */
|
||||
buf[22] = 0; /* cyl skew factor ub */
|
||||
buf[23] = 0; /* cyl skew factor lb */
|
||||
// buf[24] |= 0x80; /* soft sectoring */
|
||||
buf[24] |= 0x40; /* hard sectoring */
|
||||
// buf[24] |= 0x20; /* drive removable */
|
||||
// buf[24] |= 0x08; /* inhibit save */
|
||||
goto merge; /* go output data and return */
|
||||
}
|
||||
if (pagecode == 4) {
|
||||
/* num cyl */
|
||||
buf[2] = 0; /* 0x80 if write protected */
|
||||
buf[3] = 0; /* block descriptor length */
|
||||
// buf[4] = 0x84; /* savable and page type 4 */
|
||||
buf[4] = 0x04; /* not savable and page type 4 */
|
||||
buf[5] = 18; /* 18 data bytes follow */
|
||||
buf[6] = (uint8)((cyl & 0xff0000) >> 16);
|
||||
buf[7] = (uint8)((cyl & 0x00ff00) >> 8);
|
||||
buf[8] = (uint8)((cyl & 0x0000ff));
|
||||
buf[9] = (uint8)HDS(type); /* # of heads */
|
||||
goto merge; /* go output data and return */
|
||||
}
|
||||
merge:
|
||||
/* output response data */
|
||||
for (i=0; i<cnt; i++) {
|
||||
if (chan_write_byte(chsa, &buf[i])) {
|
||||
/* we have error, bail out */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK;
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
}
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD inq read data chsa=%02x data %02x%02x%02x%02x %02x%02x%02x%02x\n",
|
||||
chsa, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]);
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD inq read data chsa=%02x data %02x%02x%02x%02x %02x%02x%02x%02x\n",
|
||||
chsa, buf[8], buf[9], buf[10], buf[11], buf[12], buf[13], buf[14], buf[15]);
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD inq read data chsa=%02x data %02x%02x%02x%02x %02x%02x%02x%02x\n",
|
||||
chsa, buf[16], buf[17], buf[18], buf[19], buf[20], buf[21], buf[22], buf[23]);
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
return SCPE_OK;
|
||||
break;
|
||||
|
||||
case 0x00: /* test unit ready */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
sim_debug(DEBUG_CMD, dptr, "scsi_srv test unit ready cmd %02x unit %02x\n", ch, unit);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
return SCPE_OK;
|
||||
break;
|
||||
|
||||
default: /* bad or unsupported scsi command */
|
||||
sim_debug(DEBUG_CMD, dptr, "invalid scsi read command %02x unit %02x\n", ch, unit);
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
doread:
|
||||
/* normal disk read starts here */
|
||||
/* tstart has start of sector address in bytes */
|
||||
if ((uptr->CMD & DSK_READING) == 0) { /* see if we are reading data */
|
||||
uptr->CMD |= DSK_READING; /* read from disk starting */
|
||||
@@ -905,7 +1023,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_CMD, dptr, "scsi_srv after READ chsa %04x count %04x\n",
|
||||
chsa, chp->ccw_count);
|
||||
|
||||
/* process the next sector of data */
|
||||
/* process the sector of data */
|
||||
for (i=0; i<len; i++) {
|
||||
ch = buf[i]; /* get a char from buffer */
|
||||
if (chan_write_byte(chsa, &ch)) { /* put a byte to memory */
|
||||
@@ -927,7 +1045,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_DATA, dptr,
|
||||
"SCSI Read complete for read from diskfile sector %06x\n",
|
||||
uptr->CHS);
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
|
||||
break;
|
||||
}
|
||||
@@ -950,12 +1068,61 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
sim_debug(DEBUG_DATA, dptr,
|
||||
"SCSI sector read complete, %x bytes to go from diskfile sector %06x\n",
|
||||
chp->ccw_count, uptr->CHS);
|
||||
sim_activate(uptr, 10); /* wait to read next aector */
|
||||
sim_activate(uptr, 10); /* wait to read next sector */
|
||||
//BAD4MPX sim_activate(uptr, 40); /* wait to read next sector */
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case DSK_WD: /* Write Data */
|
||||
if (uptr->SNS & SNS_TCMD) {
|
||||
/* we need to process a write TCMD data */
|
||||
/* cnt has # bytes to return (0xf0) */
|
||||
|
||||
ch = scsi_buf[bufnum][unit][0]; /* return TCMD cmd */
|
||||
uptr->SNS &= ~SNS_TCMD; /* show not presessing TCMD cmd chain */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv processing TCMD write cmd %02x, chsa %04x tcma %06x cnt %04x\n",
|
||||
ch, chsa, chp->ccw_addr, chp->ccw_count);
|
||||
|
||||
switch (ch) {
|
||||
case 0x2a: /* write 10 byte cmd */
|
||||
tstart = (scsi_buf[bufnum][unit][2] << 24) | /* get sector address */
|
||||
(scsi_buf[bufnum][unit][3] << 16) |
|
||||
(scsi_buf[bufnum][unit][4] << 8) |
|
||||
(scsi_buf[bufnum][unit][5]);
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"scsi_srv TCMD call write DATA cmd %02x, chsa %04x addr %08x data %08x %08x\n",
|
||||
ch, chsa, chp->ccw_addr, RMW(chp->ccw_addr), RMW(chp->ccw_addr+4));
|
||||
|
||||
/* convert sect address to chs value */
|
||||
uptr->CHS = tstart; /* set seek sector address */
|
||||
/* get byte address for seek */
|
||||
tstart = tstart * SSB(type);
|
||||
|
||||
/* just seek to the location where we will r/w data */
|
||||
if ((sim_fseek(uptr->fileref, tstart, SEEK_SET)) != 0) { /* do seek */
|
||||
sim_debug(DEBUG_EXP, dptr, "scsi_srv TCMD Error on seek to %04x\n", tstart);
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
}
|
||||
/* we are on cylinder/track/sector, get data to write */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "scsi_srv TCMD done seek\n");
|
||||
tstart = uptr->CHS; /* get sector offset */
|
||||
goto dowrite;
|
||||
break;
|
||||
|
||||
default: /* bad or unsupported scsi command */
|
||||
sim_debug(DEBUG_CMD, dptr, "invalid scsi write command %02x unit %02x\n", ch, unit);
|
||||
uptr->SNS |= SNS_CMDREJ;
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
|
||||
return SCPE_OK;
|
||||
break;
|
||||
}
|
||||
}
|
||||
dowrite:
|
||||
/* tstart has file offset in sectors */
|
||||
if ((uptr->CMD & DSK_WRITING) == 0) { /* see if we are writing data */
|
||||
uptr->CMD |= DSK_WRITING; /* write to disk starting */
|
||||
@@ -1020,6 +1187,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
break;
|
||||
}
|
||||
sim_activate(uptr, 10); /* keep writing */
|
||||
//BAD4MPX sim_activate(uptr, 40); /* keep writing */
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@@ -1029,6 +1197,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
/* wd 1 disk size in sectors */
|
||||
/* wd 2 is sector size in bytes */
|
||||
/* cap has disk capacity */
|
||||
read_cap: /* merge point from TCMD processing */
|
||||
for (i=0; i<4; i++) {
|
||||
/* I think they want cap-1, not cap?????????? */
|
||||
/* verified that MPX wants cap-1, else J.VFMT aborts */
|
||||
@@ -1043,7 +1212,7 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
}
|
||||
/* ssize has sector size in bytes */
|
||||
for (i=0; i<4; i++) {
|
||||
ch = (((int32)ssize) >> ((3-i)*8)) & 0xff;
|
||||
ch = (((uint32)ssize) >> ((3-i)*8)) & 0xff;
|
||||
if (chan_write_byte(chsa, &ch)) {
|
||||
/* we have error, bail out */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
@@ -1101,15 +1270,20 @@ t_stat scsi_srv(UNIT *uptr)
|
||||
}
|
||||
}
|
||||
sim_debug(DEBUG_DETAIL, dptr,
|
||||
"scsi_srv TCMD data chsa=%02x data %02x %02x %02x %02x %02x %02x\n",
|
||||
chsa, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
|
||||
"scsi_srv TCMD data chsa=%02x data %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
|
||||
chsa, buf[0], buf[1], buf[2], buf[3], buf[4],
|
||||
buf[5], buf[6], buf[7], buf[8], buf[9]);
|
||||
|
||||
/* save the CMD packet */
|
||||
for (i=0; i < len; i++) {
|
||||
scsi_buf[bufnum][unit][i] = buf[i]; /* save the cmd */
|
||||
}
|
||||
scsi_pcmd[bufnum][unit] = buf[0]; /* save the cmd */
|
||||
uptr->SNS |= SNS_TCMD; /* show Presessing CMD cmd chain */
|
||||
/* see if just test unit ready */
|
||||
if ((buf[0] == 0) && (len == 6))
|
||||
uptr->SNS &= ~SNS_TCMD; /* clear TCMD flag */
|
||||
else
|
||||
uptr->SNS |= SNS_TCMD; /* show Presessing CMD cmd chain */
|
||||
|
||||
/* command is completed */
|
||||
uptr->CMD &= LMASK; /* remove old status bits & cmd */
|
||||
@@ -1147,7 +1321,7 @@ void scsi_ini(UNIT *uptr, t_bool f)
|
||||
/* total sectors on disk */
|
||||
uptr->capac = CAP(i); /* disk size in sectors */
|
||||
|
||||
sim_debug(DEBUG_EXP, &sba_dev, "SBA init device %s on unit SBA%.1x cap %x %d\n",
|
||||
sim_debug(DEBUG_EXP, &sba_dev, "SBA init device %s on unit SBA%04x cap %x %d\n",
|
||||
dptr->name, GET_UADDR(uptr->CMD), uptr->capac, uptr->capac);
|
||||
}
|
||||
|
||||
@@ -1159,7 +1333,6 @@ t_stat scsi_reset(DEVICE * dptr)
|
||||
|
||||
/* create the disk file for the specified device */
|
||||
int scsi_format(UNIT *uptr) {
|
||||
// struct ddata_t *data = (struct ddata_t *)uptr->up7;
|
||||
int type = GET_TYPE(uptr->flags);
|
||||
DEVICE *dptr = get_dev(uptr);
|
||||
int32 ssize = scsi_type[type].ssiz * 4; /* disk sector size in bytes */
|
||||
@@ -1207,20 +1380,6 @@ int scsi_format(UNIT *uptr) {
|
||||
0,0x22c2813e,0,0x06020000,0xf4,0,0x431b1c,0,
|
||||
};
|
||||
|
||||
#ifdef USE_FOR_MPX
|
||||
{
|
||||
/* some values created by j.vfmt */
|
||||
// 0xf003d14f,0x8a03cda0,0x9a03cdbf,0x8903cdc0,
|
||||
// 0x9903d01f,0x8c03d020,0x9c03d14f,0xf4000000,
|
||||
0xf0000000 | (cap-1), 0x8a000000 | daddr,
|
||||
0x9a000000 | (daddr + ((2 * tsize) - 1)),
|
||||
0x89000000 | (daddr + (2 * tsize)),
|
||||
0x99000000 | ((cap-1)-spc),
|
||||
0x8c000000 | (cap-spc),
|
||||
0x9c000000 | (cap-1), 0xf4000000,
|
||||
};
|
||||
#endif
|
||||
|
||||
/* vendor flaw map in vaddr */
|
||||
uint32 vmap[2] = {0xf0000004, 0xf4000000};
|
||||
|
||||
@@ -1455,7 +1614,7 @@ fmt:
|
||||
scsi_type[type].name, chsa, CYL(type), HDS(type), SPT(type), SPC(type),
|
||||
CAP(type), CAPB(type));
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "File %s at chsa %04x attached to %s\r\n",
|
||||
sim_debug(DEBUG_CMD, dptr, "File %s at chsa %04x attached to %s\n",
|
||||
file, chsa, scsi_type[type].name);
|
||||
|
||||
/* check for valid configured disk */
|
||||
@@ -1537,7 +1696,7 @@ t_stat scsi_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
|
||||
const char *cptr)
|
||||
{
|
||||
int i;
|
||||
fprintf (st, "SEL-32 MFP SCSI Buss Disk Controller\r\n");
|
||||
fprintf (st, "SEL-32 MFP SCSI Bus Disk Controller\r\n");
|
||||
fprintf (st, "Use:\r\n");
|
||||
fprintf (st, " sim> SET %sn TYPE=type\r\n", dptr->name);
|
||||
fprintf (st, "Type can be: ");
|
||||
|
||||
@@ -30,6 +30,7 @@ set CPU 32/67 4M
|
||||
; RTC realtime clock
|
||||
set RTC 50
|
||||
;set RTC 60
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
|
||||
@@ -31,6 +31,7 @@ set CPU 32/67 4M
|
||||
; RTC realtime clock
|
||||
set RTC 50
|
||||
;set RTC 60
|
||||
set RTC enable
|
||||
; RTC debug options
|
||||
;set RTC debug=cmd
|
||||
;
|
||||
|
||||
Reference in New Issue
Block a user