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Updated Makefile and README for SEL32.

This commit is contained in:
Richard Cornwell
2019-07-17 21:39:18 -04:00
parent 8813d7da0c
commit a17c0576bf
2 changed files with 116 additions and 55 deletions

149
README.md
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@@ -1,15 +1,70 @@
[![Coverity Scan Build Status](https://scan.coverity.com/projects/12020/badge.svg)](https://scan.coverity.com/projects/rcornwell-sims)
# Development Simulators.
This is a working copy of my Burroughs B5500, Dec PDP6, KA10, KI10, SEL32, IBM 360 and IBM7000
series simulators for SimH.
This is a working copy of my Burroughs B5500, Dec PDP6, KA10, KI10, IBM 360 and IBM7000 series
simulators for SimH.
# Stable released simulators.
# IBM 7000 simulators.
Latest status for I7000 Cpus:
## i701
* Largely untested.
## i704
* SAP works.
* Fortran II works in some cases.
## i7010
* PR155 works.
* PR108 works.
* Most Diags appear to pass without serious error.
* Protection mode has some errors left.
* Protection mode does not handle setting H or L to 0.
## i7070
* Will load Diags.
## i7080
* Sort of working.
* RWW, ECB untested.
* TLx instructions implimented, untested, see 8SE
* Will boot from card.
* Tape system appear to be working.
* 8CU10B errors:
410, 412, 413, 414, 418, 419, 420-427 error becuase
storage is not parity checked.
440 divide not producing correct sign on error.
## i7090
* Working with exceptions.
* Known bugs:
* DFDP/DFMP Sometimes off by +/-1 or 2 in least signifigant part of result.
* EAD +n + -n should be -0 is +0
* Not all channel skips working for 9P01C.
* HTx Not sure what problems are, does not quite work.
* DKx Sometimes fails diagnostics with missing inhibit of interrupt.
* CTSS works.
* IBSYS works.
* Stand alone assembler works.
* Lisp 1.5 works.
* Signifigance mode Not tested, Test Code Needed.
# Burroughs B5500
This is the same version as in the current simH source tree. It is working
correctly as far as I am able to tell. It will currently run MCP XIII and XV.
Emulates a dual CPU B5500 with up to 32K of memory. I can support either DFX disks or
dual disks up to 20 units. Up to 16 magnetic tapes drives is support. 2 Card readers
a card punch and a pair of line printers.
# Dec PDP6
@@ -74,6 +129,24 @@ and transfering to the loaded value. RC10, RH10, TM10 support readin mode.
Support for KL10A will be started in the summer.
# Development Simulators.
# Dec KL10
Still in initial coding stages.
Disk
* RH10 RP04/RP06/RP07 (RP07 not supported under 6.03).
* RH10 RS04
Tape
* TM10A or B
* RH10 TM03/TU16
DC10E terminal mux.
IMP networking support for ITS and TENEX.
# ICL 1900 simulator.
This is a new simulator. Will pass 1904E/1905E CPU diagnostics (FLIT). Will boot paper
@@ -101,57 +174,25 @@ Support for the following units:
Communications
* 2703 with 16 lines of 2741 or 1050.
# IBM 7000 simulators.
Latest status for I7000 Cpus:
# SEL32 Development Simulator
## i701
This is a working copy of a simulator for the SEL Concept/32 computer.
The current test version is for the SEL 32/27, 32/67, 32/87, 32/97 computers.
Support for 32/55, 32/75, V6, and V9 computers may be added in the future.
This simulator is co-authors with James C. Bevier. I did the initial parts
of the simulator, James took it to a working simulator, I m assisting him
in maintaining and enhancing the simulator.
* Largely untested.
# SEL Concept/32
## i704
* SAP works.
* Fortran II works in some cases.
This simulator is running a test version of MPX-32 1.5F. It is capable of
creating a disk image of the O/S from a SDT tape. The disk image can be
booted, initialized, and run many of the MPX utilities; including OPCOM & TSM.
Eight terminals can be used to access TSM via Telnet port 4747. Initial
support has been added for excess 64 floating point arithmetic. More testing
is still required. The sim32disk.gz can be uncompressed and booted with the
sel32.27.sim32.disk.ini initialization file. The sim32sdt.tap.gz file can
also be uncompressed and started with the sel32.27.sim32.tape.ini initialization
file to install from tape.
## i7010
* PR155 works.
* PR108 works.
* Most Diags appear to pass without serious error.
* Protection mode has some errors left.
* Protection mode does not handle setting H or L to 0.
## i7070
* Will load Diags.
## i7080
* Sort of working.
* RWW, ECB untested.
* TLx instructions implimented, untested, see 8SE
* Will boot from card.
* Tape system appear to be working.
* 8CU10B errors:
410, 412, 413, 414, 418, 419, 420-427 error becuase
storage is not parity checked.
440 divide not producing correct sign on error.
## i7090
* Working with exceptions.
* Known bugs:
* DFDP/DFMP Sometimes off by +/-1 or 2 in least signifigant part of result.
* EAD +n + -n should be -0 is +0
* Not all channel skips working for 9P01C.
* HTx Not sure what problems are, does not quite work.
* DKx Sometimes fails diagnostics with missing inhibit of interrupt.
* CTSS works.
* IBSYS works.
* Stand alone assembler works.
* Lisp 1.5 works.
* Signifigance mode Not tested, Test Code Needed.

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@@ -1181,6 +1181,16 @@ DISPLAYD = display
#
# Emulator source files and compile time options
#
SEL32D = SEL32
#
SEL32 = ${SEL32D}/sel32_cpu.c ${SEL32D}/sel32_sys.c ${SEL32D}/sel32_defs.h \
${SEL32D}/sel32_chan.c ${SEL32D}/sel32_iop.c ${SEL32D}/sel32_com.c \
${SEL32D}/sel32_con.c ${SEL32D}/sel32_clk.c ${SEL32D}/sel32_mt.c \
${SEL32D}/sel32_lpr.c ${SEL32D}/sel32_scfi.c ${SEL32D}/sel32_fltpt.c \
${SEL32D}/sel32_disk.c
SEL32_OPT = -I $(SEL32D) -DSEL32
#SEL32_OPT = -I $(SEL32D) -DUSE_INT64 -DSEL32
ICL1900D = ICL1900
ICL1900 = ${ICL1900D}/icl1900_cpu.c ${ICL1900D}/icl1900_sys.c \
${ICL1900D}/icl1900_stdio.c ${ICL1900D}/icl1900_cty.c \
@@ -1874,7 +1884,7 @@ ATT3B2_OPT = -I ${ATT3B2D} -DUSE_INT64 -DUSE_ADDR64
#
# Build everything (not the unsupported/incomplete or experimental simulators)
#
ALL = b5500 i701 i704 i7010 i7070 i7080 i7090 pdp10-ka pdp10-ki ibm360 ibm360_32 icl1900 pdp6
ALL = b5500 i701 i704 i7010 i7070 i7080 i7090 pdp10-ka pdp10-ki ibm360 ibm360_32 icl1900 pdp6 sel32
all : ${ALL}
@@ -2225,6 +2235,16 @@ ifneq (,$(call find_test,${ICL1900D},icl1900))
$@ $(call find_test,${ICL1900D},icl1900) $(TEST_ARG)
endif
sel32: $(BIN)sel32$(EXE)
${BIN}sel32${EXE}: ${SEL32} ${SIM}
${MKDIRBIN}
${CC} ${SEL32} ${SIM} ${SEL32_OPT} $(CC_OUTSPEC) ${LDFLAGS}
ifneq (,$(call find_test,${SEL32D},sel32))
$@ $(call find_test,${SEL32D},sel32) $(TEST_ARG)
endif
s3 : ${BIN}s3${EXE}
${BIN}s3${EXE} : ${S3} ${SIM}