mirror of
https://github.com/rcornwell/sims.git
synced 2026-01-25 19:56:04 +00:00
IBM460: Fix MVCL and page length.
This commit is contained in:
@@ -573,7 +573,7 @@ int TransAddr(uint32 va, uint32 *pa) {
|
||||
} else {
|
||||
addr = (entry >> 28) + 1;
|
||||
/* Check if entry valid and in correct length */
|
||||
if (entry & PTE_VALID || (page >> pte_len_shift) > addr) {
|
||||
if (entry & PTE_VALID || (page >> pte_len_shift) >= addr) {
|
||||
M[0x90 >> 2] = va;
|
||||
key[0] |= 0x6;
|
||||
PC = iPC;
|
||||
@@ -2375,7 +2375,7 @@ save_dbl:
|
||||
if ((cpu_unit[0].flags & FEAT_370) != 0) {
|
||||
addr2 = (entry >> 28) + 1;
|
||||
/* Check if over end of table */
|
||||
if ((page >> pte_len_shift) > addr2) {
|
||||
if ((page >> pte_len_shift) >= addr2) {
|
||||
cc = 3;
|
||||
regs[reg1] = addr1;
|
||||
per_mod |= 1 << reg1;
|
||||
@@ -3460,17 +3460,14 @@ save_dbl:
|
||||
src2 = regs[R2(reg)|1];
|
||||
fill = (src2 >> 24) & 0xff;
|
||||
src2 &= AMASK;
|
||||
dest = addr2 + src2;
|
||||
desth = addr1 + src1;
|
||||
if ((dest & ~AMASK) != 0) { /* Wrap around */
|
||||
if (addr2 > desth || desth <= addr1) {
|
||||
cc = 3;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
if (desth < dest && addr1 >= addr2) {
|
||||
cc = 3;
|
||||
break;
|
||||
|
||||
if (src1 > 1 && src2 > 1) {
|
||||
dest = addr2 + ((src2 < src1) ? src2 : src1) - 1;
|
||||
dest &= AMASK;
|
||||
if ((dest > addr2 && (addr1 > addr2 && addr1 <= dest)) ||
|
||||
(dest <= addr2 && (addr1 > addr1 || addr1 <= dest))) {
|
||||
cc = 3;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (src1 == 0)
|
||||
|
||||
Reference in New Issue
Block a user