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mirror of https://github.com/rcornwell/sims.git synced 2026-01-27 04:21:59 +00:00

KA10: Cleanup some Windows biuld errors with KS10.

This commit is contained in:
Richard Cornwell
2021-02-08 21:51:00 -05:00
parent 552a391380
commit ec0193996e
4 changed files with 37 additions and 35 deletions

View File

@@ -176,8 +176,10 @@ t_stat ctyo_svc (UNIT *uptr)
sim_debug(DEBUG_DETAIL, &cty_dev, "CTY Write %012llo\n", buffer);
if (buffer & CTY_CHAR) {
if (!full(&cty_out)) {
buffer = sim_tt_outcvt ( buffer, TT_GET_MODE (uptr->flags));
cty_out.buff[cty_out.in_ptr] = (uint8)(buffer & 0377);
int32 ch;
ch = buffer & 0377;
ch = sim_tt_outcvt ( ch, TT_GET_MODE (uptr->flags));
cty_out.buff[cty_out.in_ptr] = (uint8)(ch & 0377);
buffer = 0;
if (Mem_write_word(CTY_OUT, &buffer, 0) == 0) {
inci(&cty_out);

View File

@@ -36,7 +36,7 @@
#if (NUM_DEVS_DZ > 0)
#define DC10_LINES 8
#define DZ11_LINES 8
#define STATUS u3

View File

@@ -345,6 +345,14 @@ rp_write(t_addr addr, uint16 data, int32 access) {
UNIT *uptr = &rpa_unit[rp_unit];
int dtype = GET_DTYPE(uptr->flags);
/* If drive not ready don't do anything */
if ((rp_ie & CS1_GO) != 0|| (uptr->STATUS & DS_PIP) != 0) {
uptr->CMD |= (ER1_RMR << 16);
// rp_cs2 |= CS2_PGE;
sim_debug(DEBUG_DETAIL, &rpa_dev, "RP%o not ready\n", rp_unit);
return 0;
}
switch(addr & 076) {
/* u3 low */
case 000: /* RPC - 176700 - control */
@@ -352,13 +360,6 @@ rp_write(t_addr addr, uint16 data, int32 access) {
break;
sim_debug(DEBUG_DETAIL, &rpa_dev, "RP%o Status=%06o\n", rp_unit, uptr->CMD);
/* If drive not ready don't do anything */
if ((rp_ie & CS1_GO) != 0|| (uptr->STATUS & DS_PIP) != 0) {
uptr->CMD |= (ER1_RMR << 16);
rp_cs2 |= CS2_PGE;
sim_debug(DEBUG_DETAIL, &rpa_dev, "RP%o not ready\n", rp_unit);
return 0;
}
rp_ba = ((data << 8) & 0600000) | (rp_ba & 0177777);
rp_ie = data & (CS1_IE);
uptr->CMD = data & 076;
@@ -551,12 +552,10 @@ rp_read(t_addr addr, uint16 *data, int32 access) {
temp = uptr->CMD & 076;
temp |= (uint16)rp_ie;
temp |= (rp_ba & 0600000) >> 8;
if ((rp_ie & CS1_GO) == 0 && (uptr->STATUS & DS_PIP) == 0)
temp |= CS1_RDY;
if (uptr->flags & UNIT_ATT) {
temp |= CS1_DVA;
if (rp_ie & CS1_GO)
temp |= CS1_GO;
if ((rp_ie & CS1_GO) == 0 && (uptr->STATUS & DS_PIP) == 0)
temp |= CS1_RDY;
}
break;
case 002: /* RPWC - 176702 - word count */
@@ -654,7 +653,6 @@ t_stat rp_svc (UNIT *uptr)
{
int dtype = GET_DTYPE(uptr->flags);
int cyl = GET_CY(uptr->DA);
DIB *dibp;
int unit;
DEVICE *dptr;
int diff, da;
@@ -968,9 +966,7 @@ rp_boot(int32 unit_num, DEVICE * rptr)
uint32 addr;
uint32 ptr = 0;
uint64 len;
int wc;
int i;
uint64 word;
int da;
/* Read in block 1 and see if it is a home block */
disk_read(uptr, &rp_buf[0], 1, RP_NUMWD);
@@ -985,25 +981,25 @@ rp_boot(int32 unit_num, DEVICE * rptr)
}
/* Word 103 and 102 contain pointer to SMFILE block */
uptr->DA = ((rp_buf[0103] & 077) << DA_V_SC) |
(((rp_buf[0103] >> 8) & 077) << DA_V_SF) |
((rp_buf[0103] >> 24) << DC_V_CY);
len = rp_buf[0102];
uptr->DA = (int32)((rp_buf[0103] & 077) << DA_V_SC) |
(int32)(((rp_buf[0103] >> 8) & 077) << DA_V_SF) |
(int32)((rp_buf[0103] >> 24) << DC_V_CY);
len = (int)(rp_buf[0102] & RMASK);
da = GET_DA(uptr->DA, dtype);
disk_read(uptr, &rp_buf[0], da, RP_NUMWD);
/* For diagnostics use locations 6 and 7 */
if (sim_switches & SWMASK ('D')) {
sim_messagef(SCPE_OK, "Diags boot\n");
uptr->DA = ((rp_buf[06] & 077) << DA_V_SC) |
(((rp_buf[06] >> 8) & 077) << DA_V_SF) |
((rp_buf[06] >> 24) << DC_V_CY);
len = (rp_buf[07] & 077) * 4;
uptr->DA = (int32)((rp_buf[06] & 077) << DA_V_SC) |
(int32)(((rp_buf[06] >> 8) & 077) << DA_V_SF) |
(int32)((rp_buf[06] >> 24) << DC_V_CY);
len = (int)(((rp_buf[07] & 077) * 4) & RMASK);
} else {
/* Normal is at 4 and 5*/
uptr->DA = ((rp_buf[04] & 077) << DA_V_SC) |
(((rp_buf[04] >> 8) & 077) << DA_V_SF) |
((rp_buf[04] >> 24) << DC_V_CY);
len = (rp_buf[05] & 077) * 4;
uptr->DA = (int32)((rp_buf[04] & 077) << DA_V_SC) |
(int32)(((rp_buf[04] >> 8) & 077) << DA_V_SF) |
(int32)((rp_buf[04] >> 24) << DC_V_CY);
len = (int)(((rp_buf[05] & 077) * 4) & RMASK);
}
/* Read len sectors into address 1000 */

View File

@@ -197,24 +197,28 @@ int
uba_read_npr_byte(t_addr addr, uint16 ctl, uint16 *data)
{
int ubm = uba_device[ctl];
return 0;
}
int
uba_write_npr_byte(t_addr addr, uint16 ctl, uint16 data)
{
int ubm = uba_device[ctl];
return 0;
}
int
uba_read_npr_word(t_addr addr, uint16 ctl, uint16 *data)
{
int ubm = uba_device[ctl];
return 0;
}
int
uba_write_npr_word(t_addr addr, uint16 ctl, uint16 data)
{
int ubm = uba_device[ctl];
return 0;
}
void
@@ -244,7 +248,7 @@ uba_get_vect(t_addr addr, int lvl)
DEVICE *dptr;
DIB *idev = NULL;
uint64 buffer;
uint8 ivect;
uint16 ivect;
int i;
int high = 0;
int ctl = 17;
@@ -331,7 +335,7 @@ uba_set_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
if (r != SCPE_OK)
return r;
dibp->uba_addr = newaddr;
dibp->uba_addr = (uint32)(newaddr & RMASK);
return SCPE_OK;
}
@@ -339,7 +343,7 @@ t_stat
uba_show_addr (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
DEVICE *dptr = find_dev_from_unit(uptr);
DIB *dibp = (DIB *) dptr->ctxt;
DIB *dibp = (DIB *) dptr->ctxt;
if (dibp == NULL)
return SCPE_IERR;
fprintf(st, "addr=%07o", dibp->uba_addr);
@@ -375,7 +379,7 @@ uba_set_br(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
if (br < 4 || br > 7)
return SCPE_ARG;
dibp->uba_br = br;
dibp->uba_br = (uint16)br;
return SCPE_OK;
}
@@ -417,7 +421,7 @@ uba_set_vect(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
if (r != SCPE_OK)
return r;
dibp->uba_vect = vect;
dibp->uba_vect = (uint16)vect;
return SCPE_OK;
}
@@ -461,7 +465,7 @@ uba_set_ctl(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
if (ctl != 1 || ctl != 3)
return SCPE_ARG;
dibp->uba_ctl = ctl;
dibp->uba_ctl = (uint16)ctl;
return SCPE_OK;
}