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SCP: Updated to current.

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This commit is contained in:
Richard Cornwell
2019-07-20 13:54:14 -04:00
parent b86496bac4
commit f35a8a995d
4 changed files with 40 additions and 36 deletions
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6
scp.c
View File

@@ -6581,7 +6581,7 @@ while ((c = strchr (c, '/'))) {
return sim_messagef (SCPE_ARG, "%s is not a directory\n", path);
}
if (
#if defined(_MSC_VER)
#if defined(_WIN32)
mkdir (path)
#else
mkdir (path, 0777)
@@ -6592,7 +6592,7 @@ while ((c = strchr (c, '/'))) {
++c;
}
if (
#if defined(_MSC_VER)
#if defined(_WIN32)
mkdir (path)
#else
mkdir (path, 0777)
@@ -13568,7 +13568,7 @@ return SCPE_OK;
#define HLP_MATCH_AMBIGUOUS (~0u)
#define HLP_MATCH_WILDCARD (~1U)
#define HLP_MATCH_NONE 0
static int matchHelpTopicName (TOPIC *topic, const char *token)
static size_t matchHelpTopicName (TOPIC *topic, const char *token)
{
size_t i, match;
char cbuf[CBUFSIZE], *cptr;

8
sim_BuildROMs.c
View File

@@ -66,7 +66,7 @@ struct ROM_File_Descriptor {
{"VAX/ka750_old.bin", "VAX/vax_ka750_bin_old.h", 1024, 0xFFFEBAA5, "vax_ka750_bin_old", "From ROM set: 990A9, 948A9, 906A9, 905A9 (Boots: A=DD, B=DM, C=DL, D=DU"},
{"VAX/vcb02.bin", "VAX/vax_vcb02_bin.h", 16384, 0xFFF1D2AD, "vax_vcb02_bin"},
{"VAX/vmb.exe", "VAX/vax_vmb_exe.h", 44544, 0xFFC014BB, "vax_vmb_exe"},
{"PDP11/lunar11/lunar.lda", "PDP11/pdp11_vt_lunar_rom.h", 13824 , 0xFFF15D00, "lunar_lda"},
{"PDP11/lunar11/lunar.lda", "PDP11/pdp11_vt_lunar_rom.h", 13824, 0xFFF15D00, "lunar_lda"},
{"PDP11/dazzledart/dazzle.lda", "PDP11/pdp11_dazzle_dart_rom.h", 6096, 0xFFF83848, "dazzle_lda"},
{"PDP11/11logo/11logo.lda", "PDP11/pdp11_11logo_rom.h", 26009, 0xFFDD77F7, "logo_lda"},
{"swtp6800/swtp6800/swtbug.bin", "swtp6800/swtp6800/swtp_swtbug_bin.h", 1024, 0xFFFE4FBC, "swtp_swtbug_bin"},
@@ -83,6 +83,7 @@ struct ROM_File_Descriptor {
#include <sys/utime.h>
#define utimbuf _utimbuf
#define utime _utime
#define snprintf _snprintf
#else
#include <utime.h>
#endif
@@ -206,11 +207,12 @@ if ((c = strchr (array_name, '.')))
*c = '_';
if ((c = strchr (array_name, '/')))
*c = '_';
sprintf (include_filename, "%s.h", cleaned_rom_filename);
include_filename[sizeof (include_filename) - 1] = '\0';
snprintf (include_filename, sizeof (include_filename) - 1, "%s.h", cleaned_rom_filename);
if ((c = strrchr (include_filename, '/')))
sprintf (c+1, "%s.h", array_name);
else
sprintf (include_filename, "%s.h", array_name);
snprintf (include_filename, sizeof (include_filename) - 1, "%s.h", array_name);
printf ("The ROMs array entry for this new ROM image file should look something like:\n");
printf ("{\"%s\", \"%s\", %d, 0x%08X, \"%s\"}\n",
rom_filename, include_filename, (int)(statb.st_size), checksum, array_name);

2
sim_tape.c
View File

@@ -4240,7 +4240,7 @@ static void ansi_fill_text_buffer (FILE *f, char *buf, size_t buf_size, size_t r
memcpy (buf + offset, tmp, move_size);
offset += move_size;
if (offset == buf_size) {
fseek (f, start + move_size, SEEK_SET);
(void)fseek (f, start + move_size, SEEK_SET);
break;
}
}

60
sim_timer.c
View File

@@ -2530,8 +2530,8 @@ else {
}
crtc->hz = 0; /* back to 0 */
}
sim_debug (DBG_CAL|DBG_INT, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Changing Calibrated Timer from %d (%dHz) to %d (%dHz)\n", newtmr, sim_calb_tmr, crtc->last_hz, tmr, rtc->hz);
}
sim_debug (DBG_CAL|DBG_INT, &sim_timer_dev, "_rtcn_configure_calibrated_clock(newtmr=%d) - Changing Calibrated Timer from %d (%dHz) to %d (%dHz)\n", newtmr, sim_calb_tmr, crtc->hz, tmr, crtc->hz);
sim_calb_tmr = tmr;
}
sim_calb_tmr = tmr;
@@ -2767,36 +2767,38 @@ if ((inst_delay == 0) && (usec_delay != 0))
inst_delay_d = inst_delay = 1; /* Minimum non-zero delay is 1 instruction */
if (uptr->usecs_remaining != 0.0) /* No calibrated timer yet, wait one cycle */
inst_delay_d = inst_delay = 1; /* Minimum non-zero delay is 1 instruction */
crtc = &rtcs[sim_calb_tmr];
if ((sim_calb_tmr != -1) && (crtc->hz)) { /* Calibrated Timer available? */
int32 inst_til_tick = sim_activate_time (crtc->timer_unit) - 1;
int32 ticks_til_calib = crtc->hz - crtc->ticks;
double usecs_per_tick = floor (1000000.0 / crtc->hz);
int32 inst_til_calib = inst_til_tick + ((ticks_til_calib - 1) * crtc->currd);
uint32 usecs_til_calib = (uint32)ceil(inst_til_calib / inst_per_usec);
if (sim_calb_tmr != -1) {
crtc = &rtcs[sim_calb_tmr];
if (crtc->hz) { /* Calibrated Timer available? */
int32 inst_til_tick = sim_activate_time (crtc->timer_unit) - 1;
int32 ticks_til_calib = crtc->hz - crtc->ticks;
double usecs_per_tick = floor (1000000.0 / crtc->hz);
int32 inst_til_calib = inst_til_tick + ((ticks_til_calib - 1) * crtc->currd);
uint32 usecs_til_calib = (uint32)ceil(inst_til_calib / inst_per_usec);
if ((uptr != crtc->timer_unit) && /* Not scheduling calibrated timer */
(inst_til_tick > 0)) { /* and tick not pending? */
if (inst_delay_d > (double)inst_til_calib) { /* long wait? */
stat = sim_clock_coschedule_tmr (uptr, sim_calb_tmr, ticks_til_calib - 1);
uptr->usecs_remaining = (stat == SCPE_OK) ? usec_delay - usecs_til_calib : 0.0;
sim_debug (DBG_TIM, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - coscheduling with with calibrated timer(%d), ticks=%d, usecs_remaining=%.0f usecs, inst_til_tick=%d, ticks_til_calib=%d, usecs_til_calib=%u\n",
sim_uname(uptr), usec_delay, sim_calb_tmr, ticks_til_calib, uptr->usecs_remaining, inst_til_tick, ticks_til_calib, usecs_til_calib);
sim_debug (DBG_CHK, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - result = %.0f usecs, %.0f usecs\n",
sim_uname(uptr), usec_delay, sim_timer_activate_time_usecs (ouptr), sim_timer_activate_time_usecs (uptr));
return stat;
}
if ((usec_delay > (2 * usecs_per_tick)) &&
(ticks_til_calib > 1)) { /* long wait? */
double usecs_til_tick = floor (inst_til_tick / inst_per_usec);
if ((uptr != crtc->timer_unit) && /* Not scheduling calibrated timer */
(inst_til_tick > 0)) { /* and tick not pending? */
if (inst_delay_d > (double)inst_til_calib) { /* long wait? */
stat = sim_clock_coschedule_tmr (uptr, sim_calb_tmr, ticks_til_calib - 1);
uptr->usecs_remaining = (stat == SCPE_OK) ? usec_delay - usecs_til_calib : 0.0;
sim_debug (DBG_TIM, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - coscheduling with with calibrated timer(%d), ticks=%d, usecs_remaining=%.0f usecs, inst_til_tick=%d, ticks_til_calib=%d, usecs_til_calib=%u\n",
sim_uname(uptr), usec_delay, sim_calb_tmr, ticks_til_calib, uptr->usecs_remaining, inst_til_tick, ticks_til_calib, usecs_til_calib);
sim_debug (DBG_CHK, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - result = %.0f usecs, %.0f usecs\n",
sim_uname(uptr), usec_delay, sim_timer_activate_time_usecs (ouptr), sim_timer_activate_time_usecs (uptr));
return stat;
}
if ((usec_delay > (2 * usecs_per_tick)) &&
(ticks_til_calib > 1)) { /* long wait? */
double usecs_til_tick = floor (inst_til_tick / inst_per_usec);
stat = sim_clock_coschedule_tmr (uptr, sim_calb_tmr, 0);
uptr->usecs_remaining = (stat == SCPE_OK) ? usec_delay - usecs_til_tick : 0.0;
sim_debug (DBG_TIM, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - coscheduling with with calibrated timer(%d), ticks=%d, usecs_remaining=%.0f usecs, inst_til_tick=%d, usecs_til_tick=%.0f\n",
sim_uname(uptr), usec_delay, sim_calb_tmr, 0, uptr->usecs_remaining, inst_til_tick, usecs_til_tick);
sim_debug (DBG_CHK, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - result = %.0f usecs, %.0f usecs\n",
sim_uname(uptr), usec_delay, sim_timer_activate_time_usecs (ouptr), sim_timer_activate_time_usecs (uptr));
return stat;
stat = sim_clock_coschedule_tmr (uptr, sim_calb_tmr, 0);
uptr->usecs_remaining = (stat == SCPE_OK) ? usec_delay - usecs_til_tick : 0.0;
sim_debug (DBG_TIM, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - coscheduling with with calibrated timer(%d), ticks=%d, usecs_remaining=%.0f usecs, inst_til_tick=%d, usecs_til_tick=%.0f\n",
sim_uname(uptr), usec_delay, sim_calb_tmr, 0, uptr->usecs_remaining, inst_til_tick, usecs_til_tick);
sim_debug (DBG_CHK, &sim_timer_dev, "sim_timer_activate_after(%s, %.0f usecs) - result = %.0f usecs, %.0f usecs\n",
sim_uname(uptr), usec_delay, sim_timer_activate_time_usecs (ouptr), sim_timer_activate_time_usecs (uptr));
return stat;
}
}
}
}