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SEL32: Fix basemode instruction display code.
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AZBevier
parent
3ed0c046e8
commit
f89e8aefa8
@ -618,18 +618,18 @@ t_opcode optab[] = {
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{ 0x1808, 0xFC0C, B|H|TYPE_K, "ABR", }, /* Add Bit In Register # BR */
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{ 0x180C, 0xFC0C, B|H|TYPE_K, "TBR", }, /* Test Bit in Register # BR */
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{ 0x1C00, 0xFC0C, N|H|TYPE_K, "ZBR", }, /* Zero Bit in Register # NBR */ /* CON SRABR */
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{ 0x1C00, 0xFC0F, B|H|TYPE_I, "SRABR", }, /* Shift Right Arithmetic # BR */ /* CON ZBM */
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{ 0x1C20, 0xFC0F, B|H|TYPE_I, "SRLBR", }, /* Shift Right Logical # BR */
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{ 0x1C40, 0xFC0F, B|H|TYPE_I, "SLABR", }, /* Shift Left Arithmetic # BR */
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{ 0x1C60, 0xFC0F, B|H|TYPE_I, "SLLBR", }, /* Shift Left Logical # BR */
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{ 0x1C00, 0xFC60, B|H|TYPE_I, "SRABR", }, /* Shift Right Arithmetic # BR */ /* CON ZBM */
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{ 0x1C20, 0xFC60, B|H|TYPE_I, "SRLBR", }, /* Shift Right Logical # BR */
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{ 0x1C40, 0xFC60, B|H|TYPE_I, "SLABR", }, /* Shift Left Arithmetic # BR */
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{ 0x1C60, 0xFC60, B|H|TYPE_I, "SLLBR", }, /* Shift Left Logical # BR */
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{ 0x2000, 0xFC0C, N|H|TYPE_K, "ABR", }, /* Add Bit in Register # NBR */ /* CON SRADBR */
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{ 0x2000, 0xFC0F, B|H|TYPE_I, "SRADBR", }, /* Shift Right Arithmetic Double # BR */ /* CON ABR */
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{ 0x2020, 0xFC0F, B|H|TYPE_I, "SRLDBR", }, /* Shift Left Logical Double # BR */
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{ 0x2040, 0xFC0F, B|H|TYPE_I, "SLADBR", }, /* Shift Right Arithmetic Double # BR */
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{ 0x2060, 0xFC0F, B|H|TYPE_I, "SLLDBR", }, /* Shift Left Logical Double # BR */
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{ 0x2000, 0xFC60, B|H|TYPE_I, "SRADBR", }, /* Shift Right Arithmetic Double # BR */ /* CON ABR */
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{ 0x2020, 0xFC60, B|H|TYPE_I, "SRLDBR", }, /* Shift Left Logical Double # BR */
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{ 0x2040, 0xFC60, B|H|TYPE_I, "SLADBR", }, /* Shift Right Arithmetic Double # BR */
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{ 0x2060, 0xFC60, B|H|TYPE_I, "SLLDBR", }, /* Shift Left Logical Double # BR */
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{ 0x2400, 0xFC0C, N|H|TYPE_K, "TBR", }, /* Test Bit in Register # NBR */ /* CON SRCBR */
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{ 0x2400, 0xFC0F, B|H|TYPE_I, "SRCBR", }, /* Shift Right Circular # BR */ /* CON TBR */
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{ 0x2440, 0xFC0F, B|H|TYPE_F, "SLCBR", }, /* Shift Left Circular # BR */
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{ 0x2400, 0xFC60, B|H|TYPE_I, "SRCBR", }, /* Shift Right Circular # BR */ /* CON TBR */
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{ 0x2440, 0xFC60, B|H|TYPE_F, "SLCBR", }, /* Shift Left Circular # BR */
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{ 0x2800, 0xFC0F, H|TYPE_G, "TRSW", }, /* Transfer GPR to PSD */
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{ 0x2802, 0xFC0F, B|H|TYPE_F, "XCBR", }, /* Exchange Base Registers # BR Only */
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{ 0x2804, 0xFC0F, B|H|TYPE_G, "TCCR", }, /* Transfer CC to GPR # BR Only */
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@ -675,13 +675,13 @@ t_opcode optab[] = {
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{ 0x3C08, 0xFC0F, H|TYPE_F, "SURM", }, /* Subtract Register to Register Masked # */
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{ 0x4000, 0xFC0F, N|H|TYPE_F, "MPR", }, /* Multiply Register to Register # NBR */
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{ 0x4400, 0xFC0F, N|H|TYPE_F, "DVR", }, /* Divide Register to Register # NBR */
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{ 0x5000, 0xFC0F, B|TYPE_D, "LABRM", }, /* Load Address BR Mode */
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{ 0x5400, 0xFC0F, B|TYPE_A, "STWBR", }, /* Store Base Register BR Only */
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{ 0x5800, 0xFC0F, B|TYPE_A, "SUABR", }, /* Subtract Base Register BR Only */
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{ 0x5808, 0xFC0F, B|TYPE_D, "LABR", }, /* Load Address Base Register BR Only */
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{ 0x5C00, 0xFC0F, B|TYPE_A, "LWBR", }, /* Load Base Register BR Only */
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{ 0x5C08, 0xFC0F, B|H|TYPE_A, "BSUBM", }, /* Branch Subroutine Memory BR Only */
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{ 0x5C08, 0xFC0F, B|H|TYPE_A, "CALLM", }, /* Call Memory BR Only */
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{ 0x5000, 0xFC08, B|TYPE_D, "LABRM", }, /* Load Address BR Mode */
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{ 0x5400, 0xFC08, B|TYPE_A, "STWBR", }, /* Store Base Register BR Only */
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{ 0x5800, 0xFC08, B|TYPE_A, "SUABR", }, /* Subtract Base Register BR Only */
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{ 0x5808, 0xFC08, B|TYPE_D, "LABR", }, /* Load Address Base Register BR Only */
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{ 0x5C00, 0xFC08, B|TYPE_A, "LWBR", }, /* Load Base Register BR Only */
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{ 0x5C08, 0xFC08, B|H|TYPE_A, "BSUBM", }, /* Branch Subroutine Memory BR Only */
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{ 0x5C08, 0xFC08, B|H|TYPE_A, "CALLM", }, /* Call Memory BR Only */
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{ 0x6000, 0xFC0F, N|H|TYPE_F, "NOR", }, /* Normalize # NBR Only */
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{ 0x6400, 0xFC0F, N|H|TYPE_F, "NORD", }, /* Normalize Double # NBR Only */
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{ 0x6800, 0xFC0F, N|H|TYPE_F, "SCZ", }, /* Shift and Count Zeros # */
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@ -818,7 +818,7 @@ int fprint_inst(FILE *of, uint32 val, int32 sw)
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if (mode && (tab->type & (X | N)))
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continue; /* non basemode instruction in base mode, skip */
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if (!mode && (tab->type & B))
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continue; /* basemode instruction in nonbase mde, skip */
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continue; /* basemode instruction in nonbase mode, skip */
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/* TODO? Maybe want to make sure MODEL is 32/7X for X type instructions */
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@ -833,7 +833,12 @@ int fprint_inst(FILE *of, uint32 val, int32 sw)
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case TYPE_E: /* [*]o[,x] or o[(b)][,x] */
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/* append B, H, W, D to base instruction using F & C bits */
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i = (val & 3) | ((inst >> 1) & 04);
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if (((inst&0xfc00) != 0xdc00) && ((inst&0xfc00) != 0xcc00) &&
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if (((inst&0xfc00) != 0xdc00) &&
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((inst&0xfc00) != 0x5400) &&
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((inst&0xfc00) != 0x5800) &&
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((inst&0xfc00) != 0x5c00) &&
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((inst&0xfc00) != 0xcc00) &&
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((inst&0xfc00) != 0xcc08) &&
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((inst&0xfc00) != 0x8000))
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fputc(fc_type[i], of);
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/* Fall through */
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@ -854,7 +859,8 @@ int fprint_inst(FILE *of, uint32 val, int32 sw)
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fputc(' ', of);
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if (mode) {
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/* base reg mode */
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fprint_val(of, val&0xffff, 16, 16, PV_RZRO); /* output 16 bit offset */
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//UTX fprint_val(of, val&0xffff, 16, 16, PV_RZRO); /* output 16 bit offset */
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fprint_val(of, val&0xffff, 16, 16, PV_LEFT); /* output 16 bit offset */
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if (inst & 07) {
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fputc('(', of);
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fputc(('0'+(inst & 07)), of); /* output the base reg number */
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@ -958,10 +964,12 @@ int fprint_inst(FILE *of, uint32 val, int32 sw)
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}
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/* FIXME - should we just return error here? or dump as hex data? */
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/* we get here if opcode not found, print data value */
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fputs(" invld ", of); /* output error message */
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if (mode)
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fputs(" Binvld ", of); /* output basemode error message */
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else
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fputs(" Ninvld ", of); /* output non-basmode error message */
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fprint_val(of, val, 16, 32, PV_RZRO); /* output unknown 32 bit instruction code */
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return 4; /* show as full word size */
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// return SCPE_UNK; /* unknown opcode */
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}
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/* Symbolic decode
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@ -978,7 +986,6 @@ int fprint_inst(FILE *of, uint32 val, int32 sw)
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t_stat fprint_sym (FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw)
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{
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int i;
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//old int l = 1; /* default to bytes */
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int l = 4; /* default to full words */
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int rdx = 16; /* default radex is hex */
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uint32 num, tmp=*val;
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@ -1112,7 +1119,6 @@ t_stat parse_sym (CONST char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32
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{
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int i;
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int x;
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//old int l = 1; /* default to bytes */
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int l = 4; /* default to full words */
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int rdx = 16; /* default radex is hex */
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char mod = 0;
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