github.com/rcornwell.sims
1
0
Fork 0
mirror of https://github.com/rcornwell/sims.git synced 2026-01-18 17:07:59 +00:00
Code Releases Activity
1,257 Commits 4 Branches 0 Tags
Commit Graph

3 Commits

Author SHA1 Message Date
James C. Bevier
13c60a6164 SEL32: Update sel32_disk to only do sector/track replacement for disk diags. 
SEL32: Update sel32_chan.c to correct handling of IOCL queue prcessing.
SEL32: Add sel32_lpr description and help functions.
SEL32: Remove lpr output assignment in diags.ini.
SEL32: Terminate WAITQ entries when CPU goes to wait state.
 2021-04-15 19:47:12 -07:00
AZBevier
b6523197ef SEL32: Add CSW (console switches) and BOOTR (boot regs) variables. 
SEL32: Fix sel32_clk.c coding error in interval timer code.
SEL32: Update to latest makecode.c utility and add makefile.
SEL32: Update diag.ini file to show how to set boot regs and CSW values.
 2019-09-01 16:37:26 -07:00
Richard Cornwell
c27809c194 SEL32: Added test cases, more devices. 2019-07-17 21:39:18 -04:00