github.com/rdolbeau.SBusFPGA
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add a known limitation

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Romain Dolbeau 2021-10-09 11:11:02 +02:00
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USAGE.md
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@ -24,6 +24,14 @@
## How to rebuild
* TBD
## Known limitations
* Currently, the board delays its powering-up by 20s after a cold start. That means that the host SPARCstation will POST without the board and not see it. The machine must be reset at the prompt, or the slot must be explictely probed, for the board to become visible. This is because so far, having the board start-up right away will prevent the SPARCstation from POSTing for unknown reasons.
* ???
TBD