github.com/rdolbeau.SBusFPGA
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Userland SW bug :-(, seem to work now, disabling some debug stuuf

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This commit is contained in:
Romain Dolbeau 2021-02-28 03:51:05 -05:00
parent aa8f136c04
commit 4b2f974e12
2 changed files with 30 additions and 30 deletions
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28
sbus-to-ztex-gateware/SimpleSDHC_wrapper.vhd
View File

@ -246,14 +246,14 @@ output_fifo_wr_en <= '1';
when SIMPLESDHC_READ_WAIT_BUSY =>
IF (sd_busy = '1') THEN
output_fifo_in <= '1' & x"5000" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"5000" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
--sd_addr <= (others => '0');
SIMPLESDHC_State <= SIMPLESDHC_READ_WAIT_READ;
timeout_counter := TIMEOUT_MAX;
elsif (timeout_counter = 0) then
output_fifo_in <= '1' & x"E" & timedout(11 downto 0) & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"E" & timedout(11 downto 0) & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
timedout := conv_std_logic_vector(conv_integer(timedout)+1,16);
timeout_counter := TIMEOUT_MAX;
else
@ -262,14 +262,14 @@ output_fifo_wr_en <= '1';
when SIMPLESDHC_READ_WAIT_READ =>
IF (sd_error = '1') THEN
output_fifo_in <= '1' & x"1100" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"1100" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
sd_rd <= '0';
SIMPLESDHC_State <= SIMPLESDHC_IDLE;
--only read byte if we'll have some space to output the buffer
ELSIF ((output_fifo_full = '0') AND (sd_dout_avail = '1')) THEN
output_fifo_in <= '1' & x"40" & sd_data_o & conv_std_logic_vector(byte_counter,16) & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"40" & sd_data_o & conv_std_logic_vector(byte_counter,16) & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
databuf(((15 - (byte_counter mod 16))*8 + 7) downto ((15 - (byte_counter mod 16))*8)) := sd_data_o;
sd_dout_taken <= '1';
byte_counter := byte_counter + 1;
@ -281,20 +281,20 @@ output_fifo_wr_en <= '1';
-- ELSIF (output_fifo_full = '0') THEN
-- timeout_counter := timeout_counter - 1;
ELSIF (sd_busy = '0') THEN
output_fifo_in <= '1' & x"1000" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"1000" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
SIMPLESDHC_State <= SIMPLESDHC_IDLE;
END IF;
when SIMPLESDHC_READ_WAIT_READ2 =>
IF (sd_error = '1') THEN
output_fifo_in <= '1' & x"3100" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"3100" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
sd_rd <= '0';
SIMPLESDHC_State <= SIMPLESDHC_IDLE;
ELSIF (sd_dout_avail = '0') THEN
output_fifo_in <= '1' & x"3000" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
output_fifo_wr_en <= '1';
--output_fifo_in <= '1' & x"3000" & x"0" & sd_type & '0' & sd_error & sd_error_code & x"00000000000000000000000000000000";
--output_fifo_wr_en <= '1';
sd_dout_taken <= '0';
timeout_counter := TIMEOUT_MAX;
IF ((byte_counter mod 16) = 0) THEN

32
sbus-to-ztex-gateware/sbus_fsm.vhd
View File

@ -835,7 +835,7 @@ BEGIN
label_prom: Prom PORT MAP (addr => p_addr, data => p_data);
label_mas: mastrovito_V2_multiplication PORT MAP( a => mas_a, b => mas_b, c => mas_c );
--label_mas: mastrovito_V2_multiplication PORT MAP( a => mas_a, b => mas_b, c => mas_c );
label_fifo_uart: fifo_generator_uart port map(rst => fifo_rst, wr_clk => SBUS_3V3_CLK, rd_clk => fxclk_in,
din => fifo_din, wr_en => fifo_wr_en, rd_en => fifo_rd_en,
@ -1785,25 +1785,25 @@ BEGIN
-- fixme
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SDDMA_CTRL) <= x"00000000";
END IF;
elsif (fifo_fromsdcard_dout(160) = '0') THEN
-- status indicating last stuff out of the FIFO was valid data
-- indicative, does not remove word from FIFO
IF (REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS)(31 downto 8) /= x"FFFFFF") THEN
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD3) <= REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD2);
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD2) <= REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD);
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD) <= REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS);
END IF;
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_DAT2) <= fifo_fromsdcard_dout(159 downto 128);
if (REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SDDMAW_CTRL) = x"00000000") THEN
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS) <= x"FFFFFF0" & '0' & '0' & fifo_fromsdcard_full & fifo_fromsdcard_empty;
else
REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS) <= x"FFFFFFFF";
END IF;
-- elsif (fifo_fromsdcard_dout(160) = '0') THEN
-- -- status indicating last stuff out of the FIFO was valid data
-- -- indicative, does not remove word from FIFO
-- IF (REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS)(31 downto 8) /= x"FFFFFF") THEN
-- REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD3) <= REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD2);
-- REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD2) <= REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD);
-- REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_OLD) <= REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS);
-- END IF;
-- REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS_DAT2) <= fifo_fromsdcard_dout(159 downto 128);
-- if (REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SDDMAW_CTRL) = x"00000000") THEN
-- REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS) <= x"FFFFFF0" & '0' & '0' & fifo_fromsdcard_full & fifo_fromsdcard_empty;
-- else
-- REGISTERS(reg_bank_size*reg_bank_sdcard_idx + REG_INDEX_SD_STATUS) <= x"FFFFFFFF";
-- END IF;
end if;
WHEN others =>
-- do nothing
END CASE; --TRNG self-emptying FIFO
END CASE; --sdcard self-emptying FIFO
-- cross-clock flip-flops from slow to fast clock for the 5 MHz timer
--trng_timer_counter_mid <= trng_timer_counter;