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Merge branch 'v1_2' into main

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Romain Dolbeau
2021-10-09 10:26:03 +02:00
parent 1c690cbd90 93b69a4afb
commit d417ba7206
32 changed files with 56511 additions and 56612 deletions
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USAGE.md Normal file
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# How to use A FPGA on a SBus card...
## What do you need ?
* a SPARCstation or compatible with a free SBus slot, high enough to accomodate the taller-than-the standard board. Only SPARCstation 20s have been tested so far. I'd recommend against a SPARCstation 1-class machine (1, 1+, SLC, ...) as they have many quirks in their early SBus implementation. OpenBoot 2.x or newer is also a requirement (i.e. a recent 2.x or newer PROM).
* [NetBSD](https://www.netbsd.org/) 9.0 running on the SPARCstation, presumably newer version would work as well but have not yet been tested. No other OS (SunOS 4.1, Solaris 2.x, ...) have drivers (it is theoretically possible to write some, but it isn't planned).
* The ability to [rebuild the NetBSD kernel from source](https://www.netbsd.org/docs/guide/en/chap-kernel.html), as extra drivers are needed. It is well documented by the NetBSD team. This can be done in a QEmu virtual machine running NetBSD/sparc as an alternative to doing it on the real hardware.
* An adequate FPGA board, namely a [ZTex USB-to-FPGA 2.13](https://www.ztex.de/usb-fpga-2/usb-fpga-2.13.e.html). It provides the actual FPGA, a Xilinx Artix-7, and 256 MiB of on-board DDR3 SDRAM. Any of the 2.13 should work, but only the 2.13a (smallest and slowest FPGA, cheapest board) has been tested and it enough to fit quite a lot of stuff already. Other non-2.13 boards from ZTex will not work due to pin assignement (e.g. restriction on which pin can take the SBus clock as input), voltage (some boards require strictly more than 5V as input), ...
* An adequate power supply to power the FPGA board out of the SPARCstation so it can be programmed, and either an install of the FOSS ZTex software to program the board via USB (recommended!) or an adequate JTAG programmer to program the board from Vivado
* The [Xilinx Vivado toolchain](https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/2020-2.html) to work with the FPGA. I use 2020.1, newer should work as well (and maybe some older). The free (as in no money needed, not as in FOSS)version is enough for the Artix-7 FPGA.
* A SBusFPGA SBus board. There's no supplier for those. Mine were manufactured by SeeedStudio. Other suppliers of PCB and PCB assembly are available - it's just the one I'm used to.
* A working [Litex](https://github.com/enjoy-digital/litex/) installation. It supplies the basis and many functionalities of the gateware in the FPGA.
* The ability to 3D-print the extension (and associated backplate), so that the board can be installed cleanly in a SBus system
* ???
## How to rebuild
TBD

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sbus-to-ztex-gateware/sbus-to-ztex-V1_2.xdc Normal file
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# !!! Constraint files are application specific !!!
# !!! This is a template only !!!
# on-board signals
# CLKOUT/FXCLK
create_clock -name fxclk_in -period 20.833 [get_ports fxclk_in]
set_property PACKAGE_PIN P15 [get_ports fxclk_in]
set_property IOSTANDARD LVCMOS33 [get_ports fxclk_in]
# IFCLK
#create_clock -name ifclk_in -period 20.833 [get_ports ifclk_in]
#set_property PACKAGE_PIN P17 [get_ports ifclk_in]
#set_property IOSTANDARD LVCMOS33 [get_ports ifclk_in]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 66 [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR No [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 2 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
#set_property PACKAGE_PIN M16 [get_ports {PB[0]}] ;# PB0/FD0
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[0]}]
#set_property PACKAGE_PIN L16 [get_ports {PB[1]}] ;# PB1/FD1
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[1]}]
#set_property PACKAGE_PIN L14 [get_ports {PB[2]}] ;# PB2/FD2
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[2]}]
#set_property PACKAGE_PIN M14 [get_ports {PB[3]}] ;# PB3/FD3
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[3]}]
#set_property PACKAGE_PIN L18 [get_ports {PB[4]}] ;# PB4/FD4
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[4]}]
#set_property PACKAGE_PIN M18 [get_ports {PB[5]}] ;# PB5/FD5
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[5]}]
#set_property PACKAGE_PIN R12 [get_ports {PB[6]}] ;# PB6/FD6
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[6]}]
#set_property PACKAGE_PIN R13 [get_ports {PB[7]}] ;# PB7/FD7
#set_property IOSTANDARD LVCMOS33 [get_ports {PB[7]}]
#set_property PACKAGE_PIN T9 [get_ports {PD[0]}] ;# PD0/FD8
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[0]}]
#set_property PACKAGE_PIN V10 [get_ports {PD[1]}] ;# PD1/FD9
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[1]}]
#set_property PACKAGE_PIN U11 [get_ports {PD[2]}] ;# PD2/FD10
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[2]}]
#set_property PACKAGE_PIN V11 [get_ports {PD[3]}] ;# PD3/FD11
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[3]}]
#set_property PACKAGE_PIN V12 [get_ports {PD[4]}] ;# PD4/FD12
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[4]}]
#set_property PACKAGE_PIN U13 [get_ports {PD[5]}] ;# PD5/FD13
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[5]}]
#set_property PACKAGE_PIN U14 [get_ports {PD[6]}] ;# PD6/FD14
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[6]}]
#set_property PACKAGE_PIN V14 [get_ports {PD[7]}] ;# PD7/FD15
#set_property IOSTANDARD LVCMOS33 [get_ports {PD[7]}]
#set_property PACKAGE_PIN R15 [get_ports {PA[0]}] ;# PA0/INT0#
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[0]}]
#set_property PACKAGE_PIN T15 [get_ports {PA[1]}] ;# PA1/INT1#
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[1]}]
#set_property PACKAGE_PIN T14 [get_ports {PA[2]}] ;# PA2/SLOE
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[2]}]
#set_property PACKAGE_PIN T13 [get_ports {PA[3]}] ;# PA3/WU2
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[3]}]
#set_property PACKAGE_PIN R11 [get_ports {PA[4]}] ;# PA4/FIFOADR0
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[4]}]
#set_property PACKAGE_PIN T11 [get_ports {PA[5]}] ;# PA5/FIFOADR1
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[5]}]
#set_property PACKAGE_PIN R10 [get_ports {PA[6]}] ;# PA6/PKTEND
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[6]}]
#set_property PACKAGE_PIN T10 [get_ports {PA[7]}] ;# PA7/FLAGD/SLCS#
#set_property IOSTANDARD LVCMOS33 [get_ports {PA[7]}]
#set_property PACKAGE_PIN R17 [get_ports {PC[0]}] ;# PC0/GPIFADR0
#set_property IOSTANDARD LVCMOS33 [get_ports {PC[0]}]
#set_property PACKAGE_PIN R18 [get_ports {PC[1]}] ;# PC1/GPIFADR1
#set_property IOSTANDARD LVCMOS33 [get_ports {PC[1]}]
#set_property PACKAGE_PIN P18 [get_ports {PC[2]}] ;# PC2/GPIFADR2
#set_property IOSTANDARD LVCMOS33 [get_ports {PC[2]}]
#set_property PACKAGE_PIN P14 [get_ports {PC[3]}] ;# PC3/GPIFADR3
#set_property IOSTANDARD LVCMOS33 [get_ports {PC[3]}]
#set_property PACKAGE_PIN K18 [get_ports {FLASH_DO}] ;# PC4/GPIFADR4
#set_property IOSTANDARD LVCMOS33 [get_ports {FLASH_DO}]
#set_property PACKAGE_PIN L13 [get_ports {FLASH_CS}] ;# PC5/GPIFADR5
#set_property IOSTANDARD LVCMOS33 [get_ports {FLASH_CS}]
#set_property PACKAGE_PIN E9 [get_ports {FLASH_CLK}] ;# PC6/GPIFADR6
#set_property IOSTANDARD LVCMOS33 [get_ports {FLASH_CLK}]
#set_property PACKAGE_PIN K17 [get_ports {FLASH_DI}] ;# PC7/GPIFADR7
#set_property IOSTANDARD LVCMOS33 [get_ports {FLASH_DI}]
#set_property PACKAGE_PIN P10 [get_ports {PE[0]}] ;# PE0/T0OUT
#set_property IOSTANDARD LVCMOS33 [get_ports {PE[0]}]
#set_property PACKAGE_PIN P7 [get_ports {PE[1]}] ;# PE1/T1OUT
#set_property IOSTANDARD LVCMOS33 [get_ports {PE[1]}]
#set_property PACKAGE_PIN V15 [get_ports {PE[2]}] ;# PE2/T2OUT
#set_property IOSTANDARD LVCMOS33 [get_ports {PE[2]}]
#set_property PACKAGE_PIN R16 [get_ports {PE[5]}] ;# PE5/INT6
#set_property IOSTANDARD LVCMOS33 [get_ports {PE[5]}]
#set_property PACKAGE_PIN T16 [get_ports {PE[6]}] ;# PE6/T2EX
#set_property IOSTANDARD LVCMOS33 [get_ports {PE[6]}]
#set_property PACKAGE_PIN V16 [get_ports {SLRD}] ;# RDY0/SLRD
#set_property IOSTANDARD LVCMOS33 [get_ports {SLRD}]
#set_property PACKAGE_PIN U16 [get_ports {SLWR}] ;# RDY1/SLWR
#set_property IOSTANDARD LVCMOS33 [get_ports {SLWR}]
#set_property PACKAGE_PIN V17 [get_ports {RDY2}] ;# RDY2
#set_property IOSTANDARD LVCMOS33 [get_ports {RDY2}]
#set_property PACKAGE_PIN U17 [get_ports {RDY3}] ;# RDY3
#set_property IOSTANDARD LVCMOS33 [get_ports {RDY3}]
#set_property PACKAGE_PIN U18 [get_ports {RDY4}] ;# RDY4
#set_property IOSTANDARD LVCMOS33 [get_ports {RDY4}]
#set_property PACKAGE_PIN T18 [get_ports {RDY5}] ;# RDY5
#set_property IOSTANDARD LVCMOS33 [get_ports {RDY5}]
#set_property PACKAGE_PIN N16 [get_ports {FLAGA}] ;# CTL0/FLAGA
#set_property IOSTANDARD LVCMOS33 [get_ports {FLAGA}]
#set_property PACKAGE_PIN N15 [get_ports {FLAGB}] ;# CTL1/FLAGB
#set_property IOSTANDARD LVCMOS33 [get_ports {FLAGB}]
#set_property PACKAGE_PIN N14 [get_ports {FLAGC}] ;# CTL2/FLAGC
#set_property IOSTANDARD LVCMOS33 [get_ports {FLAGC}]
#set_property PACKAGE_PIN N17 [get_ports {CTL3}] ;# CTL3
#set_property IOSTANDARD LVCMOS33 [get_ports {CTL3}]
#set_property PACKAGE_PIN M13 [get_ports {CTL4}] ;# CTL4
#set_property IOSTANDARD LVCMOS33 [get_ports {CTL4}]
#set_property PACKAGE_PIN D10 [get_ports {INT4}] ;# INT4
#set_property IOSTANDARD LVCMOS33 [get_ports {INT4}]
#set_property PACKAGE_PIN U12 [get_ports {INT5_N}] ;# INT5#
#set_property IOSTANDARD LVCMOS33 [get_ports {INT5_N}]
#set_property PACKAGE_PIN M17 [get_ports {T0}] ;# T0
#set_property IOSTANDARD LVCMOS33 [get_ports {T0}]
#set_property PACKAGE_PIN B8 [get_ports {SCL}] ;# SCL
#set_property IOSTANDARD LVCMOS33 [get_ports {SCL}]
#set_property PACKAGE_PIN A10 [get_ports {SDA}] ;# SDA
#set_property IOSTANDARD LVCMOS33 [get_ports {SDA}]
#set_property PACKAGE_PIN A8 [get_ports {RxD0}] ;# RxD0
#set_property IOSTANDARD LVCMOS33 [get_ports {RxD0}]
#set_property PACKAGE_PIN A9 [get_ports {TxD0}] ;# TxD0
#set_property IOSTANDARD LVCMOS33 [get_ports {TxD0}]
# external I/O
create_clock -name SBUS_3V3_CLK -period 40 [get_ports SBUS_3V3_CLK]
# COPY/PASTE here then fix
# * -> s
# ]s -> s earlier (ACK ; INT have no brackets)
# leading 0 in [0x (but not [0]!)
# comment out TX, RX, SD_*
# PMOD-x -> PMODx
# EER -> ERR
set_property PACKAGE_PIN K16 [get_ports {SBUS_3V3_D[1]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[1]}]
set_property PACKAGE_PIN J18 [get_ports {SBUS_3V3_D[0]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[0]}]
set_property PACKAGE_PIN K15 [get_ports {SBUS_3V3_D[3]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[3]}]
set_property PACKAGE_PIN J17 [get_ports {SBUS_3V3_D[2]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[2]}]
set_property PACKAGE_PIN J15 [get_ports {SBUS_3V3_D[5]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[5]}]
set_property PACKAGE_PIN K13 [get_ports {SBUS_3V3_D[4]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[4]}]
set_property PACKAGE_PIN H15 [get_ports {SBUS_3V3_INT2s}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_INT2s}]
set_property PACKAGE_PIN J13 [get_ports {SBUS_3V3_D[6]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[6]}]
set_property PACKAGE_PIN J14 [get_ports {SBUS_3V3_D[7]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[7]}]
set_property PACKAGE_PIN H14 [get_ports {SBUS_3V3_D[8]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[8]}]
set_property PACKAGE_PIN H17 [get_ports {SBUS_3V3_D[9]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[9]}]
set_property PACKAGE_PIN G14 [get_ports {SBUS_3V3_D[10]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[10]}]
set_property PACKAGE_PIN G17 [get_ports {SBUS_3V3_D[11]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[11]}]
set_property PACKAGE_PIN G16 [get_ports {SBUS_3V3_D[12]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[12]}]
set_property PACKAGE_PIN G18 [get_ports {SBUS_3V3_D[13]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[13]}]
set_property PACKAGE_PIN H16 [get_ports {SBUS_3V3_D[14]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[14]}]
set_property PACKAGE_PIN F18 [get_ports {SBUS_3V3_D[15]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[15]}]
set_property PACKAGE_PIN F16 [get_ports {SBUS_3V3_D[16]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[16]}]
set_property PACKAGE_PIN E18 [get_ports {SBUS_3V3_D[17]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[17]}]
set_property PACKAGE_PIN F15 [get_ports {SBUS_3V3_D[18]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[18]}]
set_property PACKAGE_PIN D18 [get_ports {SBUS_3V3_D[19]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[19]}]
set_property PACKAGE_PIN E17 [get_ports {SBUS_3V3_D[20]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[20]}]
set_property PACKAGE_PIN G13 [get_ports {SBUS_3V3_D[21]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[21]}]
set_property PACKAGE_PIN D17 [get_ports {SBUS_3V3_D[22]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[22]}]
set_property PACKAGE_PIN F13 [get_ports {SBUS_3V3_D[23]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[23]}]
set_property PACKAGE_PIN F14 [get_ports {SBUS_3V3_D[24]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[24]}]
set_property PACKAGE_PIN E16 [get_ports {SBUS_3V3_D[25]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[25]}]
set_property PACKAGE_PIN E15 [get_ports {SBUS_3V3_D[26]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[26]}]
set_property PACKAGE_PIN C17 [get_ports {SBUS_3V3_D[27]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[27]}]
set_property PACKAGE_PIN C16 [get_ports {SBUS_3V3_D[28]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[28]}]
set_property PACKAGE_PIN A18 [get_ports {SBUS_3V3_D[29]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[29]}]
set_property PACKAGE_PIN B18 [get_ports {SBUS_3V3_D[30]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[30]}]
set_property PACKAGE_PIN C15 [get_ports {SBUS_3V3_D[31]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_D[31]}]
set_property PACKAGE_PIN D15 [get_ports {SBUS_3V3_CLK}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_CLK}]
set_property PACKAGE_PIN B17 [get_ports {SBUS_3V3_PA[1]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[1]}]
set_property PACKAGE_PIN B16 [get_ports {SBUS_3V3_PA[0]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[0]}]
set_property PACKAGE_PIN C14 [get_ports {SBUS_3V3_PA[3]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[3]}]
set_property PACKAGE_PIN D14 [get_ports {SBUS_3V3_PA[2]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[2]}]
set_property PACKAGE_PIN D13 [get_ports {SBUS_3V3_ERRs}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_ERRs}]
set_property PACKAGE_PIN D12 [get_ports {SBUS_3V3_PA[4]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[4]}]
set_property PACKAGE_PIN A16 [get_ports {SBUS_3V3_PA[5]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[5]}]
set_property PACKAGE_PIN A15 [get_ports {SBUS_3V3_PA[6]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[6]}]
set_property PACKAGE_PIN B14 [get_ports {SBUS_3V3_PA[7]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[7]}]
set_property PACKAGE_PIN B13 [get_ports {SBUS_3V3_PA[8]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[8]}]
set_property PACKAGE_PIN B12 [get_ports {SBUS_3V3_PA[9]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[9]}]
set_property PACKAGE_PIN C12 [get_ports {SBUS_3V3_PA[10]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[10]}]
set_property PACKAGE_PIN A14 [get_ports {SBUS_3V3_PA[11]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[11]}]
set_property PACKAGE_PIN A13 [get_ports {SBUS_3V3_PA[12]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[12]}]
set_property PACKAGE_PIN B11 [get_ports {SBUS_3V3_PA[13]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[13]}]
set_property PACKAGE_PIN A11 [get_ports {SBUS_3V3_PA[14]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[14]}]
set_property PACKAGE_PIN U9 [get_ports {RX}]
set_property IOSTANDARD LVTTL [get_ports {RX}]
set_property PACKAGE_PIN V9 [get_ports {TX}]
set_property IOSTANDARD LVTTL [get_ports {TX}]
set_property PACKAGE_PIN U8 [get_ports {USBH0_D+}]
set_property IOSTANDARD LVTTL [get_ports {USBH0_D+}]
set_property PACKAGE_PIN V7 [get_ports {SD_D2}]
set_property IOSTANDARD LVTTL [get_ports {SD_D2}]
set_property PACKAGE_PIN U7 [get_ports {USBH0_D-}]
set_property IOSTANDARD LVTTL [get_ports {USBH0_D-}]
set_property PACKAGE_PIN V6 [get_ports {SD_D3}]
set_property IOSTANDARD LVTTL [get_ports {SD_D3}]
set_property PACKAGE_PIN U6 [get_ports {PMOD12}]
set_property IOSTANDARD LVTTL [get_ports {PMOD12}]
set_property PACKAGE_PIN V5 [get_ports {SD_D0}]
set_property IOSTANDARD LVTTL [get_ports {SD_D0}]
set_property PACKAGE_PIN T8 [get_ports {PMOD11}]
set_property IOSTANDARD LVTTL [get_ports {PMOD11}]
set_property PACKAGE_PIN V4 [get_ports {SD_D1}]
set_property IOSTANDARD LVTTL [get_ports {SD_D1}]
set_property PACKAGE_PIN R8 [get_ports {SD_CLK}]
set_property IOSTANDARD LVTTL [get_ports {SD_CLK}]
set_property PACKAGE_PIN T5 [get_ports {SD_CMD}]
set_property IOSTANDARD LVTTL [get_ports {SD_CMD}]
set_property PACKAGE_PIN R7 [get_ports {SBUS_3V3_BGs}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_BGs}]
set_property PACKAGE_PIN T4 [get_ports {SBUS_3V3_ASs}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_ASs}]
set_property PACKAGE_PIN T6 [get_ports {SBUS_3V3_SIZ[0]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_SIZ[0]}]
set_property PACKAGE_PIN U4 [get_ports {PMOD8}]
set_property IOSTANDARD LVTTL [get_ports {PMOD8}]
set_property PACKAGE_PIN R6 [get_ports {SBUS_3V3_BRs}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_BRs}]
set_property PACKAGE_PIN U3 [get_ports {SBUS_3V3_SIZ[1]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_SIZ[1]}]
set_property PACKAGE_PIN R5 [get_ports {SBUS_3V3_INT1s}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_INT1s}]
set_property PACKAGE_PIN V1 [get_ports {SBUS_3V3_SIZ[2]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_SIZ[2]}]
set_property PACKAGE_PIN V2 [get_ports {SBUS_3V3_INT6s}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_INT6s}]
set_property PACKAGE_PIN U1 [get_ports {SBUS_DATA_OE_LED}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_DATA_OE_LED}]
set_property PACKAGE_PIN U2 [get_ports {SBUS_3V3_RSTs}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_RSTs}]
set_property PACKAGE_PIN T3 [get_ports {PMOD6}]
set_property IOSTANDARD LVTTL [get_ports {PMOD6}]
set_property PACKAGE_PIN K6 [get_ports {SBUS_3V3_SELs}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_SELs}]
set_property PACKAGE_PIN R3 [get_ports {SBUS_3V3_INT3s}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_INT3s}]
set_property PACKAGE_PIN N6 [get_ports {SBUS_3V3_PPRD}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PPRD}]
set_property PACKAGE_PIN P5 [get_ports {SBUS_OE}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_OE}]
set_property PACKAGE_PIN M6 [get_ports {SBUS_3V3_ACKs[0]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_ACKs[0]}]
set_property PACKAGE_PIN N5 [get_ports {SBUS_3V3_INT4s}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_INT4s}]
set_property PACKAGE_PIN L6 [get_ports {SBUS_3V3_ACKs[1]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_ACKs[1]}]
set_property PACKAGE_PIN P4 [get_ports {PMOD10}]
set_property IOSTANDARD LVTTL [get_ports {PMOD10}]
set_property PACKAGE_PIN L5 [get_ports {SBUS_3V3_INT5s}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_INT5s}]
set_property PACKAGE_PIN P3 [get_ports {PMOD9}]
set_property IOSTANDARD LVTTL [get_ports {PMOD9}]
set_property PACKAGE_PIN N4 [get_ports {SBUS_3V3_ACKs[2]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_ACKs[2]}]
set_property PACKAGE_PIN T1 [get_ports {PMOD7}]
set_property IOSTANDARD LVTTL [get_ports {PMOD7}]
set_property PACKAGE_PIN M4 [get_ports {SBUS_3V3_PA[15]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[15]}]
set_property PACKAGE_PIN R1 [get_ports {PMOD5}]
set_property IOSTANDARD LVTTL [get_ports {PMOD5}]
set_property PACKAGE_PIN M3 [get_ports {SBUS_3V3_PA[17]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[17]}]
set_property PACKAGE_PIN R2 [get_ports {SBUS_3V3_PA[16]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[16]}]
set_property PACKAGE_PIN M2 [get_ports {SBUS_3V3_PA[19]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[19]}]
set_property PACKAGE_PIN P2 [get_ports {SBUS_3V3_PA[18]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[18]}]
set_property PACKAGE_PIN K5 [get_ports {SBUS_3V3_PA[21]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[21]}]
set_property PACKAGE_PIN N2 [get_ports {SBUS_3V3_PA[20]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[20]}]
set_property PACKAGE_PIN L4 [get_ports {SBUS_3V3_PA[23]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[23]}]
set_property PACKAGE_PIN N1 [get_ports {SBUS_3V3_PA[22]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[22]}]
set_property PACKAGE_PIN L3 [get_ports {SBUS_3V3_PA[25]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[25]}]
set_property PACKAGE_PIN M1 [get_ports {SBUS_3V3_PA[24]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[24]}]
set_property PACKAGE_PIN K3 [get_ports {SBUS_3V3_PA[27]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[27]}]
set_property PACKAGE_PIN L1 [get_ports {SBUS_3V3_PA[26]}]
set_property IOSTANDARD LVTTL [get_ports {SBUS_3V3_PA[26]}]

279
sbus-to-ztex-gateware/sbus-to-ztex-timings-V1_2.xdc Normal file
View File

@@ -0,0 +1,279 @@
# keep those for which timings are irrelevant
# timing doesn't matter for LEDs
set_false_path -from * -to [get_ports { SBUS_DATA_OE_LED } ]
# timing doesn't matter for INTs, slow and async
set_false_path -from * -to [get_ports { SBUS_3V3_INT1s } ]
set_false_path -from * -to [get_ports { SBUS_3V3_INT2s } ]
set_false_path -from * -to [get_ports { SBUS_3V3_INT3s } ]
set_false_path -from * -to [get_ports { SBUS_3V3_INT4s } ]
set_false_path -from * -to [get_ports { SBUS_3V3_INT5s } ]
set_false_path -from * -to [get_ports { SBUS_3V3_INT6s } ]
# slow
set_false_path -from * -to [get_ports { TX } ]
# unrelated
set_clock_groups -asynchronous -group [get_clocks SBUS_3V3_CLK] -group [get_clocks fxclk_in]
# timing doesn't matter for RST, very long hold
set_false_path -from [get_ports { SBUS_3V3_RSTs } ] -to *
# changes just once at start-up time, timing is irrelevant
set_false_path -from * -to [get_ports { SBUS_OE } ]
# shut up the warning for the LEDs (the set_false_path already lower severity)
set_output_delay -clock SBUS_3V3_CLK -min 0 [get_ports { SBUS_DATA_OE_LED } ]
set_output_delay -clock SBUS_3V3_CLK -max 1 [get_ports { SBUS_DATA_OE_LED } ]
# COPY/PASTE here, same fixes needed as in the other XDC file
set_input_delay -clock SBUS_3V3_CLK -min 0.838 [get_ports {SBUS_3V3_D[1]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.368 [get_ports {SBUS_3V3_D[1]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.738 [get_ports {SBUS_3V3_D[1]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.516 [get_ports {SBUS_3V3_D[1]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.874 [get_ports {SBUS_3V3_D[0]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.415 [get_ports {SBUS_3V3_D[0]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.702 [get_ports {SBUS_3V3_D[0]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.564 [get_ports {SBUS_3V3_D[0]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.841 [get_ports {SBUS_3V3_D[3]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.371 [get_ports {SBUS_3V3_D[3]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.736 [get_ports {SBUS_3V3_D[3]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.519 [get_ports {SBUS_3V3_D[3]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.838 [get_ports {SBUS_3V3_D[2]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.368 [get_ports {SBUS_3V3_D[2]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.738 [get_ports {SBUS_3V3_D[2]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.516 [get_ports {SBUS_3V3_D[2]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.842 [get_ports {SBUS_3V3_D[5]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.373 [get_ports {SBUS_3V3_D[5]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.734 [get_ports {SBUS_3V3_D[5]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.522 [get_ports {SBUS_3V3_D[5]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.882 [get_ports {SBUS_3V3_D[4]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.426 [get_ports {SBUS_3V3_D[4]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.694 [get_ports {SBUS_3V3_D[4]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.575 [get_ports {SBUS_3V3_D[4]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.695 [get_ports {SBUS_3V3_INT2s}]
set_output_delay -clock SBUS_3V3_CLK -max 21.573 [get_ports {SBUS_3V3_INT2s}]
set_input_delay -clock SBUS_3V3_CLK -min 0.839 [get_ports {SBUS_3V3_D[6]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.369 [get_ports {SBUS_3V3_D[6]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.737 [get_ports {SBUS_3V3_D[6]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.517 [get_ports {SBUS_3V3_D[6]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.810 [get_ports {SBUS_3V3_D[7]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.330 [get_ports {SBUS_3V3_D[7]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.766 [get_ports {SBUS_3V3_D[7]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.478 [get_ports {SBUS_3V3_D[7]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.810 [get_ports {SBUS_3V3_D[8]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.330 [get_ports {SBUS_3V3_D[8]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.766 [get_ports {SBUS_3V3_D[8]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.479 [get_ports {SBUS_3V3_D[8]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.751 [get_ports {SBUS_3V3_D[9]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.251 [get_ports {SBUS_3V3_D[9]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.825 [get_ports {SBUS_3V3_D[9]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.400 [get_ports {SBUS_3V3_D[9]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.804 [get_ports {SBUS_3V3_D[10]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.322 [get_ports {SBUS_3V3_D[10]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.772 [get_ports {SBUS_3V3_D[10]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.470 [get_ports {SBUS_3V3_D[10]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.756 [get_ports {SBUS_3V3_D[11]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.258 [get_ports {SBUS_3V3_D[11]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.820 [get_ports {SBUS_3V3_D[11]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.407 [get_ports {SBUS_3V3_D[11]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.778 [get_ports {SBUS_3V3_D[12]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.287 [get_ports {SBUS_3V3_D[12]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.798 [get_ports {SBUS_3V3_D[12]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.436 [get_ports {SBUS_3V3_D[12]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.729 [get_ports {SBUS_3V3_D[13]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.222 [get_ports {SBUS_3V3_D[13]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.847 [get_ports {SBUS_3V3_D[13]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.371 [get_ports {SBUS_3V3_D[13]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.750 [get_ports {SBUS_3V3_D[14]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.250 [get_ports {SBUS_3V3_D[14]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.826 [get_ports {SBUS_3V3_D[14]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.398 [get_ports {SBUS_3V3_D[14]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.708 [get_ports {SBUS_3V3_D[15]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.193 [get_ports {SBUS_3V3_D[15]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.869 [get_ports {SBUS_3V3_D[15]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.342 [get_ports {SBUS_3V3_D[15]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.817 [get_ports {SBUS_3V3_D[16]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.339 [get_ports {SBUS_3V3_D[16]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.759 [get_ports {SBUS_3V3_D[16]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.488 [get_ports {SBUS_3V3_D[16]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.707 [get_ports {SBUS_3V3_D[17]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.192 [get_ports {SBUS_3V3_D[17]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.870 [get_ports {SBUS_3V3_D[17]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.341 [get_ports {SBUS_3V3_D[17]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.724 [get_ports {SBUS_3V3_D[18]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.215 [get_ports {SBUS_3V3_D[18]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.852 [get_ports {SBUS_3V3_D[18]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.364 [get_ports {SBUS_3V3_D[18]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.711 [get_ports {SBUS_3V3_D[19]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.198 [get_ports {SBUS_3V3_D[19]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.865 [get_ports {SBUS_3V3_D[19]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.347 [get_ports {SBUS_3V3_D[19]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.705 [get_ports {SBUS_3V3_D[20]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.191 [get_ports {SBUS_3V3_D[20]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.871 [get_ports {SBUS_3V3_D[20]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.339 [get_ports {SBUS_3V3_D[20]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.758 [get_ports {SBUS_3V3_D[21]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.261 [get_ports {SBUS_3V3_D[21]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.818 [get_ports {SBUS_3V3_D[21]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.410 [get_ports {SBUS_3V3_D[21]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.707 [get_ports {SBUS_3V3_D[22]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.192 [get_ports {SBUS_3V3_D[22]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.869 [get_ports {SBUS_3V3_D[22]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.341 [get_ports {SBUS_3V3_D[22]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.695 [get_ports {SBUS_3V3_D[23]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.177 [get_ports {SBUS_3V3_D[23]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.881 [get_ports {SBUS_3V3_D[23]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.325 [get_ports {SBUS_3V3_D[23]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.654 [get_ports {SBUS_3V3_D[24]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.122 [get_ports {SBUS_3V3_D[24]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.922 [get_ports {SBUS_3V3_D[24]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.271 [get_ports {SBUS_3V3_D[24]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.682 [get_ports {SBUS_3V3_D[25]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.159 [get_ports {SBUS_3V3_D[25]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.894 [get_ports {SBUS_3V3_D[25]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.308 [get_ports {SBUS_3V3_D[25]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.633 [get_ports {SBUS_3V3_D[26]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.094 [get_ports {SBUS_3V3_D[26]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.943 [get_ports {SBUS_3V3_D[26]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.243 [get_ports {SBUS_3V3_D[26]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.655 [get_ports {SBUS_3V3_D[27]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.123 [get_ports {SBUS_3V3_D[27]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.921 [get_ports {SBUS_3V3_D[27]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.272 [get_ports {SBUS_3V3_D[27]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.632 [get_ports {SBUS_3V3_D[28]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.093 [get_ports {SBUS_3V3_D[28]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.944 [get_ports {SBUS_3V3_D[28]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.241 [get_ports {SBUS_3V3_D[28]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.662 [get_ports {SBUS_3V3_D[29]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.133 [get_ports {SBUS_3V3_D[29]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.914 [get_ports {SBUS_3V3_D[29]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.281 [get_ports {SBUS_3V3_D[29]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.618 [get_ports {SBUS_3V3_D[30]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.074 [get_ports {SBUS_3V3_D[30]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.958 [get_ports {SBUS_3V3_D[30]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.222 [get_ports {SBUS_3V3_D[30]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.688 [get_ports {SBUS_3V3_D[31]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.168 [get_ports {SBUS_3V3_D[31]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.888 [get_ports {SBUS_3V3_D[31]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.316 [get_ports {SBUS_3V3_D[31]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.645 [get_ports {SBUS_3V3_PA[1]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.109 [get_ports {SBUS_3V3_PA[1]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.649 [get_ports {SBUS_3V3_PA[0]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.116 [get_ports {SBUS_3V3_PA[0]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.658 [get_ports {SBUS_3V3_PA[3]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.127 [get_ports {SBUS_3V3_PA[3]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.656 [get_ports {SBUS_3V3_PA[2]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.125 [get_ports {SBUS_3V3_PA[2]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.688 [get_ports {SBUS_3V3_EERs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.167 [get_ports {SBUS_3V3_EERs}]
set_output_delay -clock SBUS_3V3_CLK -min -1.888 [get_ports {SBUS_3V3_EERs}]
set_output_delay -clock SBUS_3V3_CLK -max 21.316 [get_ports {SBUS_3V3_EERs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.679 [get_ports {SBUS_3V3_PA[4]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.155 [get_ports {SBUS_3V3_PA[4]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.666 [get_ports {SBUS_3V3_PA[5]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.138 [get_ports {SBUS_3V3_PA[5]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.680 [get_ports {SBUS_3V3_PA[6]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.157 [get_ports {SBUS_3V3_PA[6]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.682 [get_ports {SBUS_3V3_PA[7]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.160 [get_ports {SBUS_3V3_PA[7]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.685 [get_ports {SBUS_3V3_PA[8]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.164 [get_ports {SBUS_3V3_PA[8]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.714 [get_ports {SBUS_3V3_PA[9]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.202 [get_ports {SBUS_3V3_PA[9]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.703 [get_ports {SBUS_3V3_PA[10]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.188 [get_ports {SBUS_3V3_PA[10]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.714 [get_ports {SBUS_3V3_PA[11]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.201 [get_ports {SBUS_3V3_PA[11]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.715 [get_ports {SBUS_3V3_PA[12]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.203 [get_ports {SBUS_3V3_PA[12]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.733 [get_ports {SBUS_3V3_PA[13]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.227 [get_ports {SBUS_3V3_PA[13]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.729 [get_ports {SBUS_3V3_PA[14]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.221 [get_ports {SBUS_3V3_PA[14]}]
set_input_delay -clock SBUS_3V3_CLK -min 1.016 [get_ports {SBUS_3V3_BGs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.605 [get_ports {SBUS_3V3_BGs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.936 [get_ports {SBUS_3V3_ASs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.497 [get_ports {SBUS_3V3_ASs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.981 [get_ports {SBUS_3V3_SIZ[0]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.558 [get_ports {SBUS_3V3_SIZ[0]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.595 [get_ports {SBUS_3V3_SIZ[0]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.706 [get_ports {SBUS_3V3_SIZ[0]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.625 [get_ports {SBUS_3V3_BRs}]
set_output_delay -clock SBUS_3V3_CLK -max 21.667 [get_ports {SBUS_3V3_BRs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.921 [get_ports {SBUS_3V3_SIZ[1]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.478 [get_ports {SBUS_3V3_SIZ[1]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.655 [get_ports {SBUS_3V3_SIZ[1]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.627 [get_ports {SBUS_3V3_SIZ[1]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.604 [get_ports {SBUS_3V3_INT1s}]
set_output_delay -clock SBUS_3V3_CLK -max 21.695 [get_ports {SBUS_3V3_INT1s}]
set_input_delay -clock SBUS_3V3_CLK -min 0.932 [get_ports {SBUS_3V3_SIZ[2]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.493 [get_ports {SBUS_3V3_SIZ[2]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.644 [get_ports {SBUS_3V3_SIZ[2]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.641 [get_ports {SBUS_3V3_SIZ[2]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.895 [get_ports {SBUS_3V3_INT6s}]
set_input_delay -clock SBUS_3V3_CLK -max 25.443 [get_ports {SBUS_3V3_INT6s}]
set_output_delay -clock SBUS_3V3_CLK -min -1.681 [get_ports {SBUS_3V3_INT6s}]
set_output_delay -clock SBUS_3V3_CLK -max 21.592 [get_ports {SBUS_3V3_INT6s}]
set_input_delay -clock SBUS_3V3_CLK -min 1.100 [get_ports {SBUS_3V3_RSTs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.717 [get_ports {SBUS_3V3_RSTs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.931 [get_ports {SBUS_3V3_SELs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.491 [get_ports {SBUS_3V3_SELs}]
set_output_delay -clock SBUS_3V3_CLK -min -1.492 [get_ports {SBUS_3V3_INT3s}]
set_output_delay -clock SBUS_3V3_CLK -max 21.845 [get_ports {SBUS_3V3_INT3s}]
set_input_delay -clock SBUS_3V3_CLK -min 0.831 [get_ports {SBUS_3V3_PPRD}]
set_input_delay -clock SBUS_3V3_CLK -max 25.358 [get_ports {SBUS_3V3_PPRD}]
set_output_delay -clock SBUS_3V3_CLK -min -1.745 [get_ports {SBUS_3V3_PPRD}]
set_output_delay -clock SBUS_3V3_CLK -max 21.507 [get_ports {SBUS_3V3_PPRD}]
set_input_delay -clock SBUS_3V3_CLK -min 0.833 [get_ports {SBUS_3V3_ACKs[0]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.361 [get_ports {SBUS_3V3_ACKs[0]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.743 [get_ports {SBUS_3V3_ACKs[0]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.510 [get_ports {SBUS_3V3_ACKs[0]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.641 [get_ports {SBUS_3V3_INT4s}]
set_output_delay -clock SBUS_3V3_CLK -max 21.645 [get_ports {SBUS_3V3_INT4s}]
set_input_delay -clock SBUS_3V3_CLK -min 0.829 [get_ports {SBUS_3V3_ACKs[1]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.355 [get_ports {SBUS_3V3_ACKs[1]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.747 [get_ports {SBUS_3V3_ACKs[1]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.504 [get_ports {SBUS_3V3_ACKs[1]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.717 [get_ports {SBUS_3V3_INT5s}]
set_output_delay -clock SBUS_3V3_CLK -max 21.544 [get_ports {SBUS_3V3_INT5s}]
set_input_delay -clock SBUS_3V3_CLK -min 0.799 [get_ports {SBUS_3V3_ACKs[2]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.315 [get_ports {SBUS_3V3_ACKs[2]}]
set_output_delay -clock SBUS_3V3_CLK -min -1.778 [get_ports {SBUS_3V3_ACKs[2]}]
set_output_delay -clock SBUS_3V3_CLK -max 21.463 [get_ports {SBUS_3V3_ACKs[2]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.788 [get_ports {SBUS_3V3_PA[15]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.301 [get_ports {SBUS_3V3_PA[15]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.797 [get_ports {SBUS_3V3_PA[17]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.313 [get_ports {SBUS_3V3_PA[17]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.855 [get_ports {SBUS_3V3_PA[16]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.389 [get_ports {SBUS_3V3_PA[16]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.811 [get_ports {SBUS_3V3_PA[19]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.332 [get_ports {SBUS_3V3_PA[19]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.852 [get_ports {SBUS_3V3_PA[18]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.386 [get_ports {SBUS_3V3_PA[18]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.812 [get_ports {SBUS_3V3_PA[21]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.332 [get_ports {SBUS_3V3_PA[21]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.849 [get_ports {SBUS_3V3_PA[20]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.382 [get_ports {SBUS_3V3_PA[20]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.818 [get_ports {SBUS_3V3_PA[23]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.340 [get_ports {SBUS_3V3_PA[23]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.859 [get_ports {SBUS_3V3_PA[22]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.395 [get_ports {SBUS_3V3_PA[22]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.827 [get_ports {SBUS_3V3_PA[25]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.352 [get_ports {SBUS_3V3_PA[25]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.863 [get_ports {SBUS_3V3_PA[24]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.401 [get_ports {SBUS_3V3_PA[24]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.824 [get_ports {SBUS_3V3_PA[27]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.348 [get_ports {SBUS_3V3_PA[27]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.871 [get_ports {SBUS_3V3_PA[26]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.412 [get_ports {SBUS_3V3_PA[26]}]

4
sbus-to-ztex/.gitignore vendored Normal file
View File

@@ -0,0 +1,4 @@
*~
*.bak
*.ps
*.gbr

168
sbus-to-ztex/B2B.sch
View File

@@ -4,7 +4,7 @@ EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 3 5
Sheet 3 6
Title "sbus-to-ztex B2B connector"
Date ""
Rev ""
@@ -22,9 +22,10 @@ AR Path="/5F676E85" Ref="JAB1" Part="1"
AR Path="/5F67E4B9/5F676E85" Ref="JAB1" Part="1"
F 0 "JAB1" H 1825 4375 50 0000 C CNN
F 1 "ZTEX_AB-ztex_AB" H 1825 4284 50 0000 C CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_2x32_P2.54mm_Vertical" H 1800 2650 50 0001 C CNN
F 2 "For_SeeedStudio:PinHeader_2x32_P2.54mm_Vertical_For_SeeedStudio" H 1800 2650 50 0001 C CNN
F 3 "" H 1800 2650 50 0001 C CNN
F 4 "10-89-7642" H 1800 2650 50 0001 C CNN "MPN"
F 5 "https://www2.mouser.com/ProductDetail/Molex/10-89-7642?qs=%2Fha2pyFadugCxzQFZUdvioDcljDVidgd4vXrOFuSRYM%3D" H 1800 2650 50 0001 C CNN "URL"
1 1800 2650
1 0 0 -1
$EndComp
@@ -81,29 +82,6 @@ Text GLabel 1600 1950 0 60 Input ~ 0
SBUS_3V3_D[11]
Text GLabel 4100 1850 2 60 Input ~ 0
SBUS_3V3_D[10]
Wire Wire Line
1600 1650 750 1650
Wire Wire Line
750 1650 750 2750
Wire Wire Line
750 2750 1450 2750
Connection ~ 1450 2750
Wire Wire Line
7400 2250 6700 2250
Wire Wire Line
6700 2250 6700 2700
Connection ~ 6700 2850
Wire Wire Line
7400 3250 6700 3250
Wire Wire Line
6700 3250 6700 2850
Wire Wire Line
1600 3550 700 3550
Wire Wire Line
700 3550 700 2750
Wire Wire Line
700 2750 750 2750
Connection ~ 750 2750
Text GLabel 4100 2150 2 60 Input ~ 0
SBUS_3V3_D[16]
Text GLabel 1600 2250 0 60 Input ~ 0
@@ -136,19 +114,19 @@ Text GLabel 1600 2950 0 60 Input ~ 0
SBUS_3V3_D[25]
Text GLabel 4100 2850 2 60 Input ~ 0
SBUS_3V3_D[24]
Text GLabel 9900 3050 2 60 Input ~ 0
Text GLabel 6650 5700 2 60 Input ~ 0
SBUS_3V3_INT[7]*
Text GLabel 6300 5850 0 60 Input ~ 0
Text GLabel 7400 2350 0 60 Input ~ 0
SBUS_3V3_INT[6]*
Text GLabel 6300 5950 0 60 Input ~ 0
Text GLabel 7400 3250 0 60 Input ~ 0
SBUS_3V3_INT[5]*
Text GLabel 6300 6050 0 60 Input ~ 0
Text GLabel 9900 3050 2 60 Input ~ 0
SBUS_3V3_INT[4]*
Text GLabel 6300 6150 0 60 Input ~ 0
SBUS_3V3_INT[3]*
Text GLabel 6300 6250 0 60 Input ~ 0
SBUS_3V3_INT[2]*
Text GLabel 9900 2550 2 60 Input ~ 0
SBUS_3V3_INT[3]*
Text GLabel 1600 1650 0 60 Input ~ 0
SBUS_3V3_INT[2]*
Text GLabel 7400 2250 0 60 Input ~ 0
SBUS_3V3_INT[1]*
Text GLabel 4100 3350 2 60 Input ~ 0
SBUS_3V3_PA[00]
@@ -210,7 +188,7 @@ Text GLabel 9900 3950 2 60 Input ~ 0
SBUS_3V3_PA[24]
Text GLabel 5550 6450 2 60 Input ~ 0
SBUS_3V3_DP
Text GLabel 7400 1950 0 60 Input ~ 0
Text GLabel 7400 2050 0 60 Input ~ 0
SBUS_3V3_SIZ[0]
Text GLabel 9900 2150 2 60 Input ~ 0
SBUS_3V3_SIZ[1]
@@ -220,7 +198,7 @@ Text GLabel 7400 2150 0 60 Input ~ 0
SBUS_3V3_BR*
Text GLabel 7400 2550 0 60 Input ~ 0
SBUS_3V3_SEL*
Text GLabel 7400 2050 0 60 Input ~ 0
Text GLabel 7400 1950 0 60 Input ~ 0
SBUS_3V3_BG*
Text GLabel 9900 1950 2 60 Input ~ 0
SBUS_3V3_AS*
@@ -232,12 +210,8 @@ Text GLabel 7400 3050 0 60 Input ~ 0
SBUS_3V3_ACK[0]*
Text GLabel 7400 2950 0 60 Input ~ 0
SBUS_3V3_PPRD
Text GLabel 7400 2350 0 60 Input ~ 0
Text GLabel 1600 3550 0 60 Input ~ 0
SBUS_3V3_EER*
Text GLabel 7400 1450 0 60 Input ~ 0
LED0
Text GLabel 7400 1550 0 60 Input ~ 0
LED1
Wire Wire Line
1800 5850 1650 5850
Wire Wire Line
@@ -299,9 +273,12 @@ U 1 1 5F69129B
P 9250 850
F 0 "J1" H 9356 1228 50 0000 C CNN
F 1 "Conn_01x06_Male" H 9356 1137 50 0000 C CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical" H 9250 850 50 0001 C CNN
F 2 "For_SeeedStudio:PinHeader_1x06_P2.54mm_Horizontal_For_SeeedStudio" H 9250 850 50 0001 C CNN
F 3 "~" H 9250 850 50 0001 C CNN
F 4 "22-28-4060" H 9250 850 50 0001 C CNN "MPN"
F 4 "22-28-8060" H 9250 850 50 0001 C CNN "MPN-ALT"
F 5 "PZ254R-11-06P" H 9250 850 50 0001 C CNN "MPN"
F 6 "https://www2.mouser.com/ProductDetail/Molex/22-28-8060?qs=4XSMV6Twtb2rYD%2F%2F316gfQ==" H 9250 850 50 0001 C CNN "URL-ALT"
F 7 "https://lcsc.com/product-detail/Pin-Header-Female-Header_XFCN-PZ254R-11-06P_C492414.html" H 9250 850 50 0001 C CNN "URL"
1 9250 850
1 0 0 -1
$EndComp
@@ -346,16 +323,13 @@ AR Path="/5F676F65" Ref="JCD1" Part="1"
AR Path="/5F67E4B9/5F676F65" Ref="JCD1" Part="1"
F 0 "JCD1" H 7650 4375 50 0000 C CNN
F 1 "ZTEX_CD-ztex_CD" H 7650 4284 50 0000 C CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_2x32_P2.54mm_Vertical" H 7600 2650 50 0001 C CNN
F 2 "For_SeeedStudio:PinHeader_2x32_P2.54mm_Vertical_For_SeeedStudio" H 7600 2650 50 0001 C CNN
F 3 "" H 7600 2650 50 0001 C CNN
F 4 "10-89-7642" H 7600 2650 50 0001 C CNN "MPN"
F 5 "https://www2.mouser.com/ProductDetail/Molex/10-89-7642?qs=%2Fha2pyFadugCxzQFZUdvioDcljDVidgd4vXrOFuSRYM%3D" H 7600 2650 50 0001 C CNN "URL"
1 7600 2650
1 0 0 -1
$EndComp
Text GLabel 7400 1650 0 60 Input ~ 0
LED2
Text GLabel 7400 1750 0 60 Input ~ 0
LED3
Text GLabel 2800 5850 2 60 Input ~ 12
SBUS_DATA_OE_LED
Text Notes 5500 5550 0 50 ~ 0
@@ -364,74 +338,17 @@ Text GLabel 9900 2950 2 60 Input ~ 12
SBUS_OE
Text GLabel 9900 2350 2 60 Input ~ 12
SBUS_DATA_OE_LED
Wire Wire Line
1800 6400 1650 6400
Wire Wire Line
1650 6400 1650 6600
Wire Wire Line
2100 6400 2500 6400
$Comp
L Device:R ROE?
U 1 1 5F75534A
P 2650 6400
AR Path="/5F6B165A/5F75534A" Ref="ROE?" Part="1"
AR Path="/5F67E4B9/5F75534A" Ref="ROE2" Part="1"
F 0 "ROE2" V 2730 6400 50 0000 C CNN
F 1 "549" V 2650 6400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 2580 6400 50 0001 C CNN
F 3 "" H 2650 6400 50 0000 C CNN
F 4 "0603WAF5490T5E" V 2650 6400 50 0001 C CNN "MPN"
1 2650 6400
0 1 1 0
$EndComp
Text Label 2150 6400 0 60 ~ 0
DATA_OE_LED_2
$Comp
L Device:LED_ALT D?
U 1 1 5F75535B
P 1950 6400
AR Path="/5F6B165A/5F75535B" Ref="D?" Part="1"
AR Path="/5F67E4B9/5F75535B" Ref="DOE2" Part="1"
F 0 "DOE2" H 1950 6500 50 0000 C CNN
F 1 "RED" H 1600 6400 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 1950 6400 50 0001 C CNN
F 3 "https://optoelectronics.liteon.com/upload/download/DS-22-99-0150/LTST-C170KRKT.pdf" H 1950 6400 50 0001 C CNN
F 4 "www.liteon.com" H 1950 6400 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170KRKT" H 1950 6400 60 0001 C CNN "MPN"
F 6 "859-LTST-C170KRKT" H 1950 6400 60 0001 C CNN "Mouser"
F 7 "743-IN-S85ATR" H 1950 6400 50 0001 C CNN "Mouse_r2"
F 8 "160-1415-1-ND" H 1950 6400 50 0001 C CNN "Digikey"
F 9 "C94868" H 1950 6400 50 0001 C CNN "LCSC"
F 10 "0.0195$" H 1950 6400 50 0001 C CNN "price400_LCSC"
F 11 "FV007" H 1950 6400 50 0001 C CNN "Koncar"
F 12 "TB" H 1950 6400 50 0001 C CNN "Side"
1 1950 6400
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0120
U 1 1 5F755362
P 1650 6600
F 0 "#PWR0120" H 1650 6350 50 0001 C CNN
F 1 "GND" H 1655 6427 50 0000 C CNN
F 2 "" H 1650 6600 50 0001 C CNN
F 3 "" H 1650 6600 50 0001 C CNN
1 1650 6600
1 0 0 -1
$EndComp
Text GLabel 2800 6400 2 60 Input ~ 12
SBUS_DATA_OE_LED_2
Text GLabel 9900 2450 2 60 Input ~ 12
SBUS_DATA_OE_LED_2
$Comp
L Connector_Generic:Conn_02x07_Odd_Even J3
U 1 1 5F749BE1
P 3150 7250
F 0 "J3" H 3200 7767 50 0000 C CNN
F 1 "Conn_02x07_Odd_Even" H 3200 7676 50 0000 C CNN
F 2 "Connector_PinHeader_2.00mm:PinHeader_2x07_P2.00mm_Horizontal" H 3150 7250 50 0001 C CNN
F 2 "For_SeeedStudio:PinHeader_2x07_P2.00mm_Horizontal_For_SeeedStudio" H 3150 7250 50 0001 C CNN
F 3 "https://www.molex.com/pdm_docs/sd/878331420_sd.pdf" H 3150 7250 50 0001 C CNN
F 4 "878331420" H 3150 7250 50 0001 C CNN "MPN"
F 4 "87833-1420" H 3150 7250 50 0001 C CNN "MPN"
F 5 "A2005WR-N-2X7P-B" H 3150 7250 50 0001 C CNN "MPN-ALT"
F 6 "https://www2.mouser.com/ProductDetail/Molex/87833-1420?qs=%2Fha2pyFadujYFYCIYI1IvFCvLi7no9WQYzIL%2FpYxKhg%3D" H 3150 7250 50 0001 C CNN "URL"
1 3150 7250
1 0 0 -1
$EndComp
@@ -497,14 +414,6 @@ Wire Wire Line
7150 2650 7400 2650
Wire Wire Line
7150 1350 7400 1350
Text GLabel 9900 3150 2 60 Input ~ 0
LED4
Text GLabel 9900 3250 2 60 Input ~ 0
LED5
Text GLabel 9900 3350 2 60 Input ~ 0
LED6
Text GLabel 9900 3450 2 60 Input ~ 0
LED7
Wire Wire Line
1450 2550 1600 2550
Wire Wire Line
@@ -619,7 +528,6 @@ Wire Wire Line
Wire Wire Line
6250 2700 6700 2700
Connection ~ 4100 2550
Connection ~ 6700 2700
Wire Wire Line
6700 2700 6700 2850
$Comp
@@ -671,6 +579,28 @@ Wire Wire Line
10200 1350 9900 1350
Wire Wire Line
9450 1050 10200 1050
Text Notes 10100 2100 0 50 ~ 0
Free
Text GLabel 7400 1450 0 50 Input ~ 0
USBH0_D+
Text GLabel 7400 1550 0 50 Input ~ 0
USBH0_D-
Text GLabel 7400 1650 0 50 Input ~ 0
PMOD-12
Text GLabel 9900 3450 2 50 Input ~ 0
PMOD-5
Text GLabel 9900 2450 2 50 Input ~ 0
PMOD-6
Text GLabel 9900 3350 2 50 Input ~ 0
PMOD-7
Text GLabel 9900 2050 2 50 Input ~ 0
PMOD-8
Text GLabel 9900 3250 2 50 Input ~ 0
PMOD-9
Text GLabel 9900 3150 2 50 Input ~ 0
PMOD-10
Text GLabel 7400 1750 0 50 Input ~ 0
PMOD-11
Text GLabel 2350 5000 0 60 Input ~ 12
LED0
Text GLabel 2800 5350 0 60 Input ~ 12
LED1
$EndSCHEMATC

530
sbus-to-ztex/Backplate.scad
View File

@@ -1,3 +1,6 @@
add_fan = 0; // not really compatible with USB...
add_vga = 1;
SBUS_WIDTH = 83.82;
SBUS_LENGTH = 146.7;
SBUS_THICKNESS = 1.6;
@@ -6,8 +9,7 @@ MYSBUS_MISSING_LENGTH = 47;
SBUS_BACKPLATE_THICKNESS = 1.19;
SBUS_BACKPLATE_FULLHEIGHT = 19.64;
SBUS_BACKPLATE_PROTUSION_HEIGHT = 1.22;
SBUS_BACKPLATE_HEIGHT =
SBUS_BACKPLATE_FULLHEIGHT - SBUS_BACKPLATE_PROTUSION_HEIGHT;
SBUS_BACKPLATE_HEIGHT = SBUS_BACKPLATE_FULLHEIGHT - SBUS_BACKPLATE_PROTUSION_HEIGHT;
SBUS_BACKPLATE_PROTUSION_FROMSIDE = 13;
SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM = 1.12;
@@ -16,23 +18,18 @@ SBUS_GAP_BACKPLATE = 2.54;
SBUS_BACKPLATE_TOPHOLETOTOPHOLE = 79.24;
SBUS_BACKPLATE_TOPHOLEFROMSIDE = 2.29;
SBUS_BACKPLATE_TOPHOLEFROMBOTTOM = 15.43;
SBUS_BACKPLATE_TOPHOLEFROMFULLBOTTOM =
SBUS_BACKPLATE_TOPHOLEFROMBOTTOM + SBUS_BACKPLATE_PROTUSION_HEIGHT;
SBUS_BACKPLATE_TOPHOLEFROMFULLBOTTOM = SBUS_BACKPLATE_TOPHOLEFROMBOTTOM + SBUS_BACKPLATE_PROTUSION_HEIGHT;
SBUS_BACKPLATE_HOLESTOHOLES = 78.23;
SBUS_BACKPLATE_HOLEFROMSIDE = 2.795;
SBUS_BACKPLATE_HOLEFROMFULLBOTTOM = 7.08;
SBUS_BACKPLATE_HOLEFROMBOTTOM =
SBUS_BACKPLATE_HOLEFROMFULLBOTTOM - SBUS_BACKPLATE_PROTUSION_HEIGHT;
SBUS_BACKPLATE_HOLEFROMBOTTOM = SBUS_BACKPLATE_HOLEFROMFULLBOTTOM - SBUS_BACKPLATE_PROTUSION_HEIGHT;
SBUS_BACKPLATE_WIDTH =
SBUS_BACKPLATE_TOPHOLETOTOPHOLE + 2 * SBUS_BACKPLATE_TOPHOLEFROMSIDE;
SBUS_BACKPLATE_PROTUSION_WIDTH =
SBUS_BACKPLATE_WIDTH - 2 * SBUS_BACKPLATE_PROTUSION_FROMSIDE;
SBUS_BACKPLATE_WIDTH = SBUS_BACKPLATE_TOPHOLETOTOPHOLE + 2 * SBUS_BACKPLATE_TOPHOLEFROMSIDE;
SBUS_BACKPLATE_PROTUSION_WIDTH = SBUS_BACKPLATE_WIDTH - 2 * SBUS_BACKPLATE_PROTUSION_FROMSIDE;
MY_FULL_LENGTH =
MYSBUS_MISSING_LENGTH + SBUS_GAP_BACKPLATE + SBUS_BACKPLATE_THICKNESS;
MY_FULL_LENGTH = MYSBUS_MISSING_LENGTH + SBUS_GAP_BACKPLATE + SBUS_BACKPLATE_THICKNESS;
//holes:
// 110,130.82
@@ -41,170 +38,425 @@ MY_FULL_LENGTH =
// top left 97,50
// -> 13,80.82 ; 13,70.82 ; 13,32 from top left
STRUT_HEIGHT=10.01; // max 15.31
STRUT_WIDTH=3;
SMALL_STRUT_HEIGHT=5;
SMALL_STRUT_WIDTH=2;
SMALL_STRUT_LENGTH=20;
STRUT_HEIGHT = 10.01; // max 15.31
STRUT_WIDTH = 3;
SMALL_STRUT_HEIGHT = 5;
SMALL_STRUT_WIDTH = 2;
SMALL_STRUT_LENGTH = 20;
module primary() {
union ()
USB_PLUG_OFFSET = (add_vga!=0 ? 65 : 30);
fan_depth=8;
fan_height=25;
fan_width=fan_height;
fan_carrier_depth=5;
fan_extra_height=3;
vertical_offset=fan_height/2-SBUS_THICKNESS/2-(SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM)+fan_extra_height/2;
carrier_offset_from_backplate=8;
carrier_offset=-MY_FULL_LENGTH/2+fan_width/2+carrier_offset_from_backplate; // negative -> toward back
echo(carrier_offset);
module
primary ()
{
color ("green") cube ([SBUS_WIDTH, MY_FULL_LENGTH, SBUS_THICKNESS], center = true);
USBCABLE_HOLLOWOUT_WIDTH = 10;
USBCABLE_HOLLOWOUT_LENGTH = 16;
USBCABLE_HOLLOWOUT_OFFSETX = -7.5+0.001;
USBCABLE_HOLLOWOUT_OFFSETY = -16;
USBCABLE_HOLLOWOUT2_WIDTH = 21;
USBCABLE_HOLLOWOUT2_LENGTH = 6;
USBCABLE_HOLLOWOUT2_OFFSETX = -12.5;
USBCABLE_HOLLOWOUT2_OFFSETY = -16;
for (i =[-2:1:2]) {
translate ([i*15+2.5,0,STRUT_HEIGHT/2-0.1]) color("red") cube([STRUT_WIDTH, MY_FULL_LENGTH, STRUT_HEIGHT], center = true);
}
// translate ([SBUS_WIDTH/2-18,7+(MY_FULL_LENGTH-SMALL_STRUT_LENGTH)/2,SMALL_STRUT_HEIGHT/2]) color("red") cube([SMALL_STRUT_WIDTH, SMALL_STRUT_LENGTH, SMALL_STRUT_HEIGHT], center = true);
// translate ([-SBUS_WIDTH/2+24,7+(MY_FULL_LENGTH-SMALL_STRUT_LENGTH)/2,SMALL_STRUT_HEIGHT/2]) color("red") cube([SMALL_STRUT_WIDTH, SMALL_STRUT_LENGTH, SMALL_STRUT_HEIGHT], center = true);
translate ([0, -MY_FULL_LENGTH / 2 + SBUS_BACKPLATE_THICKNESS / 2,
SBUS_BACKPLATE_HEIGHT / 2 - SBUS_THICKNESS / 2 -
SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM])
union () // A
{
union ()
{
color ("black")
cube ([SBUS_BACKPLATE_WIDTH, SBUS_BACKPLATE_THICKNESS,
SBUS_BACKPLATE_HEIGHT], center = true);
translate ([0, 0, -SBUS_BACKPLATE_PROTUSION_HEIGHT / 2])
difference() { // B
union() { // C
color ("green") cube ([SBUS_WIDTH, MY_FULL_LENGTH, SBUS_THICKNESS], center = true);
translate ([0, -MY_FULL_LENGTH / 2 + SBUS_BACKPLATE_THICKNESS / 2, SBUS_BACKPLATE_HEIGHT / 2 - SBUS_THICKNESS / 2 - SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM]) {
union ()
{
color ("black")
cube ([SBUS_BACKPLATE_PROTUSION_WIDTH, SBUS_BACKPLATE_THICKNESS,
SBUS_BACKPLATE_FULLHEIGHT], center = true);
}
cube ([SBUS_BACKPLATE_WIDTH, SBUS_BACKPLATE_THICKNESS, SBUS_BACKPLATE_HEIGHT], center = true);
translate ([0, 0, -SBUS_BACKPLATE_PROTUSION_HEIGHT / 2]) {
color ("black")
cube ([SBUS_BACKPLATE_PROTUSION_WIDTH, SBUS_BACKPLATE_THICKNESS, SBUS_BACKPLATE_FULLHEIGHT], center = true);
}
} // union
}
/* USB plug (StarTech cable) */
union() {
color ("grey")
translate ([-SBUS_WIDTH/2+USB_PLUG_OFFSET,
0.001-MY_FULL_LENGTH/2+4,
14.8/2-SBUS_THICKNESS/2-SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM-SBUS_BACKPLATE_PROTUSION_HEIGHT + 3.12])
cube ([16.5+4, 12, 9.5+4 /* 14.8 max */], center = true);
}
}
MY_BOARD_OVERLAP_LENGTH = 20;
MY_BACKPLATE_OVERLAP_LENGTH = 12;
MY_OVERLAP_LENGTH = MY_BOARD_OVERLAP_LENGTH + MY_BACKPLATE_OVERLAP_LENGTH;
FIXHOLE_X_OFFSET = 13;
FIXHOLE1_Y_OFFSET = 80.82;
FIXHOLE2_Y_OFFSET = 70.82;
FIXHOLE3_Y_OFFSET = 32;
if (0) for (i =[-2: 1:2]) {
translate ([i * 15 + 2.5, 0, STRUT_HEIGHT / 2 - 0.1]) color ("red") cube ([STRUT_WIDTH, MY_FULL_LENGTH, STRUT_HEIGHT], center = true);
}
} // union C
union() { // Z
translate ([SBUS_WIDTH / 2 - USBCABLE_HOLLOWOUT_WIDTH / 2 + 5+ USBCABLE_HOLLOWOUT_OFFSETX,
MY_FULL_LENGTH / 2 + USBCABLE_HOLLOWOUT_LENGTH / 2 + USBCABLE_HOLLOWOUT_OFFSETY,
0]) {
color ("yellow")
cube ([USBCABLE_HOLLOWOUT_WIDTH, USBCABLE_HOLLOWOUT_LENGTH, 50], center = true);
}
translate ([SBUS_WIDTH / 2 - USBCABLE_HOLLOWOUT2_WIDTH / 2 + 5+ USBCABLE_HOLLOWOUT2_OFFSETX,
MY_FULL_LENGTH / 2 + USBCABLE_HOLLOWOUT2_LENGTH / 2 + USBCABLE_HOLLOWOUT2_OFFSETY,
0]) {
color ("yellow")
cube ([USBCABLE_HOLLOWOUT2_WIDTH, USBCABLE_HOLLOWOUT2_LENGTH, 50], center = true);
}
/* USB plug (StarTech cable) */
union() {
color ("yellow")
translate ([-SBUS_WIDTH/2+USB_PLUG_OFFSET,
0.001-MY_FULL_LENGTH/2+4,
14.8/2-SBUS_THICKNESS/2-SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM-SBUS_BACKPLATE_PROTUSION_HEIGHT + 3.12])
cube ([16.5, 20, 9.5], center = true);
}
} // union Z
FIXHOLE_RAD = 1.55;
}// difference B
//translate ([SBUS_WIDTH/2-18,7+(MY_FULL_LENGTH-SMALL_STRUT_LENGTH)/2,SMALL_STRUT_HEIGHT/2]) color("red") cube([SMALL_STRUT_WIDTH, SMALL_STRUT_LENGTH, SMALL_STRUT_HEIGHT], center = true);
//translate ([-SBUS_WIDTH/2+24,7+(MY_FULL_LENGTH-SMALL_STRUT_LENGTH)/2,SMALL_STRUT_HEIGHT/2]) color("red") cube([SMALL_STRUT_WIDTH, SMALL_STRUT_LENGTH, SMALL_STRUT_HEIGHT], center = true);
SERIAL_HOLLOWOUT_WIDTH = 18;
SERIAL_HOLLOWOUT_LENGTH = 5;
SERIAL_HOLLOWOUT_OFFSET = 3;
MY_BOARD_OVERLAP_LENGTH = 20;
MY_BACKPLATE_OVERLAP_LENGTH = 12;
MY_OVERLAP_LENGTH = MY_BOARD_OVERLAP_LENGTH + MY_BACKPLATE_OVERLAP_LENGTH;
FIXHOLE_X_OFFSET = 13;
FIXHOLE1_Y_OFFSET = SBUS_WIDTH - 16.3;
FIXHOLE2_Y_OFFSET = SBUS_WIDTH - 66.82;
FIXHOLE3_Y_OFFSET = 32;
FIXHOLE_RAD = 1.55;
SERIAL_HOLLOWOUT_WIDTH = 18;
SERIAL_HOLLOWOUT_LENGTH = 5;
SERIAL_HOLLOWOUT_OFFSET = 3;
PMOD_HOLLOWOUT_WIDTH = 18;
PMOD_HOLLOWOUT_LENGTH = 9;
PMOD_HOLLOWOUT_OFFSETX = (31 - SBUS_WIDTH) + PMOD_HOLLOWOUT_WIDTH / 2;
PMOD_HOLLOWOUT_OFFSETY = 10;
USB_HOLLOWOUT_WIDTH = 14;
USB_HOLLOWOUT_LENGTH = 5;
USB_HOLLOWOUT_OFFSETX = -5+0.001;
USB_HOLLOWOUT_OFFSETY = 6;
SDCARD_HOLLOWOUT_WIDTH = 5;
SDCARD_HOLLOWOUT_LENGTH = 5;
SDCARD_HOLLOWOUT_OFFSETX = -36+SDCARD_HOLLOWOUT_WIDTH/2+0.001;
SDCARD_HOLLOWOUT_OFFSETY = 2.501;
JTAG_HOLLOWOUT_WIDTH = 5;
JTAG_HOLLOWOUT_LENGTH = 16;
JTAG_HOLLOWOUT_OFFSET = 6;
JTAG_HOLLOWOUT_WIDTH = 5;
JTAG_HOLLOWOUT_LENGTH = 16;
JTAG_HOLLOWOUT_OFFSET = 6;
difference()
{
translate ([0,
MY_FULL_LENGTH / 2 + MY_OVERLAP_LENGTH / 2 -
MY_BACKPLATE_OVERLAP_LENGTH, 0.00000000001-SBUS_THICKNESS/2
-(SBUS_BACKPLATE_PROTUSION_HEIGHT+SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM)/2])
{
color ("blue") cube ([SBUS_WIDTH, MY_OVERLAP_LENGTH, /*SBUS_THICKNESS*/SBUS_BACKPLATE_PROTUSION_HEIGHT+SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM],
center = true);
}
union ()
{
translate ([-SBUS_WIDTH / 2 + FIXHOLE1_Y_OFFSET,
MY_FULL_LENGTH / 2 + FIXHOLE_X_OFFSET, 0])
{
color ("yellow") cylinder (h = 50, r1 = FIXHOLE_RAD, r2 = FIXHOLE_RAD, center = true);
difference () { // I
union () {
translate ([0,
MY_FULL_LENGTH / 2 + MY_OVERLAP_LENGTH / 2 -
MY_BACKPLATE_OVERLAP_LENGTH, 0.00000000001 - SBUS_THICKNESS / 2 - (SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM) / 2]) {
color ("blue")
cube ([SBUS_WIDTH, MY_OVERLAP_LENGTH, /*SBUS_THICKNESS */
SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM], center = true);
}
translate ([-SBUS_WIDTH / 2 + FIXHOLE2_Y_OFFSET,
MY_FULL_LENGTH / 2 + FIXHOLE_X_OFFSET, 0])
{
color ("yellow") cylinder (h = 50, r1 = FIXHOLE_RAD, r2 = FIXHOLE_RAD, center = true);
STRUT_WIDTH=2;
translate ([
SBUS_WIDTH/2-STRUT_WIDTH/2,
-12+MY_FULL_LENGTH / 2 + MY_OVERLAP_LENGTH / 2 -
MY_BACKPLATE_OVERLAP_LENGTH, 0.00000000001 - SBUS_THICKNESS / 2 - (SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM) / 2]) {
color ("blue")
cube ([STRUT_WIDTH, MY_OVERLAP_LENGTH, /*SBUS_THICKNESS */
SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM], center = true);
}
translate ([-SBUS_WIDTH / 2 + FIXHOLE3_Y_OFFSET,
MY_FULL_LENGTH / 2 + FIXHOLE_X_OFFSET, 0])
{
color ("yellow") cylinder (h = 50, r1 = FIXHOLE_RAD, r2 = FIXHOLE_RAD, center = true);
}
translate ([SBUS_WIDTH / 2 - SERIAL_HOLLOWOUT_WIDTH / 2 + 5,
MY_FULL_LENGTH / 2 + SERIAL_HOLLOWOUT_OFFSET +
SERIAL_HOLLOWOUT_LENGTH / 2, 0])
{
color ("yellow")
cube ([SERIAL_HOLLOWOUT_WIDTH + 10, SERIAL_HOLLOWOUT_LENGTH, 50],
center = true);
}
translate ([-SBUS_WIDTH / 2 + JTAG_HOLLOWOUT_WIDTH / 2 +
JTAG_HOLLOWOUT_OFFSET,
MY_FULL_LENGTH / 2 + JTAG_HOLLOWOUT_LENGTH / 2, 0])
{
color ("yellow")
cube ([JTAG_HOLLOWOUT_WIDTH, JTAG_HOLLOWOUT_LENGTH, 50], center =
true);
}
}
}
}
union () // J
{
/* fixing holes */
translate ([-SBUS_WIDTH / 2 + FIXHOLE1_Y_OFFSET, MY_FULL_LENGTH / 2 + FIXHOLE_X_OFFSET, 0]) {
color ("yellow") cylinder (h = 50, r1 = FIXHOLE_RAD, r2 = FIXHOLE_RAD, center = true);
}
translate ([-SBUS_WIDTH / 2 + FIXHOLE2_Y_OFFSET, MY_FULL_LENGTH / 2 + FIXHOLE_X_OFFSET, 0]) {
color ("yellow") cylinder (h = 50, r1 = FIXHOLE_RAD, r2 = FIXHOLE_RAD, center = true);
}
/*
translate ([-SBUS_WIDTH / 2 + FIXHOLE3_Y_OFFSET, MY_FULL_LENGTH / 2 + FIXHOLE_X_OFFSET, 0]) {
color ("yellow") cylinder (h = 50, r1 = FIXHOLE_RAD, r2 = FIXHOLE_RAD, center = true);
}
*/
/*
translate ([SBUS_WIDTH / 2 - SERIAL_HOLLOWOUT_WIDTH / 2 + 5, MY_FULL_LENGTH / 2 + SERIAL_HOLLOWOUT_OFFSET + SERIAL_HOLLOWOUT_LENGTH / 2, 0]) {
color ("yellow")
cube ([SERIAL_HOLLOWOUT_WIDTH + 10, SERIAL_HOLLOWOUT_LENGTH, 50], center = true);
}
*/
translate ([SBUS_WIDTH / 2 - PMOD_HOLLOWOUT_WIDTH / 2 + PMOD_HOLLOWOUT_OFFSETX,
MY_FULL_LENGTH / 2 + PMOD_HOLLOWOUT_LENGTH / 2 + PMOD_HOLLOWOUT_OFFSETY,
0]) {
color ("yellow")
cube ([PMOD_HOLLOWOUT_WIDTH, PMOD_HOLLOWOUT_LENGTH, 50], center = true);
}
translate ([SBUS_WIDTH / 2 - USB_HOLLOWOUT_WIDTH / 2 + 5+ USB_HOLLOWOUT_OFFSETX,
MY_FULL_LENGTH / 2 + USB_HOLLOWOUT_LENGTH / 2 + USB_HOLLOWOUT_OFFSETY,
0]) {
color ("yellow")
cube ([USB_HOLLOWOUT_WIDTH, USB_HOLLOWOUT_LENGTH, 50], center = true);
}
translate ([SBUS_WIDTH / 2 - SDCARD_HOLLOWOUT_WIDTH / 2 + 5+ SDCARD_HOLLOWOUT_OFFSETX,
MY_FULL_LENGTH / 2 + SDCARD_HOLLOWOUT_LENGTH / 2 + SDCARD_HOLLOWOUT_OFFSETY,
0]) {
color ("yellow")
cube ([SDCARD_HOLLOWOUT_WIDTH, SDCARD_HOLLOWOUT_LENGTH, 50], center = true);
}
translate ([-SBUS_WIDTH / 2 + JTAG_HOLLOWOUT_WIDTH / 2 + JTAG_HOLLOWOUT_OFFSET,
MY_FULL_LENGTH / 2 + JTAG_HOLLOWOUT_LENGTH / 2,
0]) {
color ("yellow")
cube ([JTAG_HOLLOWOUT_WIDTH, JTAG_HOLLOWOUT_LENGTH, 50], center = true);
}
/* USB */
translate ([SBUS_WIDTH / 2 - USBCABLE_HOLLOWOUT_WIDTH / 2 + 5+ USBCABLE_HOLLOWOUT_OFFSETX,
MY_FULL_LENGTH / 2 + USBCABLE_HOLLOWOUT_LENGTH / 2 + USBCABLE_HOLLOWOUT_OFFSETY,
0]) {
color ("yellow")
cube ([USBCABLE_HOLLOWOUT_WIDTH, USBCABLE_HOLLOWOUT_LENGTH, 50], center = true);
}
} // union J
} // difference I
} // union A
}
module extra_holes() {
EXTRA_RAD=2;
union() {
for (i =[-8: 16:8])
module
extra_holes ()
{
EXTRA_RAD = 2;
union ()
{
for (j =[-4:1:5])
{
/* border line (fan & jtag sides) */
for (i =[-8: 16:8]) {
for (j =[-4: 1:8]) {
if ((i!=8) || (j < 1))
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = 1.5, r2 = 1.5, center = true);
}
}
for (i =[-8: 5000:8])
{
for (j =[6:1:8])
{
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = 1.5, r2 = 1.5, center = true);
}
}
}
for (i =[-6: 2:6])
{
for (j =[-4:1:5])
{
/* holes in extension */
for (i =[-6: 2:6]) {
for (j =[-4: 1:5]) {
if (((i<-4) || (i>0)) || (add_vga==0))
if (((i<=2) || i>=8) || (j>-3)) // USB plug
if (!((i>=5) && (j>=4))) // USB weakness
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = EXTRA_RAD, r2 = EXTRA_RAD, center = true);
}
}
for (i =[-7: 2:7])
{
for (j =[-4.5:1:4.5])
{
}
/* holes in extension */
for (i =[-7: 2:7]) {
for (j =[-4.5: 1:4.5]) {
if (((i<-5) || (i>1)) || (j>0 && j<4 ) || (add_vga==0))
if (((i<=2) || i>=7) || (j>-3)) // USB plug
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = EXTRA_RAD, r2 = EXTRA_RAD, center = true);
}
}
for (i =[-4: 2:4])
{
for (j =[5: 1:8])
{
if (!((i==-2)&&(j>=7)))
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = EXTRA_RAD, r2 = EXTRA_RAD, center = true);
}
}
for (i =[-5: 2:3])
{
for (j =[5.5: 1:8.5])
{
}
/* holes in support */
for (i =[-4: 2:6]) {
for (j =[5: 1:8]) {
if (((i<-4) || (i>0)) || (j>5) || (add_vga==0))
if (!((i==6) && (j>=5) && (j<=8))) // USB weakness
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = EXTRA_RAD, r2 = EXTRA_RAD, center = true);
}
}
/* holes in support */
for (i =[-5: 2:7]) {
for (j =[5.5: 1:8.5]) {
if (!((i==5) && (j > 7)) && !((i==-5) && (j > 7))) // fixation holes are there
if (!((i==7) && (j>=5.5) && (j<=7.5))) // USB weakness
translate ([i * 5, j * 5, 0])
color ("pink") cylinder (h = 50, r1 = EXTRA_RAD, r2 = EXTRA_RAD, center = true);
}
}
}
}
module
fan_25mm_carveout() {
translate([(SBUS_WIDTH-fan_depth)/2+fan_carrier_depth/2+0.4999,carrier_offset,vertical_offset]) {
color("pink") cube([fan_depth+fan_carrier_depth+1, fan_width, fan_height], center = true);
}
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
rotate([0,90,0]) color("red") cylinder(h=0.01+fan_carrier_depth,r1=(fan_width/2-1),r2=(fan_width/2-1), center=true);
}
union() {
if (0) translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
rotate([0,90,0]) color("red") cylinder(h=2+fan_carrier_depth,r1=(fan_width/2-1),r2=(fan_width/2-1), center=true);
}
translate([0,-10,-10])
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
rotate([0,90,0]) color("red") cylinder(h=2+fan_carrier_depth,r1=screw_hole_r,r2=screw_hole_r, center=true);
}
translate([0, 10,-10])
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
rotate([0,90,0]) color("red") cylinder(h=2+fan_carrier_depth,r1=screw_hole_r,r2=screw_hole_r, center=true);
}
translate([0, 10, 10])
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
rotate([0,90,0]) color("red") cylinder(h=2+fan_carrier_depth,r1=screw_hole_r,r2=screw_hole_r, center=true);
}
translate([0,-10, 10])
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
rotate([0,90,0]) color("red") cylinder(h=2+fan_carrier_depth,r1=screw_hole_r,r2=screw_hole_r, center=true);
}
}
}
module vga_support() {
/* plug */
union() {
color ("grey")
translate ([-SBUS_WIDTH/2+31,
0.001-MY_FULL_LENGTH/2-1/2,
14.8/2-SBUS_THICKNESS/2-SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM-SBUS_BACKPLATE_PROTUSION_HEIGHT + 3.12])
cube ([31.8+10, 2, 14.8], center = true);
}
/* pcb */
if (0) color ("violet")
translate ([-SBUS_WIDTH/2+31,
0,
0.00000000001 - SBUS_THICKNESS / 2 - (SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM) / 2])
cube ([19.2+4, MY_FULL_LENGTH,
SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM], center = true);
if (0) color ("violet")
translate ([-SBUS_WIDTH/2+31,
-MY_FULL_LENGTH/2+22/2,
0.00000000001 - SBUS_THICKNESS / 2 - (SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM) / 2])
cube ([31.8+4, 22, /*SBUS_THICKNESS */
SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM], center = true);
color ("violet")
translate ([-SBUS_WIDTH/2+31,
-MY_FULL_LENGTH/2+5/2,
0.00000000001 - SBUS_THICKNESS / 2 - (SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM) / 2])
cube ([31.8+8, 5, /*SBUS_THICKNESS */
SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM], center = true);
color ("violet")
translate ([-SBUS_WIDTH/2+31,
-MY_FULL_LENGTH/2+5/2+15,
0.00000000001 - SBUS_THICKNESS / 2 - (SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM) / 2])
cube ([31.8+8, 4, /*SBUS_THICKNESS */
SBUS_BACKPLATE_PROTUSION_HEIGHT + SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM], center = true);
}
module vga_carveout() {
union() {
/* plug */
color ("yellow")
translate ([-SBUS_WIDTH/2+31,
-0-MY_FULL_LENGTH/2-1/2,
0.001/2+14.5/2])
cube ([18, 5+0.001, 10], center = true); // hole big enough for the cable shield
translate ([-SBUS_WIDTH/2+31-12.5,
-MY_FULL_LENGTH/2-1/2,
6.3+SBUS_THICKNESS/2]) rotate([90,0,0]) color ("yellow") cylinder (h = 10, r1 = 1.6, r2 = 1.6, center = true);
translate ([-SBUS_WIDTH/2+31+12.5,
-MY_FULL_LENGTH/2-1/2,
6.3+SBUS_THICKNESS/2]) rotate([90,0,0]) color ("yellow") cylinder (h = 10, r1 = 1.6, r2 = 1.6, center = true);
/* pcb */
color ("yellow")
translate ([-SBUS_WIDTH/2+31,
0,
-0.001])
cube ([19.2+0.8, MY_FULL_LENGTH+0.001, SBUS_THICKNESS + 0.003], center = true);
color ("yellow")
translate ([-SBUS_WIDTH/2+31,
0.5-MY_FULL_LENGTH/2+23/2,
-0.001+14.5/2-0.5])
cube ([32+0.8, 1+23+0.001, SBUS_THICKNESS + 0.003+14.5-1], center = true);
color ("yellow")
translate ([-SBUS_WIDTH/2+31,
MY_FULL_LENGTH/2-10-2,
0])
cube ([19.2+0.8, 20, 50], center = true);
}
}
screw_hole_r=1.55;
triangle_width=4;
triangle_height=12;
module
fan_25mm_support() {
union() {
// body
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth,carrier_offset,vertical_offset]) {
color("black") cube([fan_carrier_depth, fan_width+fan_extra_height, fan_height+fan_extra_height], center = true);
}
// support
translate([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth+0.5,carrier_offset-2.4,0]) {
color("purple") cube([fan_carrier_depth+5, fan_width+fan_extra_height+8, SBUS_THICKNESS], center = true);
}
// strut between the backplate and the fan carrier
translate ([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth, carrier_offset-1, (SBUS_BACKPLATE_FULLHEIGHT-5)/2-SBUS_THICKNESS/2-SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM]) color ("purple") cube ([fan_carrier_depth/2, 38,SBUS_BACKPLATE_FULLHEIGHT-5 ], center = true);
translate ([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth, carrier_offset-(fan_width+fan_extra_height)/2-triangle_width/2, triangle_height/2-SBUS_THICKNESS/2-SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM+SBUS_BACKPLATE_FULLHEIGHT-5]) rotate([0,90,0]) color("pink") translate([0,0,-fan_carrier_depth/4]) linear_extrude(height=fan_carrier_depth/2) polygon( points=[[triangle_height/2,-triangle_width/2],[-triangle_height/2,triangle_width/2],[triangle_height/2,triangle_width/2]] );
translate ([(SBUS_WIDTH-fan_carrier_depth)/2-fan_depth, carrier_offset+(fan_width+fan_extra_height)/2+triangle_width/2, triangle_height/2-SBUS_THICKNESS/2-SBUS_BACKPLATE_BOTTOM_TO_BOARD_BOTTOM+SBUS_BACKPLATE_FULLHEIGHT-5]) rotate([0,90,0]) color("pink") translate([0,0,-fan_carrier_depth/4]) linear_extrude(height=fan_carrier_depth/2) polygon( points=[[triangle_height/2,-triangle_width/2],[-triangle_height/2,-triangle_width/2],[triangle_height/2,triangle_width/2]] );
}
}
difference() {
primary();
extra_holes();
union() {
difference ()
{
primary ();
union() {
extra_holes ();
}
}
if (add_fan!=0) fan_25mm_support();
if (add_vga!=0) vga_support();
}
if (add_fan!=0) fan_25mm_carveout();
if (add_vga!=0) vga_carveout();
}

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sbus-to-ztex/Backplate.stl
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sbus-to-ztex/For_SeeedStudio.3dshapes/Molex_Mirco_USB_105017-0001.step Normal file
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sbus-to-ztex/For_SeeedStudio.3dshapes/Molex_Mirco_USB_105017-0001.wrl Normal file
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116
sbus-to-ztex/For_SeeedStudio.pretty/PinHeader_1x06_P2.54mm_Horizontal_For_SeeedStudio.kicad_mod Normal file
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(module Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Horizontal (layer F.Cu) (tedit 59FED5CB)
(descr "Through hole angled pin header, 1x06, 2.54mm pitch, 6mm pin length, single row")
(tags "Through hole angled pin header THT 1x06 2.54mm single row")
(fp_text reference J1 (at 4.385 -2.27) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x06_Male (at 4.385 14.97) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 2.77 6.35 -270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 10.55 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.55 14.5) (end 10.55 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 14.5) (end 10.55 14.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1.8) (end -1.8 14.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 -1.27) (end 0 -1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 0) (end -1.27 -1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 13.08) (end 1.44 13.08) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 12.32) (end 1.44 12.32) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 13.08) (end 4.1 13.08) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 12.32) (end 10.1 13.08) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 12.32) (end 10.1 12.32) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 11.43) (end 4.1 11.43) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 10.54) (end 1.44 10.54) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 9.78) (end 1.44 9.78) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 10.54) (end 4.1 10.54) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 9.78) (end 10.1 10.54) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 9.78) (end 10.1 9.78) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 8.89) (end 4.1 8.89) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 8) (end 1.44 8) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 7.24) (end 1.44 7.24) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 8) (end 4.1 8) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 7.24) (end 10.1 8) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 7.24) (end 10.1 7.24) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 6.35) (end 4.1 6.35) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 5.46) (end 1.44 5.46) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 4.7) (end 1.44 4.7) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 5.46) (end 4.1 5.46) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 4.7) (end 10.1 5.46) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 4.7) (end 10.1 4.7) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 3.81) (end 4.1 3.81) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 2.92) (end 1.44 2.92) (layer F.SilkS) (width 0.12))
(fp_line (start 1.042929 2.16) (end 1.44 2.16) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 2.92) (end 4.1 2.92) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 2.16) (end 10.1 2.92) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 2.16) (end 10.1 2.16) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 1.27) (end 4.1 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.11 0.38) (end 1.44 0.38) (layer F.SilkS) (width 0.12))
(fp_line (start 1.11 -0.38) (end 1.44 -0.38) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 0.28) (end 10.1 0.28) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 0.16) (end 10.1 0.16) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 0.04) (end 10.1 0.04) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 -0.08) (end 10.1 -0.08) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 -0.2) (end 10.1 -0.2) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 -0.32) (end 10.1 -0.32) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 0.38) (end 4.1 0.38) (layer F.SilkS) (width 0.12))
(fp_line (start 10.1 -0.38) (end 10.1 0.38) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 -0.38) (end 10.1 -0.38) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 -1.33) (end 1.44 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 4.1 14.03) (end 4.1 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 14.03) (end 4.1 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start 1.44 -1.33) (end 1.44 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start 4.04 13.02) (end 10.04 13.02) (layer F.Fab) (width 0.1))
(fp_line (start 10.04 12.38) (end 10.04 13.02) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 12.38) (end 10.04 12.38) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 13.02) (end 1.5 13.02) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 12.38) (end -0.32 13.02) (layer F.Fab) (width 0.1))
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(fp_line (start 10.04 7.3) (end 10.04 7.94) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 7.3) (end 10.04 7.3) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 7.94) (end 1.5 7.94) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 7.3) (end -0.32 7.94) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 7.3) (end 1.5 7.3) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 5.4) (end 10.04 5.4) (layer F.Fab) (width 0.1))
(fp_line (start 10.04 4.76) (end 10.04 5.4) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 4.76) (end 10.04 4.76) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 5.4) (end 1.5 5.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 4.76) (end -0.32 5.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 4.76) (end 1.5 4.76) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 2.86) (end 10.04 2.86) (layer F.Fab) (width 0.1))
(fp_line (start 10.04 2.22) (end 10.04 2.86) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 2.22) (end 10.04 2.22) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 2.86) (end 1.5 2.86) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 2.22) (end -0.32 2.86) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 2.22) (end 1.5 2.22) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 0.32) (end 10.04 0.32) (layer F.Fab) (width 0.1))
(fp_line (start 10.04 -0.32) (end 10.04 0.32) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 -0.32) (end 10.04 -0.32) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 0.32) (end 1.5 0.32) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 -0.32) (end -0.32 0.32) (layer F.Fab) (width 0.1))
(fp_line (start -0.32 -0.32) (end 1.5 -0.32) (layer F.Fab) (width 0.1))
(fp_line (start 1.5 -0.635) (end 2.135 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.5 13.97) (end 1.5 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 13.97) (end 1.5 13.97) (layer F.Fab) (width 0.1))
(fp_line (start 4.04 -1.27) (end 4.04 13.97) (layer F.Fab) (width 0.1))
(fp_line (start 2.135 -1.27) (end 4.04 -1.27) (layer F.Fab) (width 0.1))
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1.02) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x06_P2.54mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

149
sbus-to-ztex/For_SeeedStudio.pretty/PinHeader_2x07_P2.00mm_Horizontal_For_SeeedStudio.kicad_mod Normal file
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(module Connector_PinHeader_2.00mm:PinHeader_2x07_P2.00mm_Horizontal (layer F.Cu) (tedit 59FED667)
(descr "Through hole angled pin header, 2x07, 2.00mm pitch, 4.2mm pin length, double rows")
(tags "Through hole angled pin header THT 2x07 2.00mm double row")
(fp_text reference J3 (at 4.1 -2) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_02x07_Odd_Even (at 4.1 14) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 4.25 6 90) (layer F.Fab)
(effects (font (size 0.9 0.9) (thickness 0.135)))
)
(fp_line (start 9.7 -1.5) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 9.7 13.5) (end 9.7 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 13.5) (end 9.7 13.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 -1.5) (end -1.5 13.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1 -1) (end 0 -1) (layer F.SilkS) (width 0.12))
(fp_line (start -1 0) (end -1 -1) (layer F.SilkS) (width 0.12))
(fp_line (start 0.882114 12.31) (end 1.117886 12.31) (layer F.SilkS) (width 0.12))
(fp_line (start 0.882114 11.69) (end 1.117886 11.69) (layer F.SilkS) (width 0.12))
(fp_line (start 2.882114 12.31) (end 3.44 12.31) (layer F.SilkS) (width 0.12))
(fp_line (start 2.882114 11.69) (end 3.44 11.69) (layer F.SilkS) (width 0.12))
(fp_line (start 9.26 12.31) (end 5.06 12.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 2.882114 9.69) (end 3.44 9.69) (layer F.SilkS) (width 0.12))
(fp_line (start 9.26 10.31) (end 5.06 10.31) (layer F.SilkS) (width 0.12))
(fp_line (start 9.26 9.69) (end 9.26 10.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 2.882114 1.69) (end 3.44 1.69) (layer F.SilkS) (width 0.12))
(fp_line (start 9.26 2.31) (end 5.06 2.31) (layer F.SilkS) (width 0.12))
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(fp_line (start 5.06 1.69) (end 9.26 1.69) (layer F.SilkS) (width 0.12))
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(fp_line (start 5.06 0.23) (end 9.26 0.23) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 0.11) (end 9.26 0.11) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 -0.01) (end 9.26 -0.01) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 -0.13) (end 9.26 -0.13) (layer F.SilkS) (width 0.12))
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(fp_line (start 9.26 0.31) (end 5.06 0.31) (layer F.SilkS) (width 0.12))
(fp_line (start 9.26 -0.31) (end 9.26 0.31) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 -0.31) (end 9.26 -0.31) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 -1.06) (end 3.44 -1.06) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 13.06) (end 5.06 -1.06) (layer F.SilkS) (width 0.12))
(fp_line (start 3.44 13.06) (end 5.06 13.06) (layer F.SilkS) (width 0.12))
(fp_line (start 3.44 -1.06) (end 3.44 13.06) (layer F.SilkS) (width 0.12))
(fp_line (start 5 12.25) (end 9.2 12.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 11.75) (end 9.2 12.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 11.75) (end 9.2 11.75) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 12.25) (end 3.5 12.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 11.75) (end -0.25 12.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 11.75) (end 3.5 11.75) (layer F.Fab) (width 0.1))
(fp_line (start 5 10.25) (end 9.2 10.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 9.75) (end 9.2 10.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 9.75) (end 9.2 9.75) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 10.25) (end 3.5 10.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 9.75) (end -0.25 10.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 9.75) (end 3.5 9.75) (layer F.Fab) (width 0.1))
(fp_line (start 5 8.25) (end 9.2 8.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 7.75) (end 9.2 8.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 7.75) (end 9.2 7.75) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 8.25) (end 3.5 8.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 7.75) (end -0.25 8.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 7.75) (end 3.5 7.75) (layer F.Fab) (width 0.1))
(fp_line (start 5 6.25) (end 9.2 6.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 5.75) (end 9.2 6.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 5.75) (end 9.2 5.75) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 6.25) (end 3.5 6.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 5.75) (end -0.25 6.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 5.75) (end 3.5 5.75) (layer F.Fab) (width 0.1))
(fp_line (start 5 4.25) (end 9.2 4.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 3.75) (end 9.2 4.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 3.75) (end 9.2 3.75) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 4.25) (end 3.5 4.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 3.75) (end -0.25 4.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 3.75) (end 3.5 3.75) (layer F.Fab) (width 0.1))
(fp_line (start 5 2.25) (end 9.2 2.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 1.75) (end 9.2 2.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 1.75) (end 9.2 1.75) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 2.25) (end 3.5 2.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 1.75) (end -0.25 2.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 1.75) (end 3.5 1.75) (layer F.Fab) (width 0.1))
(fp_line (start 5 0.25) (end 9.2 0.25) (layer F.Fab) (width 0.1))
(fp_line (start 9.2 -0.25) (end 9.2 0.25) (layer F.Fab) (width 0.1))
(fp_line (start 5 -0.25) (end 9.2 -0.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 0.25) (end 3.5 0.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 -0.25) (end -0.25 0.25) (layer F.Fab) (width 0.1))
(fp_line (start -0.25 -0.25) (end 3.5 -0.25) (layer F.Fab) (width 0.1))
(fp_line (start 3.5 -0.625) (end 3.875 -1) (layer F.Fab) (width 0.1))
(fp_line (start 3.5 13) (end 3.5 -0.625) (layer F.Fab) (width 0.1))
(fp_line (start 5 13) (end 3.5 13) (layer F.Fab) (width 0.1))
(fp_line (start 5 -1) (end 5 13) (layer F.Fab) (width 0.1))
(fp_line (start 3.875 -1) (end 5 -1) (layer F.Fab) (width 0.1))
(pad 14 thru_hole oval (at 2 12) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 13 thru_hole oval (at 0 12) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at 2 10) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 10) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 2 8) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 8) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at 2 6) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 6) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at 2 4) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 4) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at 2 2) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 2) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 2 0) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at 0 0) (size 1.35 1.35) (drill 0.9) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.00mm.3dshapes/PinHeader_2x07_P2.00mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

99
sbus-to-ztex/For_SeeedStudio.pretty/PinHeader_2x32_P2.54mm_Vertical_For_SeeedStudio.kicad_mod Normal file
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@@ -0,0 +1,99 @@
(module Connector_PinHeader_2.54mm:PinHeader_2x32_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC)
(descr "Through hole straight pin header, 2x32, 2.54mm pitch, double rows")
(tags "Through hole pin header THT 2x32 2.54mm double row")
(fp_text reference JCD1 (at 1.27 -2.33) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value ZTEX_CD-ztex_CD (at 1.27 81.07) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 1.27 39.37 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 4.35 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.35 80.55) (end 4.35 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 80.55) (end 4.35 80.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1.8) (end -1.8 80.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 -1.33) (end 3.87 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.27 1.27) (end 1.27 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 3.87 -1.33) (end 3.87 80.07) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 80.07) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 80.07) (end 3.87 80.07) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 0) (end 0 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 80.01) (end -1.27 0) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 80.01) (end -1.27 80.01) (layer F.Fab) (width 0.1))
(fp_line (start 3.81 -1.27) (end 3.81 80.01) (layer F.Fab) (width 0.1))
(fp_line (start 0 -1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
(pad 64 thru_hole oval (at 2.54 78.74) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 63 thru_hole oval (at 0 78.74) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 62 thru_hole oval (at 2.54 76.2) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 61 thru_hole oval (at 0 76.2) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 60 thru_hole oval (at 2.54 73.66) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 59 thru_hole oval (at 0 73.66) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 58 thru_hole oval (at 2.54 71.12) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 57 thru_hole oval (at 0 71.12) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 56 thru_hole oval (at 2.54 68.58) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 55 thru_hole oval (at 0 68.58) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 54 thru_hole oval (at 2.54 66.04) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 53 thru_hole oval (at 0 66.04) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 52 thru_hole oval (at 2.54 63.5) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 51 thru_hole oval (at 0 63.5) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 50 thru_hole oval (at 2.54 60.96) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 49 thru_hole oval (at 0 60.96) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 48 thru_hole oval (at 2.54 58.42) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 47 thru_hole oval (at 0 58.42) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 46 thru_hole oval (at 2.54 55.88) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 45 thru_hole oval (at 0 55.88) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 44 thru_hole oval (at 2.54 53.34) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 43 thru_hole oval (at 0 53.34) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 42 thru_hole oval (at 2.54 50.8) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 41 thru_hole oval (at 0 50.8) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 40 thru_hole oval (at 2.54 48.26) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 39 thru_hole oval (at 0 48.26) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 38 thru_hole oval (at 2.54 45.72) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 37 thru_hole oval (at 0 45.72) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 36 thru_hole oval (at 2.54 43.18) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 35 thru_hole oval (at 0 43.18) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 34 thru_hole oval (at 2.54 40.64) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 33 thru_hole oval (at 0 40.64) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 32 thru_hole oval (at 2.54 38.1) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 31 thru_hole oval (at 0 38.1) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 30 thru_hole oval (at 2.54 35.56) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 29 thru_hole oval (at 0 35.56) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 28 thru_hole oval (at 2.54 33.02) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 27 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 26 thru_hole oval (at 2.54 30.48) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 25 thru_hole oval (at 0 30.48) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 24 thru_hole oval (at 2.54 27.94) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 23 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 22 thru_hole oval (at 2.54 25.4) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 21 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 20 thru_hole oval (at 2.54 22.86) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 19 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 18 thru_hole oval (at 2.54 20.32) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 17 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 16 thru_hole oval (at 2.54 17.78) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 15 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 14 thru_hole oval (at 2.54 15.24) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 13 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at 2.54 12.7) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1.14) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x32_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

113
sbus-to-ztex/For_SeeedStudio.pretty/PinSocket_2x06_P2.54mm_Horizontal_For_SeeedStudio.kicad_mod Normal file
View File

@@ -0,0 +1,113 @@
(module Connector_PinSocket_2.54mm:PinSocket_2x06_P2.54mm_Horizontal (layer F.Cu) (tedit 5A19A42C)
(descr "Through hole angled socket strip, 2x06, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated")
(tags "Through hole angled socket strip THT 2x06 2.54mm double row")
(fp_text reference J5 (at -5.65 -2.77) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_02x06_Odd_Even (at -5.65 15.47) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at -8.315 6.35 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.8 14.45) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -13.05 14.45) (end 1.8 14.45) (layer F.CrtYd) (width 0.05))
(fp_line (start -13.05 -1.8) (end -13.05 14.45) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -13.05 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0 -1.33) (end 1.11 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.11 -1.33) (end 1.11 0) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -1.33) (end -12.63 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 14.03) (end -4 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start -4 -1.33) (end -4 14.03) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -1.33) (end -4 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 11.43) (end -4 11.43) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 8.89) (end -4 8.89) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 6.35) (end -4 6.35) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 3.81) (end -4 3.81) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 1.27) (end -4 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 13.06) (end -1.05 13.06) (layer F.SilkS) (width 0.12))
(fp_line (start -4 13.06) (end -3.59 13.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 12.34) (end -1.05 12.34) (layer F.SilkS) (width 0.12))
(fp_line (start -4 12.34) (end -3.59 12.34) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 10.52) (end -1.05 10.52) (layer F.SilkS) (width 0.12))
(fp_line (start -4 10.52) (end -3.59 10.52) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 9.8) (end -1.05 9.8) (layer F.SilkS) (width 0.12))
(fp_line (start -4 9.8) (end -3.59 9.8) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 7.98) (end -1.05 7.98) (layer F.SilkS) (width 0.12))
(fp_line (start -4 7.98) (end -3.59 7.98) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 7.26) (end -1.05 7.26) (layer F.SilkS) (width 0.12))
(fp_line (start -4 7.26) (end -3.59 7.26) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 5.44) (end -1.05 5.44) (layer F.SilkS) (width 0.12))
(fp_line (start -4 5.44) (end -3.59 5.44) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 4.72) (end -1.05 4.72) (layer F.SilkS) (width 0.12))
(fp_line (start -4 4.72) (end -3.59 4.72) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 2.9) (end -1.05 2.9) (layer F.SilkS) (width 0.12))
(fp_line (start -4 2.9) (end -3.59 2.9) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 2.18) (end -1.05 2.18) (layer F.SilkS) (width 0.12))
(fp_line (start -4 2.18) (end -3.59 2.18) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 0.36) (end -1.11 0.36) (layer F.SilkS) (width 0.12))
(fp_line (start -4 0.36) (end -3.59 0.36) (layer F.SilkS) (width 0.12))
(fp_line (start -1.49 -0.36) (end -1.11 -0.36) (layer F.SilkS) (width 0.12))
(fp_line (start -4 -0.36) (end -3.59 -0.36) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 1.1519) (end -4 1.1519) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 1.033805) (end -4 1.033805) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.91571) (end -4 0.91571) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.797615) (end -4 0.797615) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.67952) (end -4 0.67952) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.561425) (end -4 0.561425) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.44333) (end -4 0.44333) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.325235) (end -4 0.325235) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.20714) (end -4 0.20714) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 0.089045) (end -4 0.089045) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.02905) (end -4 -0.02905) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.147145) (end -4 -0.147145) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.26524) (end -4 -0.26524) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.383335) (end -4 -0.383335) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.50143) (end -4 -0.50143) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.619525) (end -4 -0.619525) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.73762) (end -4 -0.73762) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.855715) (end -4 -0.855715) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -0.97381) (end -4 -0.97381) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -1.091905) (end -4 -1.091905) (layer F.SilkS) (width 0.12))
(fp_line (start -12.63 -1.21) (end -4 -1.21) (layer F.SilkS) (width 0.12))
(fp_line (start 0 13) (end 0 12.4) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 13) (end 0 13) (layer F.Fab) (width 0.1))
(fp_line (start 0 12.4) (end -4.06 12.4) (layer F.Fab) (width 0.1))
(fp_line (start 0 10.46) (end 0 9.86) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 10.46) (end 0 10.46) (layer F.Fab) (width 0.1))
(fp_line (start 0 9.86) (end -4.06 9.86) (layer F.Fab) (width 0.1))
(fp_line (start 0 7.92) (end 0 7.32) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 7.92) (end 0 7.92) (layer F.Fab) (width 0.1))
(fp_line (start 0 7.32) (end -4.06 7.32) (layer F.Fab) (width 0.1))
(fp_line (start 0 5.38) (end 0 4.78) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 5.38) (end 0 5.38) (layer F.Fab) (width 0.1))
(fp_line (start 0 4.78) (end -4.06 4.78) (layer F.Fab) (width 0.1))
(fp_line (start 0 2.84) (end 0 2.24) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 2.84) (end 0 2.84) (layer F.Fab) (width 0.1))
(fp_line (start 0 2.24) (end -4.06 2.24) (layer F.Fab) (width 0.1))
(fp_line (start 0 0.3) (end 0 -0.3) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 0.3) (end 0 0.3) (layer F.Fab) (width 0.1))
(fp_line (start 0 -0.3) (end -4.06 -0.3) (layer F.Fab) (width 0.1))
(fp_line (start -12.57 13.97) (end -12.57 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 13.97) (end -12.57 13.97) (layer F.Fab) (width 0.1))
(fp_line (start -4.06 -0.3) (end -4.06 13.97) (layer F.Fab) (width 0.1))
(fp_line (start -5.03 -1.27) (end -4.06 -0.3) (layer F.Fab) (width 0.1))
(fp_line (start -12.57 -1.27) (end -5.03 -1.27) (layer F.Fab) (width 0.1))
(pad 12 thru_hole oval (at -2.54 12.7) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at -2.54 10.16) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at -2.54 7.62) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at -2.54 5.08) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at -2.54 2.54) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at -2.54 0) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1.19) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_2x06_P2.54mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

89
sbus-to-ztex/For_SeeedStudio.pretty/TSSOP-56_6.1x14mm_P0.5mm_For_SeeedStudio.kicad_mod Normal file
View File

@@ -0,0 +1,89 @@
(module Package_SO:TSSOP-56_6.1x14mm_P0.5mm (layer F.Cu) (tedit 5A02F25C)
(descr "TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot364-1_po.pdf)")
(tags "SSOP 0.5")
(attr smd)
(fp_text reference U2 (at 0 -8.05) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SN74CB3T16211DGGR (at 0 8.05) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.05 -7) (end 3.05 -7) (layer F.Fab) (width 0.15))
(fp_line (start 3.05 -7) (end 3.05 7) (layer F.Fab) (width 0.15))
(fp_line (start 3.05 7) (end -3.05 7) (layer F.Fab) (width 0.15))
(fp_line (start -3.05 7) (end -3.05 -6) (layer F.Fab) (width 0.15))
(fp_line (start -3.05 -6) (end -2.05 -7) (layer F.Fab) (width 0.15))
(fp_line (start -4.5 -7.3) (end -4.5 7.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.5 -7.3) (end 4.5 7.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.5 -7.3) (end 4.5 -7.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.5 7.3) (end 4.5 7.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.175 -7.125) (end 3.175 -7.1175) (layer F.SilkS) (width 0.15))
(fp_line (start 3.175 7.125) (end 3.175 7.1175) (layer F.SilkS) (width 0.15))
(fp_line (start -3.175 7.125) (end -3.175 7.1175) (layer F.SilkS) (width 0.15))
(fp_line (start -4.25 -7.2) (end 3.175 -7.2) (layer F.SilkS) (width 0.15))
(fp_line (start -3.175 7.125) (end 3.175 7.125) (layer F.SilkS) (width 0.15))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.8 0.8) (thickness 0.15)))
)
(pad 1 smd rect (at -3.75 -6.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -3.75 -6.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -3.75 -5.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -3.75 -5.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -3.75 -4.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -3.75 -4.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -3.75 -3.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -3.75 -3.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -3.75 -2.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -3.75 -2.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -3.75 -1.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -3.75 -1.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -3.75 -0.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -3.75 -0.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at -3.75 0.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at -3.75 0.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at -3.75 1.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at -3.75 1.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at -3.75 2.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at -3.75 2.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at -3.75 3.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -3.75 3.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -3.75 4.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -3.75 4.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at -3.75 5.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at -3.75 5.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at -3.75 6.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at -3.75 6.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 29 smd rect (at 3.75 6.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 30 smd rect (at 3.75 6.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 31 smd rect (at 3.75 5.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 32 smd rect (at 3.75 5.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at 3.75 4.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 34 smd rect (at 3.75 4.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 35 smd rect (at 3.75 3.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 36 smd rect (at 3.75 3.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 37 smd rect (at 3.75 2.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 38 smd rect (at 3.75 2.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 39 smd rect (at 3.75 1.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 40 smd rect (at 3.75 1.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 41 smd rect (at 3.75 0.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 42 smd rect (at 3.75 0.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 43 smd rect (at 3.75 -0.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 44 smd rect (at 3.75 -0.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 45 smd rect (at 3.75 -1.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 46 smd rect (at 3.75 -1.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 47 smd rect (at 3.75 -2.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 48 smd rect (at 3.75 -2.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 49 smd rect (at 3.75 -3.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 50 smd rect (at 3.75 -3.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 51 smd rect (at 3.75 -4.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 52 smd rect (at 3.75 -4.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 53 smd rect (at 3.75 -5.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 54 smd rect (at 3.75 -5.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 55 smd rect (at 3.75 -6.25) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(pad 56 smd rect (at 3.75 -6.75) (size 1.5 0.285) (layers F.Cu F.Paste F.Mask))
(model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-56_6.1x14mm_P0.5mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

500
sbus-to-ztex/blinkey.sch
View File

@@ -4,7 +4,7 @@ EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 4 5
Sheet 4 6
Title "sbus-to-ztex blinkey stuff"
Date ""
Rev ""
@@ -14,384 +14,166 @@ Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Wire Wire Line
4400 2550 4250 2550
Wire Wire Line
4250 2550 4250 2750
Wire Wire Line
4400 3150 4250 3150
Connection ~ 4250 3150
Wire Wire Line
4400 2950 4250 2950
Connection ~ 4250 2950
Wire Wire Line
4400 2750 4250 2750
Connection ~ 4250 2750
$Comp
L power:GND #PWR0162
U 1 1 58D681C3
P 4250 4100
F 0 "#PWR0162" H 4250 3850 50 0001 C CNN
F 1 "GND" H 4250 3950 50 0000 C CNN
F 2 "" H 4250 4100 50 0000 C CNN
F 3 "" H 4250 4100 50 0000 C CNN
1 4250 4100
L Connector_Generic:Conn_02x06_Odd_Even J5
U 1 1 60D925D5
P 5600 1750
F 0 "J5" H 5650 2167 50 0000 C CNN
F 1 "Conn_02x06_Odd_Even" H 5650 2076 50 0000 C CNN
F 2 "For_SeeedStudio:PinSocket_2x06_P2.54mm_Horizontal_For_SeeedStudio" H 5600 1750 50 0001 C CNN
F 3 "~" H 5600 1750 50 0001 C CNN
F 4 "A2541HWR-2x6P" H 5600 1750 50 0001 C CNN "MPN"
F 5 "https://lcsc.com/product-detail/Pin-Header-Female-Header_Changjiang-Connectors-A2541HWR-2x6P_C239357.html" H 5600 1750 50 0001 C CNN "URL"
1 5600 1750
1 0 0 -1
$EndComp
Wire Wire Line
4700 2550 5100 2550
5400 1550 5900 1550
Wire Wire Line
4700 2750 5100 2750
5900 1550 6200 1550
Connection ~ 5900 1550
Wire Wire Line
4700 2950 5100 2950
5400 1650 5900 1650
Wire Wire Line
4700 3150 5100 3150
Text GLabel 5400 2550 2 60 Input ~ 0
LED0
Text GLabel 5400 2750 2 60 Input ~ 0
LED1
Text GLabel 5400 2950 2 60 Input ~ 0
LED2
Text GLabel 5400 3150 2 60 Input ~ 0
LED3
$Comp
L Device:R R1
U 1 1 591E1845
P 5250 2550
F 0 "R1" V 5330 2550 50 0000 C CNN
F 1 "549" V 5250 2550 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5180 2550 50 0001 C CNN
F 3 "" H 5250 2550 50 0000 C CNN
F 4 "0603WAF5490T5E" V 5250 2550 50 0001 C CNN "MPN"
1 5250 2550
0 1 1 0
$EndComp
$Comp
L Device:R R2
U 1 1 591E199B
P 5250 2750
F 0 "R2" V 5330 2750 50 0000 C CNN
F 1 "549" V 5250 2750 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5180 2750 50 0001 C CNN
F 3 "" H 5250 2750 50 0000 C CNN
F 4 "0603WAF5490T5E" V 5250 2550 50 0001 C CNN "MPN"
1 5250 2750
0 1 1 0
$EndComp
$Comp
L Device:R R3
U 1 1 591E1A9D
P 5250 2950
F 0 "R3" V 5330 2950 50 0000 C CNN
F 1 "549" V 5250 2950 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5180 2950 50 0001 C CNN
F 3 "" H 5250 2950 50 0000 C CNN
F 4 "0603WAF5490T5E" V 5250 2550 50 0001 C CNN "MPN"
1 5250 2950
0 1 1 0
$EndComp
$Comp
L Device:R R4
U 1 1 591E1AA3
P 5250 3150
F 0 "R4" V 5330 3150 50 0000 C CNN
F 1 "549" V 5250 3150 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5180 3150 50 0001 C CNN
F 3 "" H 5250 3150 50 0000 C CNN
F 4 "0603WAF5490T5E" V 5250 2550 50 0001 C CNN "MPN"
1 5250 3150
0 1 1 0
$EndComp
Text Label 4750 2550 0 60 ~ 0
ALED0
Text Label 4750 2750 0 60 ~ 0
ALED1
Text Label 4750 2950 0 60 ~ 0
ALED2
Text Label 4750 3150 0 60 ~ 0
ALED3
$Comp
L Device:LED_ALT D4
U 1 1 5A54DCE5
P 4550 3150
F 0 "D4" H 4550 3250 50 0000 C CNN
F 1 "BLUE" H 4200 3150 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 4550 3150 50 0001 C CNN
F 3 "http://optoelectronics.liteon.com/upload/download/DS-22-99-0226/LTST-C170TBKT.pdf" H 4550 3150 50 0001 C CNN
F 4 "www.liteon.com" H 4550 3150 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170TBKT" H 4550 3150 60 0001 C CNN "MPN"
F 6 "http://optoelectronics.liteon.com/upload/download/ds22-2000-233/ltst-c171tbkt(0630).pdf" H 4550 3150 50 0001 C CNN "Datasheet2"
F 7 "LTST-C171TBKT" H 4550 3150 50 0001 C CNN "MP_N2"
F 8 "https://www.rohm.com/datasheet/SML-M13UT" H 4550 3150 50 0001 C CNN "Datasheet3"
F 9 "SMLMN2BCTT86C" H 4550 3150 50 0001 C CNN "MP_N3"
F 10 "859-LTST-C170TBKT" H 4550 3150 60 0001 C CNN "Mouser"
F 11 "593-LSM0805463V" H 4550 3150 50 0001 C CNN "Mouse_r1"
F 12 "755-SMLMN2BCTT86C" H 4550 3150 50 0001 C CNN "Mouse_r2"
F 13 "859-LTST-C171TBKT" H 4550 3150 50 0001 C CNN "Mouse_r3"
F 14 "160-1579-1-ND" H 4550 3150 50 0001 C CNN "Digikey"
F 15 "C375453" H 4550 3150 50 0001 C CNN "LCSC"
F 16 "0.02930$" H 4550 3150 50 0001 C CNN "price300_LCSC"
F 17 "LTST-C170KRKT" H 4550 3150 50 0001 C CNN "LowCost"
F 18 "FV004" H 4550 3150 50 0001 C CNN "Koncar"
F 19 "T" H 4550 3150 50 0001 C CNN "Side"
1 4550 3150
1 0 0 -1
$EndComp
$Comp
L Device:LED_ALT D3
U 1 1 5A54DCEF
P 4550 2950
F 0 "D3" H 4550 3050 50 0000 C CNN
F 1 "GREEN" H 4200 2950 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 4550 2950 50 0001 C CNN
F 3 "http://optoelectronics.liteon.com/upload/download/DS22-2000-073/LTST-C170KGKT.pdf" H 4550 2950 50 0001 C CNN
F 4 "www.liteon.com" H 4550 2950 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170TGKT " H 4550 2950 50 0001 C CNN "MPN"
F 6 "859-LTST-C170TGKT" H 4550 2950 50 0001 C CNN "Mouser"
F 7 "160-1887-1-ND" H 4550 2950 50 0001 C CNN "Digikey"
F 8 "C364562" H 4550 2950 50 0001 C CNN "LCSC"
F 9 "LTST-C170TGKT" H 4550 2950 50 0001 C CNN "TME"
F 10 "0.0789$" H 4550 2950 50 0001 C CNN "price300_TME"
F 11 "LTST-C170KRKT" H 4550 2950 50 0001 C CNN "LowCost"
F 12 "FV005" H 4550 2950 50 0001 C CNN "Koncar"
F 13 "T" H 4550 2950 50 0001 C CNN "Side"
1 4550 2950
1 0 0 -1
$EndComp
$Comp
L Device:LED_ALT D1
U 1 1 5A54DCF9
P 4550 2550
F 0 "D1" H 4550 2650 50 0000 C CNN
F 1 "RED" H 4200 2550 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 4550 2550 50 0001 C CNN
F 3 "https://optoelectronics.liteon.com/upload/download/DS-22-99-0150/LTST-C170KRKT.pdf" H 4550 2550 50 0001 C CNN
F 4 "www.liteon.com" H 4550 2550 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170KRKT" H 4550 2550 60 0001 C CNN "MPN"
F 6 "859-LTST-C170KRKT" H 4550 2550 60 0001 C CNN "Mouser"
F 7 "743-IN-S85ATR" H 4550 2550 50 0001 C CNN "Mouse_r2"
F 8 "160-1415-1-ND" H 4550 2550 50 0001 C CNN "Digikey"
F 9 "C94868" H 4550 2550 50 0001 C CNN "LCSC"
F 10 "0.0195$" H 4550 2550 50 0001 C CNN "price400_LCSC"
F 11 "FV007" H 4550 2550 50 0001 C CNN "Koncar"
F 12 "TB" H 4550 2550 50 0001 C CNN "Side"
1 4550 2550
1 0 0 -1
$EndComp
$Comp
L Device:LED_ALT D2
U 1 1 5A54DD03
P 4550 2750
F 0 "D2" H 4550 2850 50 0000 C CNN
F 1 "ORANGE" H 4200 2750 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 4550 2750 50 0001 C CNN
F 3 "https://optoelectronics.liteon.com/upload/download/DS-22-99-0185/LTST-C170KFKT.pdf" H 4550 2750 50 0001 C CNN
F 4 "www.liteon.com" H 4550 2750 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170KFKT" H 4550 2750 60 0001 C CNN "MPN"
F 6 "859-LTST-C170KFKT" H 4550 2750 60 0001 C CNN "Mouser"
F 7 "160-1413-1-ND" H 4550 2750 50 0001 C CNN "Digikey"
F 8 "C284931" H 4550 2750 50 0001 C CNN "LCSC"
F 9 "0.02075$" H 4550 2750 50 0001 C CNN "price200_LCSC"
F 10 "LTST-C170KRKT" H 4550 2750 50 0001 C CNN "LowCost"
F 11 "FV006" H 4550 2750 50 0001 C CNN "Koncar"
F 12 "T" H 4550 2750 50 0001 C CNN "Side"
1 4550 2750
1 0 0 -1
$EndComp
Wire Wire Line
4250 2950 4250 3150
Wire Wire Line
4250 2750 4250 2950
Wire Wire Line
4250 3150 4250 4100
Wire Wire Line
6300 2550 6150 2550
Wire Wire Line
6150 2550 6150 2750
Wire Wire Line
6300 3150 6150 3150
Connection ~ 6150 3150
Wire Wire Line
6300 2950 6150 2950
Connection ~ 6150 2950
Wire Wire Line
6300 2750 6150 2750
Connection ~ 6150 2750
5900 1650 6400 1650
Connection ~ 5900 1650
$Comp
L power:GND #PWR0116
U 1 1 5F81E075
P 6150 4100
F 0 "#PWR0116" H 6150 3850 50 0001 C CNN
F 1 "GND" H 6150 3950 50 0000 C CNN
F 2 "" H 6150 4100 50 0000 C CNN
F 3 "" H 6150 4100 50 0000 C CNN
1 6150 4100
U 1 1 60D93843
P 6400 1650
F 0 "#PWR0116" H 6400 1400 50 0001 C CNN
F 1 "GND" H 6405 1477 50 0000 C CNN
F 2 "" H 6400 1650 50 0001 C CNN
F 3 "" H 6400 1650 50 0001 C CNN
1 6400 1650
1 0 0 -1
$EndComp
Wire Wire Line
6600 2550 7000 2550
Wire Wire Line
6600 2750 7000 2750
Wire Wire Line
6600 2950 7000 2950
Wire Wire Line
6600 3150 7000 3150
Text GLabel 7300 2550 2 60 Input ~ 0
LED4
Text GLabel 7300 2750 2 60 Input ~ 0
LED5
Text GLabel 7300 2950 2 60 Input ~ 0
LED6
Text GLabel 7300 3150 2 60 Input ~ 0
LED7
$Comp
L Device:R R5
U 1 1 5F81E084
P 7150 2550
F 0 "R5" V 7230 2550 50 0000 C CNN
F 1 "549" V 7150 2550 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7080 2550 50 0001 C CNN
F 3 "" H 7150 2550 50 0000 C CNN
F 4 "0603WAF5490T5E" V 7150 2550 50 0001 C CNN "MPN"
1 7150 2550
L power:+3V3 #PWR0120
U 1 1 60D938E0
P 6200 1550
F 0 "#PWR0120" H 6200 1400 50 0001 C CNN
F 1 "+3V3" H 6215 1723 50 0000 C CNN
F 2 "" H 6200 1550 50 0001 C CNN
F 3 "" H 6200 1550 50 0001 C CNN
1 6200 1550
1 0 0 -1
$EndComp
Text GLabel 5900 2050 2 50 Input ~ 0
PMOD-12
Text GLabel 5400 1750 0 50 Input ~ 0
PMOD-5
Text GLabel 5900 1750 2 50 Input ~ 0
PMOD-6
Text GLabel 5400 1850 0 50 Input ~ 0
PMOD-7
Text GLabel 5900 1850 2 50 Input ~ 0
PMOD-8
Text GLabel 5400 1950 0 50 Input ~ 0
PMOD-9
Text GLabel 5900 1950 2 50 Input ~ 0
PMOD-10
Text GLabel 5400 2050 0 50 Input ~ 0
PMOD-11
$Comp
L Connector:Conn_01x03_Male J6
U 1 1 60E1E49E
P 4400 4750
F 0 "J6" H 4506 5028 50 0000 C CNN
F 1 "Conn_01x03_Male" H 4506 4937 50 0000 C CNN
F 2 "Connector_Molex:Molex_KK-254_AE-6410-03A_1x03_P2.54mm_Vertical" H 4400 4750 50 0001 C CNN
F 3 "~" H 4400 4750 50 0001 C CNN
F 4 "22-27-2031" H 4400 4750 50 0001 C CNN "MPN-ALT"
F 5 "Molex" H 4400 4750 50 0001 C CNN "Manufacturer-ALT"
F 6 "https://www.mouser.fr/ProductDetail/Molex/22-27-2031?qs=%2Fha2pyFadugXOaGYK9vaczm7nZ04txhJn3OGcnGWT3U=" H 4400 4750 50 0001 C CNN "URL-ALT"
F 7 "640456-3" H 4400 4750 50 0001 C CNN "MPN"
F 8 "TE Connectivity" H 4400 4750 50 0001 C CNN "Manufacturer"
1 4400 4750
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0136
U 1 1 60E1EC2C
P 4600 4650
F 0 "#PWR0136" H 4600 4400 50 0001 C CNN
F 1 "GND" V 4605 4522 50 0000 R CNN
F 2 "" H 4600 4650 50 0001 C CNN
F 3 "" H 4600 4650 50 0001 C CNN
1 4600 4650
0 -1 -1 0
$EndComp
$Comp
L power:+5V #PWR0137
U 1 1 60E1ED6C
P 4600 4750
F 0 "#PWR0137" H 4600 4600 50 0001 C CNN
F 1 "+5V" V 4615 4878 50 0000 L CNN
F 2 "" H 4600 4750 50 0001 C CNN
F 3 "" H 4600 4750 50 0001 C CNN
1 4600 4750
0 1 1 0
$EndComp
$Comp
L Device:R R6
U 1 1 5F81E08C
P 7150 2750
F 0 "R6" V 7230 2750 50 0000 C CNN
F 1 "549" V 7150 2750 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7080 2750 50 0001 C CNN
F 3 "" H 7150 2750 50 0000 C CNN
F 4 "0603WAF5490T5E" V 7150 2550 50 0001 C CNN "MPN"
1 7150 2750
0 1 1 0
L power:GND #PWR0138
U 1 1 60E1FA97
P 4600 4850
F 0 "#PWR0138" H 4600 4600 50 0001 C CNN
F 1 "GND" V 4605 4722 50 0000 R CNN
F 2 "" H 4600 4850 50 0001 C CNN
F 3 "" H 4600 4850 50 0001 C CNN
1 4600 4850
0 -1 -1 0
$EndComp
$Comp
L Device:R R7
U 1 1 5F81E094
P 7150 2950
F 0 "R7" V 7230 2950 50 0000 C CNN
F 1 "549" V 7150 2950 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7080 2950 50 0001 C CNN
F 3 "" H 7150 2950 50 0000 C CNN
F 4 "0603WAF5490T5E" V 7150 2550 50 0001 C CNN "MPN"
1 7150 2950
0 1 1 0
$EndComp
$Comp
L Device:R R8
U 1 1 5F81E09C
P 7150 3150
F 0 "R8" V 7230 3150 50 0000 C CNN
F 1 "549" V 7150 3150 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7080 3150 50 0001 C CNN
F 3 "" H 7150 3150 50 0000 C CNN
F 4 "0603WAF5490T5E" V 7150 2550 50 0001 C CNN "MPN"
1 7150 3150
0 1 1 0
$EndComp
Text Label 6650 2550 0 60 ~ 0
ALED4
Text Label 6650 2750 0 60 ~ 0
ALED5
Text Label 6650 2950 0 60 ~ 0
ALED6
Text Label 6650 3150 0 60 ~ 0
ALED7
$Comp
L Device:LED_ALT D8
U 1 1 5F81E0B7
P 6450 3150
F 0 "D8" H 6450 3250 50 0000 C CNN
F 1 "BLUE" H 6100 3150 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 6450 3150 50 0001 C CNN
F 3 "http://optoelectronics.liteon.com/upload/download/DS-22-99-0226/LTST-C170TBKT.pdf" H 6450 3150 50 0001 C CNN
F 4 "www.liteon.com" H 6450 3150 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170TBKT" H 6450 3150 60 0001 C CNN "MPN"
F 6 "http://optoelectronics.liteon.com/upload/download/ds22-2000-233/ltst-c171tbkt(0630).pdf" H 6450 3150 50 0001 C CNN "Datasheet2"
F 7 "LTST-C171TBKT" H 6450 3150 50 0001 C CNN "MP_N2"
F 8 "https://www.rohm.com/datasheet/SML-M13UT" H 6450 3150 50 0001 C CNN "Datasheet3"
F 9 "SMLMN2BCTT86C" H 6450 3150 50 0001 C CNN "MP_N3"
F 10 "859-LTST-C170TBKT" H 6450 3150 60 0001 C CNN "Mouser"
F 11 "593-LSM0805463V" H 6450 3150 50 0001 C CNN "Mouse_r1"
F 12 "755-SMLMN2BCTT86C" H 6450 3150 50 0001 C CNN "Mouse_r2"
F 13 "859-LTST-C171TBKT" H 6450 3150 50 0001 C CNN "Mouse_r3"
F 14 "160-1579-1-ND" H 6450 3150 50 0001 C CNN "Digikey"
F 15 "C375453" H 6450 3150 50 0001 C CNN "LCSC"
F 16 "0.02930$" H 6450 3150 50 0001 C CNN "price300_LCSC"
F 17 "LTST-C170KRKT" H 6450 3150 50 0001 C CNN "LowCost"
F 18 "FV004" H 6450 3150 50 0001 C CNN "Koncar"
F 19 "T" H 6450 3150 50 0001 C CNN "Side"
1 6450 3150
1 0 0 -1
$EndComp
$Comp
L Device:LED_ALT D7
U 1 1 5F81E0C8
P 6450 2950
F 0 "D7" H 6450 3050 50 0000 C CNN
F 1 "GREEN" H 6100 2950 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 6450 2950 50 0001 C CNN
F 3 "http://optoelectronics.liteon.com/upload/download/DS22-2000-073/LTST-C170KGKT.pdf" H 6450 2950 50 0001 C CNN
F 4 "www.liteon.com" H 6450 2950 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170TGKT " H 6450 2950 50 0001 C CNN "MPN"
F 6 "859-LTST-C170TGKT" H 6450 2950 50 0001 C CNN "Mouser"
F 7 "160-1887-1-ND" H 6450 2950 50 0001 C CNN "Digikey"
F 8 "C364562" H 6450 2950 50 0001 C CNN "LCSC"
F 9 "LTST-C170TGKT" H 6450 2950 50 0001 C CNN "TME"
F 10 "0.0789$" H 6450 2950 50 0001 C CNN "price300_TME"
F 11 "LTST-C170KRKT" H 6450 2950 50 0001 C CNN "LowCost"
F 12 "FV005" H 6450 2950 50 0001 C CNN "Koncar"
F 13 "T" H 6450 2950 50 0001 C CNN "Side"
1 6450 2950
1 0 0 -1
$EndComp
$Comp
L Device:LED_ALT D5
U 1 1 5F81E0D8
P 6450 2550
F 0 "D5" H 6450 2650 50 0000 C CNN
F 1 "RED" H 6100 2550 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 6450 2550 50 0001 C CNN
F 3 "https://optoelectronics.liteon.com/upload/download/DS-22-99-0150/LTST-C170KRKT.pdf" H 6450 2550 50 0001 C CNN
F 4 "www.liteon.com" H 6450 2550 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170KRKT" H 6450 2550 60 0001 C CNN "MPN"
F 6 "859-LTST-C170KRKT" H 6450 2550 60 0001 C CNN "Mouser"
F 7 "743-IN-S85ATR" H 6450 2550 50 0001 C CNN "Mouse_r2"
F 8 "160-1415-1-ND" H 6450 2550 50 0001 C CNN "Digikey"
F 9 "C94868" H 6450 2550 50 0001 C CNN "LCSC"
F 10 "0.0195$" H 6450 2550 50 0001 C CNN "price400_LCSC"
F 11 "FV007" H 6450 2550 50 0001 C CNN "Koncar"
F 12 "TB" H 6450 2550 50 0001 C CNN "Side"
1 6450 2550
1 0 0 -1
$EndComp
$Comp
L Device:LED_ALT D6
U 1 1 5F81E0E8
P 6450 2750
F 0 "D6" H 6450 2850 50 0000 C CNN
F 1 "ORANGE" H 6100 2750 50 0000 R CNN
F 2 "LED_SMD:LED_0805_2012Metric" H 6450 2750 50 0001 C CNN
F 3 "https://optoelectronics.liteon.com/upload/download/DS-22-99-0185/LTST-C170KFKT.pdf" H 6450 2750 50 0001 C CNN
F 4 "www.liteon.com" H 6450 2750 60 0001 C CNN "MNF1_URL"
F 5 "LTST-C170KFKT" H 6450 2750 60 0001 C CNN "MPN"
F 6 "859-LTST-C170KFKT" H 6450 2750 60 0001 C CNN "Mouser"
F 7 "160-1413-1-ND" H 6450 2750 50 0001 C CNN "Digikey"
F 8 "C284931" H 6450 2750 50 0001 C CNN "LCSC"
F 9 "0.02075$" H 6450 2750 50 0001 C CNN "price200_LCSC"
F 10 "LTST-C170KRKT" H 6450 2750 50 0001 C CNN "LowCost"
F 11 "FV006" H 6450 2750 50 0001 C CNN "Koncar"
F 12 "T" H 6450 2750 50 0001 C CNN "Side"
1 6450 2750
L Device:C C?
U 1 1 60E24715
P 5150 4800
AR Path="/5F69F4EF/60E24715" Ref="C?" Part="1"
AR Path="/5F6B165A/60E24715" Ref="C6" Part="1"
F 0 "C6" H 5175 4900 50 0000 L CNN
F 1 "47uF" H 5175 4700 50 0000 L CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 5188 4650 50 0001 C CNN
F 3 "" H 5150 4800 50 0000 C CNN
F 4 "GRM21BR60J476ME15L" H 5150 4800 50 0001 C CNN "MPN"
1 5150 4800
1 0 0 -1
$EndComp
Wire Wire Line
6150 2950 6150 3150
4600 4750 5150 4750
Wire Wire Line
6150 2750 6150 2950
5150 4750 5150 4650
Connection ~ 4600 4750
Wire Wire Line
6150 3150 6150 4100
4600 4850 5150 4850
Wire Wire Line
5150 4850 5150 4950
Connection ~ 4600 4850
$Comp
L Device:C C?
U 1 1 612C3C5C
P 6400 1500
AR Path="/5F679B53/612C3C5C" Ref="C?" Part="1"
AR Path="/5F6B165A/612C3C5C" Ref="C9" Part="1"
F 0 "C9" H 6425 1600 50 0000 L CNN
F 1 "100nF" H 6425 1400 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 6438 1350 50 0001 C CNN
F 3 "" H 6400 1500 50 0000 C CNN
F 4 "www.yageo.com" H 6400 1500 50 0001 C CNN "MNF1_URL"
F 5 "CC0603KRX7R8BB104" H 6400 1500 50 0001 C CNN "MPN"
F 6 "603-CC603KRX7R8BB104" H 6400 1500 50 0001 C CNN "Mouser"
F 7 "?" H 6400 1500 50 0001 C CNN "Digikey"
F 8 "?" H 6400 1500 50 0001 C CNN "LCSC"
F 9 "?" H 6400 1500 50 0001 C CNN "Koncar"
F 10 "TB" H 6400 1500 50 0001 C CNN "Side"
1 6400 1500
1 0 0 -1
$EndComp
Connection ~ 6400 1650
Wire Wire Line
6200 1550 6300 1550
Wire Wire Line
6300 1550 6300 1350
Wire Wire Line
6300 1350 6400 1350
Connection ~ 6200 1550
$EndSCHEMATC

1
sbus-to-ztex/fp-lib-table
View File

@@ -6,4 +6,5 @@
(lib (name XilinxJtag)(type KiCad)(uri ${KIPRJMOD}/XilinxJtag.pretty)(options "")(descr ""))
(lib (name Molex2x32)(type KiCad)(uri ${KIPRJMOD}/Molex2x32.pretty)(options "")(descr ""))
(lib (name 74CB3T16211)(type KiCad)(uri ${KIPRJMOD}/74CB3T16211.pretty)(options "")(descr ""))
(lib (name For_SeeedStudio)(type KiCad)(uri ${KIPRJMOD}/For_SeeedStudio.pretty)(options "")(descr ""))
)

22
sbus-to-ztex/kicad_bom_seeedstudio.py
View File

@@ -1,6 +1,7 @@
#!/usr/bin/env python3
import csv
import sys
import os
import xml.etree.ElementTree as ET
### Natural key sorting for orders like : C1, C5, C10, C12 ... (instead of C1, C10, C12, C5...)
@@ -28,6 +29,7 @@ def parse_kicad_xml(input_file):
components = {}
parts = {}
missing = []
urls = {}
tree = ET.parse(input_file)
root = tree.getroot()
@@ -35,13 +37,15 @@ def parse_kicad_xml(input_file):
name = f.attrib['ref']
info = {}
fields = f.find('fields')
opl, mpn = None, None
opl, mpn, url = None, None, ''
if fields is not None:
for x in fields:
if x.attrib['name'].upper() == 'SKU':
opl = x.text
elif x.attrib['name'].upper() == 'MPN':
mpn = x.text
elif x.attrib['name'].upper() == 'URL':
url = x.text
if opl:
components[name] = opl
elif mpn:
@@ -49,17 +53,18 @@ def parse_kicad_xml(input_file):
else:
missing += [name]
continue
urls[components[name]] = url
if components[name] not in parts:
parts[components[name]] = []
parts[components[name]] += [name]
return components, missing
return components, urls, missing
def write_bom_seeed(output_file_slug, components):
def write_bom_seeed(output_file_slug, components, urls):
"""Write the BOM according to the Seeed Studio Fusion PCBA template available at:
https://statics3.seeedstudio.com/assets/file/fusion/bom_template_2016-08-18.csv
```
Part/Designator,Manufacture Part Number/Seeed SKU,Quantity
Part/Designator,Manufacture Part Number/Seeed SKU,Quantity,URL
C1,RHA,1
"D1,D2",CC0603KRX7R9BB102,2
```
@@ -72,7 +77,7 @@ def write_bom_seeed(output_file_slug, components):
parts[components[c]] = []
parts[components[c]] += [c]
field_names = ['Part/Designator', 'Manufacture Part Number/Seeed SKU', 'Quantity']
field_names = ['Part/Designator', 'Manufacture Part Number/Seeed SKU', 'Quantity', 'URL']
with open("{}.csv".format(output_file_slug), 'w') as csvfile:
bomwriter = csv.DictWriter(csvfile, fieldnames=field_names, delimiter=',',
quotechar='"', quoting=csv.QUOTE_MINIMAL)
@@ -82,15 +87,16 @@ def write_bom_seeed(output_file_slug, components):
designators = ",".join(pieces)
bomwriter.writerow({'Part/Designator': designators,
'Manufacture Part Number/Seeed SKU': p,
'Quantity': len(pieces)})
'Quantity': len(pieces),
'URL': urls[p]})
if __name__ == "__main__":
input_file = sys.argv[1]
output_file = sys.argv[2]
components, missing = parse_kicad_xml(input_file)
write_bom_seeed(output_file, components)
components, urls, missing = parse_kicad_xml(input_file)
write_bom_seeed(output_file, components, urls)
if len(missing) > 0:
print("** Warning **: there were parts with missing SKU/MFP")
print(missing)

62
sbus-to-ztex/sbus-to-ztex-cache.lib
View File

@@ -53,6 +53,29 @@ X ~ 4 250 0 150 L 40 40 2 1 C
ENDDRAW
ENDDEF
#
# Connector_Conn_01x03_Male
#
DEF Connector_Conn_01x03_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Connector_Conn_01x03_Male" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x06_Male
#
DEF Connector_Conn_01x06_Male J 0 40 Y N 1 F N
@@ -85,6 +108,45 @@ X Pin_6 6 200 -300 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x06_Odd_Even
#
DEF Connector_Generic_Conn_02x06_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 300 50 H V C CNN
F1 "Connector_Generic_Conn_02x06_Odd_Even" 50 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 150 -350 1 1 10 f
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_10 10 300 -200 150 L 50 50 1 1 P
X Pin_11 11 -200 -300 150 R 50 50 1 1 P
X Pin_12 12 300 -300 150 L 50 50 1 1 P
X Pin_2 2 300 200 150 L 50 50 1 1 P
X Pin_3 3 -200 100 150 R 50 50 1 1 P
X Pin_4 4 300 100 150 L 50 50 1 1 P
X Pin_5 5 -200 0 150 R 50 50 1 1 P
X Pin_6 6 300 0 150 L 50 50 1 1 P
X Pin_7 7 -200 -100 150 R 50 50 1 1 P
X Pin_8 8 300 -100 150 L 50 50 1 1 P
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x07_Odd_Even
#
DEF Connector_Generic_Conn_02x07_Odd_Even J 0 40 Y N 1 F N

20
sbus-to-ztex/sbus-to-ztex-drl.rpt
View File

@@ -1,5 +1,5 @@
Drill report for /home/dolbeau/SPARC/sbus-to-ztex/sbus-to-ztex.kicad_pcb
Created on Tue Oct 20 11:56:24 2020
Drill report for /home/dolbeau/SPARC/SBusFPGA/sbus-to-ztex/sbus-to-ztex.kicad_pcb
Created on Sat Aug 28 17:43:25 2021
Copper Layer Stackup:
=============================================================
@@ -12,13 +12,17 @@ Copper Layer Stackup:
Drill file 'sbus-to-ztex-PTH.drl' contains
plated through holes:
=============================================================
T1 0.40mm 0.016" (105 holes)
T2 0.80mm 0.031" (96 holes)
T3 0.90mm 0.035" (14 holes)
T4 1.00mm 0.039" (6 holes)
T5 1.14mm 0.045" (128 holes)
T1 0.40mm 0.016" (122 holes)
T2 0.60mm 0.024" (2 holes) (with 2 slots)
T3 0.80mm 0.031" (96 holes)
T4 0.85mm 0.033" (2 holes)
T5 0.90mm 0.035" (14 holes)
T6 1.02mm 0.040" (6 holes)
T7 1.14mm 0.045" (128 holes)
T8 1.19mm 0.047" (12 holes)
T9 1.20mm 0.047" (3 holes)
Total plated holes count 349
Total plated holes count 385
Drill file 'sbus-to-ztex-NPTH.drl' contains

33
sbus-to-ztex/sbus-to-ztex.csv
View File

@@ -1,18 +1,23 @@
Part/Designator,Manufacture Part Number/Seeed SKU,Quantity,Link
"R13,R30,R31",0603WAF1002T5E,3,
"R1,R2,R3,R4,R5,R6,R7,R8,ROE1,ROE2",0603WAF5490T5E,10,
Part/Designator,Manufacture Part Number/Seeed SKU,Quantity,URL
"R1,R2,R5,R6,R13,R18,R19,R30,R31",0603WAF1002T5E,9,
"R14,R15",0603WAF1502T5E,2,
"R9,R10",0603WAF270JT5E,2,
ROE1,0603WAF5490T5E,1,
"JAB1,JCD1",10-89-7642,2,https://www2.mouser.com/ProductDetail/Molex/10-89-7642?qs=%2Fha2pyFadugCxzQFZUdvioDcljDVidgd4vXrOFuSRYM%3D
J1,22-28-4060,1,
J4,1050170001,1,https://eu.mouser.com/ProductDetail/Molex/105017-0001?qs=hlXxxvYE36k7QcsR97GUKA%3D%3D
J2,47219-2001,1,
R9,73L2R47J,1,
J3,878331420,1,https://www2.mouser.com/ProductDetail/Molex/87833-1420?qs=%2Fha2pyFadujGiWVRSsn%2FzLJR0v9GZ2d8kzXwWzjUyNo%3D
"C10,C11,C12,C13,C31",CC0603KRX7R8BB104,5,
C1,CC0805ZKY5V5BB226,1,https://www2.mouser.com/ProductDetail/Yageo/CC0805ZKY5V5BB226?qs=%2Fha2pyFadujSah99nYU8AEGcHD5eocuzBm7zVC89dT8WHBmbIOj4BA%3D%3D
J6,640456-3,1,
J3,87833-1420,1,https://www2.mouser.com/ProductDetail/Molex/87833-1420?qs=%2Fha2pyFadujYFYCIYI1IvFCvLi7no9WQYzIL%2FpYxKhg%3D
J5,A2541HWR-2x6P,1,https://lcsc.com/product-detail/Pin-Header-Female-Header_Changjiang-Connectors-A2541HWR-2x6P_C239357.html
"C2,C4,C5,C7,C8,C9,C10,C11,C12,C13,C14,C31",CC0603KRX7R8BB104,12,
SBus1,FCN-234P096-G/Y,1,https://www2.mouser.com/ProductDetail/Fujitsu/FCN-234P096-G-Y?qs=%2Fha2pyFadugZ9WCm2lJ8CZdXc85UARoDXS81raJopvR1w4UDuaXlcQ%3D%3D
"D2,D6",LTST-C170KFKT,2,
"D1,D5,DOE1,DOE2",LTST-C170KRKT,4,
"D4,D8",LTST-C170TBKT,2,
"D3,D7",LTST-C170TGKT ,2,
"U1,U2,U3",SN74CB3T16211DGGR,3,
"C1,C6",GRM21BR60J476ME15L,2,
C3,GRM31CR60J157ME11L,1,
DOE1,LTST-C170KRKT,1,
FB1,PZ2012U221-2R0TF,1,
J1,PZ254R-11-06P,1,https://lcsc.com/product-detail/Pin-Header-Female-Header_XFCN-PZ254R-11-06P_C492414.html
U5,SN65220DBVR,1,
"U1,U2,U3",SN74CB3T16211DGGR,3,https://lcsc.com/product-detail/Signal-Switches-Encoders-Decoders-Multiplexers_Texas-Instruments-SN74CB3T16211DGGR_C2653275.html
U4,SN74CB3T3125PW,1,
U_INT1,SN74LVC2G07DBVR,1,
"U_INT1,U_INT2,U_INT3",SN74LVC2G07DBVR,3,
U7,TPS2051CDBVR,1,https://www.mouser.fr/ProductDetail/Texas-Instruments/TPS2051CDBVR?qs=PF3AD18CSE5vi2HeWLJCmw%3D%3D
1 Part/Designator Manufacture Part Number/Seeed SKU Quantity Link URL
2 R13,R30,R31 R1,R2,R5,R6,R13,R18,R19,R30,R31 0603WAF1002T5E 3 9
3 R1,R2,R3,R4,R5,R6,R7,R8,ROE1,ROE2 R14,R15 0603WAF5490T5E 0603WAF1502T5E 10 2
4 R9,R10 0603WAF270JT5E 2
5 ROE1 0603WAF5490T5E 1
6 JAB1,JCD1 10-89-7642 2 https://www2.mouser.com/ProductDetail/Molex/10-89-7642?qs=%2Fha2pyFadugCxzQFZUdvioDcljDVidgd4vXrOFuSRYM%3D https://www2.mouser.com/ProductDetail/Molex/10-89-7642?qs=%2Fha2pyFadugCxzQFZUdvioDcljDVidgd4vXrOFuSRYM%3D
7 J1 J4 22-28-4060 1050170001 1 https://eu.mouser.com/ProductDetail/Molex/105017-0001?qs=hlXxxvYE36k7QcsR97GUKA%3D%3D
8 J2 47219-2001 1
9 R9 J6 73L2R47J 640456-3 1
10 J3 878331420 87833-1420 1 https://www2.mouser.com/ProductDetail/Molex/87833-1420?qs=%2Fha2pyFadujGiWVRSsn%2FzLJR0v9GZ2d8kzXwWzjUyNo%3D https://www2.mouser.com/ProductDetail/Molex/87833-1420?qs=%2Fha2pyFadujYFYCIYI1IvFCvLi7no9WQYzIL%2FpYxKhg%3D
11 C10,C11,C12,C13,C31 J5 CC0603KRX7R8BB104 A2541HWR-2x6P 5 1 https://lcsc.com/product-detail/Pin-Header-Female-Header_Changjiang-Connectors-A2541HWR-2x6P_C239357.html
12 C1 C2,C4,C5,C7,C8,C9,C10,C11,C12,C13,C14,C31 CC0805ZKY5V5BB226 CC0603KRX7R8BB104 1 12 https://www2.mouser.com/ProductDetail/Yageo/CC0805ZKY5V5BB226?qs=%2Fha2pyFadujSah99nYU8AEGcHD5eocuzBm7zVC89dT8WHBmbIOj4BA%3D%3D
13 SBus1 FCN-234P096-G/Y 1 https://www2.mouser.com/ProductDetail/Fujitsu/FCN-234P096-G-Y?qs=%2Fha2pyFadugZ9WCm2lJ8CZdXc85UARoDXS81raJopvR1w4UDuaXlcQ%3D%3D https://www2.mouser.com/ProductDetail/Fujitsu/FCN-234P096-G-Y?qs=%2Fha2pyFadugZ9WCm2lJ8CZdXc85UARoDXS81raJopvR1w4UDuaXlcQ%3D%3D
14 D2,D6 C1,C6 LTST-C170KFKT GRM21BR60J476ME15L 2
15 D1,D5,DOE1,DOE2 C3 LTST-C170KRKT GRM31CR60J157ME11L 4 1
16 D4,D8 DOE1 LTST-C170TBKT LTST-C170KRKT 2 1
17 D3,D7 FB1 LTST-C170TGKT PZ2012U221-2R0TF 2 1
18 U1,U2,U3 J1 SN74CB3T16211DGGR PZ254R-11-06P 3 1 https://lcsc.com/product-detail/Pin-Header-Female-Header_XFCN-PZ254R-11-06P_C492414.html
19 U5 SN65220DBVR 1
20 U1,U2,U3 SN74CB3T16211DGGR 3 https://lcsc.com/product-detail/Signal-Switches-Encoders-Decoders-Multiplexers_Texas-Instruments-SN74CB3T16211DGGR_C2653275.html
21 U4 SN74CB3T3125PW 1
22 U_INT1 U_INT1,U_INT2,U_INT3 SN74LVC2G07DBVR 1 3
23 U7 TPS2051CDBVR 1 https://www.mouser.fr/ProductDetail/Texas-Instruments/TPS2051CDBVR?qs=PF3AD18CSE5vi2HeWLJCmw%3D%3D

9347
sbus-to-ztex/sbus-to-ztex.kicad_pcb
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8611
sbus-to-ztex/sbus-to-ztex.kicad_pcb-bak
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2062
sbus-to-ztex/sbus-to-ztex.net
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12
sbus-to-ztex/sbus-to-ztex.pro
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@@ -1,4 +1,4 @@
update=22/05/2015 07:44:53
update=Sat Aug 28 17:02:24 2021
version=1
last_client=kicad
[general]
@@ -31,3 +31,13 @@ NetIExt=net
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1

2
sbus-to-ztex/sbus-to-ztex.sch
View File

@@ -4,7 +4,7 @@ EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 5
Sheet 1 6
Title "sbus-to-ztex root"
Date ""
Rev ""

2434
sbus-to-ztex/sbus-to-ztex.xml
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BIN
sbus-to-ztex/sbus-to-ztex.zip
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345
sbus-to-ztex/sbus.sch
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@@ -4,7 +4,7 @@ EELAYER 26 0
EELAYER END
$Descr A2 23386 16535
encoding utf-8
Sheet 2 5
Sheet 2 6
Title "sbus-to-ztex SBus connection & level shifting"
Date ""
Rev ""
@@ -217,37 +217,36 @@ F 3 "https://www.mouser.com/datasheet/2/164/fcn230-3978.pdf" H 18450 3300 50 00
F 4 "FCN-234P096-G/Y" H 18450 3300 50 0001 C CNN "MPN"
F 5 "817-FCN-234P096-G/Y " H 18450 3300 50 0001 C CNN "Mouser"
F 6 "https://www2.mouser.com/ProductDetail/Fujitsu/FCN-234P096-G-Y?qs=uqct%252BzVq%2FBfM88%2F7KmJJ2Q%3D%3D" H 18450 3300 50 0001 C CNN "bom_link"
F 7 "https://www2.mouser.com/ProductDetail/Fujitsu/FCN-234P096-G-Y?qs=%2Fha2pyFadugZ9WCm2lJ8CZdXc85UARoDXS81raJopvR1w4UDuaXlcQ%3D%3D" H 18450 3300 50 0001 C CNN "URL"
1 18450 3300
1 0 0 -1
$EndComp
Text GLabel 19000 7750 2 60 Input ~ 0
Text GLabel 19000 6450 2 60 Input ~ 0
SBUS_5V_INT[7]*
Text GLabel 19200 5250 2 60 Input ~ 0
Text GLabel 18900 9650 2 60 Input ~ 0
SBUS_5V_INT[6]*
Text GLabel 19200 5350 2 60 Input ~ 0
Text GLabel 18900 10000 2 60 Input ~ 0
SBUS_5V_INT[5]*
Text GLabel 19200 5450 2 60 Input ~ 0
Text GLabel 19000 7750 2 60 Input ~ 0
SBUS_5V_INT[4]*
Text GLabel 19200 5550 2 60 Input ~ 0
SBUS_5V_INT[3]*
Text GLabel 19200 5650 2 60 Input ~ 0
SBUS_5V_INT[2]*
Text GLabel 19000 7400 2 60 Input ~ 0
SBUS_5V_INT[3]*
Text GLabel 18900 8500 2 60 Input ~ 0
SBUS_5V_INT[2]*
Text GLabel 18900 8850 2 60 Input ~ 0
SBUS_5V_INT[1]*
Text GLabel 18050 7750 0 60 Input ~ 0
Text GLabel 17850 6250 0 60 Input ~ 0
SBUS_3V3_INT[7]*
Text GLabel 18650 5250 0 60 Input ~ 0
Text GLabel 17950 9650 0 60 Input ~ 0
SBUS_3V3_INT[6]*
Text GLabel 18650 5350 0 60 Input ~ 0
Text GLabel 17950 10000 0 60 Input ~ 0
SBUS_3V3_INT[5]*
Text GLabel 18650 5450 0 60 Input ~ 0
Text GLabel 18050 7750 0 60 Input ~ 0
SBUS_3V3_INT[4]*
Text GLabel 18650 5550 0 60 Input ~ 0
SBUS_3V3_INT[3]*
Text GLabel 18650 5650 0 60 Input ~ 0
SBUS_3V3_INT[2]*
Text GLabel 18050 7400 0 60 Input ~ 0
SBUS_3V3_INT[1]*
SBUS_3V3_INT[3]*
Text GLabel 17950 8500 0 60 Input ~ 0
SBUS_3V3_INT[2]*
Text GLabel 11150 3100 2 60 Input ~ 0
SBUS_5V_D[00]
Text GLabel 11150 3000 2 60 Input ~ 0
@@ -829,7 +828,7 @@ U 1 1 5F80E30A
P 1950 2200
F 0 "U1" H 2750 2587 60 0000 C CNN
F 1 "SN74CB3T16211DGGR" H 2750 2481 60 0000 C CNN
F 2 "Package_SO:TSSOP-56_6.1x14mm_P0.5mm" H 2750 2440 60 0001 C CNN
F 2 "For_SeeedStudio:TSSOP-56_6.1x14mm_P0.5mm_For_SeeedStudio" H 2750 2440 60 0001 C CNN
F 3 "https://www.ti.com/lit/ds/symlink/sn74cb3t16211.pdf" H 1950 2200 60 0000 C CNN
F 4 "SN74CB3T16211DGGR" H 1950 2200 50 0001 C CNN "MPN"
1 1950 2200
@@ -904,7 +903,7 @@ U 1 1 5F8CA5E7
P 5750 2200
F 0 "U2" H 6550 2587 60 0000 C CNN
F 1 "SN74CB3T16211DGGR" H 6550 2481 60 0000 C CNN
F 2 "Package_SO:TSSOP-56_6.1x14mm_P0.5mm" H 6550 2440 60 0001 C CNN
F 2 "For_SeeedStudio:TSSOP-56_6.1x14mm_P0.5mm_For_SeeedStudio" H 6550 2440 60 0001 C CNN
F 3 "" H 5750 2200 60 0000 C CNN
F 4 "SN74CB3T16211DGGR" H 5750 2200 50 0001 C CNN "MPN"
1 5750 2200
@@ -979,9 +978,11 @@ U 1 1 5F8F42F3
P 9550 2200
F 0 "U3" H 10350 2587 60 0000 C CNN
F 1 "SN74CB3T16211DGGR" H 10350 2481 60 0000 C CNN
F 2 "Package_SO:TSSOP-56_6.1x14mm_P0.5mm" H 10350 2440 60 0001 C CNN
F 2 "For_SeeedStudio:TSSOP-56_6.1x14mm_P0.5mm_For_SeeedStudio" H 10350 2440 60 0001 C CNN
F 3 "" H 9550 2200 60 0000 C CNN
F 4 "SN74CB3T16211DGGR" H 9550 2200 50 0001 C CNN "MPN"
F 5 "https://www.mouser.fr/ProductDetail/Texas-Instruments/SN74CB3T16211DGGR?qs=%2Fha2pyFadujLgV8PJqueL5aUGpX9%252BbECTuUAq6EU8VAiPml4qcD9lw%3D%3D" H 9550 2200 50 0001 C CNN "URL-alt"
F 6 "https://lcsc.com/product-detail/Signal-Switches-Encoders-Decoders-Multiplexers_Texas-Instruments-SN74CB3T16211DGGR_C2653275.html" H 9550 2200 50 0001 C CNN "URL"
1 9550 2200
1 0 0 -1
$EndComp
@@ -1142,4 +1143,306 @@ Wire Wire Line
Connection ~ 5450 7200
Text Notes 500 5100 0 50 ~ 0
BEWARE\nthe order\n(for routing)
$Comp
L power:VCC #PWR0131
U 1 1 60DE3981
P 16450 8750
F 0 "#PWR0131" H 16450 8600 50 0001 C CNN
F 1 "VCC" H 16467 8923 50 0000 C CNN
F 2 "" H 16450 8750 50 0001 C CNN
F 3 "" H 16450 8750 50 0001 C CNN
1 16450 8750
0 -1 -1 0
$EndComp
$Comp
L power:+3.3V #PWR0132
U 1 1 60DE3987
P 16450 8600
F 0 "#PWR0132" H 16450 8450 50 0001 C CNN
F 1 "+3.3V" H 16465 8773 50 0000 C CNN
F 2 "" H 16450 8600 50 0001 C CNN
F 3 "" H 16450 8600 50 0001 C CNN
1 16450 8600
0 -1 -1 0
$EndComp
Wire Wire Line
16450 8600 16450 8750
$Comp
L power:GND #PWR0133
U 1 1 60DE398E
P 16750 8750
F 0 "#PWR0133" H 16750 8500 50 0001 C CNN
F 1 "GND" H 16755 8577 50 0000 C CNN
F 2 "" H 16750 8750 50 0001 C CNN
F 3 "" H 16750 8750 50 0001 C CNN
1 16750 8750
1 0 0 -1
$EndComp
$Comp
L Device:C C4
U 1 1 60DE399B
P 16600 8750
F 0 "C4" H 16625 8850 50 0000 L CNN
F 1 "100nF" H 16625 8650 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 16638 8600 50 0001 C CNN
F 3 "" H 16600 8750 50 0000 C CNN
F 4 "www.yageo.com" H 16600 8750 50 0001 C CNN "MNF1_URL"
F 5 "CC0603KRX7R8BB104" H 16600 8750 50 0001 C CNN "MPN"
F 6 "603-CC603KRX7R8BB104" H 16600 8750 50 0001 C CNN "Mouser"
F 7 "?" H 16600 8750 50 0001 C CNN "Digikey"
F 8 "?" H 16600 8750 50 0001 C CNN "LCSC"
F 9 "?" H 16600 8750 50 0001 C CNN "Koncar"
F 10 "TB" H 16600 8750 50 0001 C CNN "Side"
1 16600 8750
0 -1 -1 0
$EndComp
Connection ~ 16450 8750
$Comp
L Device:R R?
U 1 1 60DE39A4
P 18200 8400
AR Path="/5F6B165A/60DE39A4" Ref="R?" Part="1"
AR Path="/5F679B53/60DE39A4" Ref="R1" Part="1"
F 0 "R1" V 18280 8400 50 0000 C CNN
F 1 "10k" V 18200 8400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 18130 8400 50 0001 C CNN
F 3 "" H 18200 8400 50 0000 C CNN
F 4 "0603WAF1002T5E" V 18200 7800 50 0001 C CNN "MPN"
1 18200 8400
0 1 1 0
$EndComp
$Comp
L Device:R R?
U 1 1 60DE39AC
P 18200 8750
AR Path="/5F6B165A/60DE39AC" Ref="R?" Part="1"
AR Path="/5F679B53/60DE39AC" Ref="R2" Part="1"
F 0 "R2" V 18280 8750 50 0000 C CNN
F 1 "10k" V 18200 8750 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 18130 8750 50 0001 C CNN
F 3 "" H 18200 8750 50 0000 C CNN
F 4 "0603WAF1002T5E" V 18200 8150 50 0001 C CNN "MPN"
1 18200 8750
0 1 1 0
$EndComp
Wire Wire Line
17950 8850 18050 8850
Wire Wire Line
17950 8500 18050 8500
Wire Wire Line
18050 8400 18050 8500
Connection ~ 18050 8500
Wire Wire Line
18050 8500 18350 8500
Wire Wire Line
18050 8750 18050 8850
Connection ~ 18050 8850
Wire Wire Line
18050 8850 18350 8850
Wire Wire Line
16450 8600 18350 8600
Wire Wire Line
18350 8600 18350 8750
Connection ~ 16450 8600
Wire Wire Line
18350 8400 18350 8250
Wire Wire Line
18350 8250 16450 8250
Wire Wire Line
16450 8250 16450 8600
$Comp
L 74xGxx:74AUC2G07 U_INT2
U 1 1 60DE39C3
P 18650 8500
F 0 "U_INT2" H 18625 8767 50 0000 C CNN
F 1 "74LVC2G07" H 18625 8676 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23-6" H 18650 8500 50 0001 C CNN
F 3 "https://www.diodes.com/assets/Datasheets/74LVC2G07.pdf" H 18650 8500 50 0001 C CNN
F 4 "SN74LVC2G07DBVR" H 18650 8500 50 0001 C CNN "MPN"
1 18650 8500
1 0 0 -1
$EndComp
$Comp
L 74xGxx:74AUC2G07 U_INT2
U 2 1 60DE39CA
P 18650 8850
F 0 "U_INT2" H 18625 9117 50 0000 C CNN
F 1 "74LVC2G07" H 18625 9026 50 0000 C CNN
F 2 "" H 18650 8850 50 0001 C CNN
F 3 "http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf" H 18650 8850 50 0001 C CNN
2 18650 8850
1 0 0 -1
$EndComp
Text GLabel 17950 8850 0 60 Input ~ 0
SBUS_3V3_INT[1]*
$Comp
L power:VCC #PWR0139
U 1 1 612A613B
P 16450 9900
F 0 "#PWR0139" H 16450 9750 50 0001 C CNN
F 1 "VCC" H 16467 10073 50 0000 C CNN
F 2 "" H 16450 9900 50 0001 C CNN
F 3 "" H 16450 9900 50 0001 C CNN
1 16450 9900
0 -1 -1 0
$EndComp
$Comp
L power:+3.3V #PWR0140
U 1 1 612A6141
P 16450 9750
F 0 "#PWR0140" H 16450 9600 50 0001 C CNN
F 1 "+3.3V" H 16465 9923 50 0000 C CNN
F 2 "" H 16450 9750 50 0001 C CNN
F 3 "" H 16450 9750 50 0001 C CNN
1 16450 9750
0 -1 -1 0
$EndComp
Wire Wire Line
16450 9750 16450 9900
$Comp
L power:GND #PWR0141
U 1 1 612A6148
P 16750 9900
F 0 "#PWR0141" H 16750 9650 50 0001 C CNN
F 1 "GND" H 16755 9727 50 0000 C CNN
F 2 "" H 16750 9900 50 0001 C CNN
F 3 "" H 16750 9900 50 0001 C CNN
1 16750 9900
1 0 0 -1
$EndComp
$Comp
L Device:C C7
U 1 1 612A6155
P 16600 9900
F 0 "C7" H 16625 10000 50 0000 L CNN
F 1 "100nF" H 16625 9800 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 16638 9750 50 0001 C CNN
F 3 "" H 16600 9900 50 0000 C CNN
F 4 "www.yageo.com" H 16600 9900 50 0001 C CNN "MNF1_URL"
F 5 "CC0603KRX7R8BB104" H 16600 9900 50 0001 C CNN "MPN"
F 6 "603-CC603KRX7R8BB104" H 16600 9900 50 0001 C CNN "Mouser"
F 7 "?" H 16600 9900 50 0001 C CNN "Digikey"
F 8 "?" H 16600 9900 50 0001 C CNN "LCSC"
F 9 "?" H 16600 9900 50 0001 C CNN "Koncar"
F 10 "TB" H 16600 9900 50 0001 C CNN "Side"
1 16600 9900
0 -1 -1 0
$EndComp
Connection ~ 16450 9900
$Comp
L Device:R R?
U 1 1 612A615E
P 18200 9550
AR Path="/5F6B165A/612A615E" Ref="R?" Part="1"
AR Path="/5F679B53/612A615E" Ref="R5" Part="1"
F 0 "R5" V 18280 9550 50 0000 C CNN
F 1 "10k" V 18200 9550 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 18130 9550 50 0001 C CNN
F 3 "" H 18200 9550 50 0000 C CNN
F 4 "0603WAF1002T5E" V 18200 8950 50 0001 C CNN "MPN"
1 18200 9550
0 1 1 0
$EndComp
$Comp
L Device:R R?
U 1 1 612A6166
P 18200 9900
AR Path="/5F6B165A/612A6166" Ref="R?" Part="1"
AR Path="/5F679B53/612A6166" Ref="R6" Part="1"
F 0 "R6" V 18280 9900 50 0000 C CNN
F 1 "10k" V 18200 9900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 18130 9900 50 0001 C CNN
F 3 "" H 18200 9900 50 0000 C CNN
F 4 "0603WAF1002T5E" V 18200 9300 50 0001 C CNN "MPN"
1 18200 9900
0 1 1 0
$EndComp
Wire Wire Line
17950 10000 18050 10000
Wire Wire Line
17950 9650 18050 9650
Wire Wire Line
18050 9550 18050 9650
Connection ~ 18050 9650
Wire Wire Line
18050 9650 18350 9650
Wire Wire Line
18050 9900 18050 10000
Connection ~ 18050 10000
Wire Wire Line
18050 10000 18350 10000
Wire Wire Line
16450 9750 18350 9750
Wire Wire Line
18350 9750 18350 9900
Connection ~ 16450 9750
Wire Wire Line
18350 9550 18350 9400
Wire Wire Line
18350 9400 16450 9400
Wire Wire Line
16450 9400 16450 9750
$Comp
L 74xGxx:74AUC2G07 U_INT3
U 1 1 612A617C
P 18650 9650
F 0 "U_INT3" H 18625 9917 50 0000 C CNN
F 1 "74LVC2G07" H 18625 9826 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23-6" H 18650 9650 50 0001 C CNN
F 3 "https://www.diodes.com/assets/Datasheets/74LVC2G07.pdf" H 18650 9650 50 0001 C CNN
F 4 "SN74LVC2G07DBVR" H 18650 9650 50 0001 C CNN "MPN"
1 18650 9650
1 0 0 -1
$EndComp
$Comp
L 74xGxx:74AUC2G07 U_INT3
U 2 1 612A6183
P 18650 10000
F 0 "U_INT3" H 18625 10267 50 0000 C CNN
F 1 "74LVC2G07" H 18625 10176 50 0000 C CNN
F 2 "" H 18650 10000 50 0001 C CNN
F 3 "http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf" H 18650 10000 50 0001 C CNN
2 18650 10000
1 0 0 -1
$EndComp
$Comp
L Device:C C8
U 1 1 612BD908
P 6600 9200
F 0 "C8" H 6625 9300 50 0000 L CNN
F 1 "100nF" H 6625 9100 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 6638 9050 50 0001 C CNN
F 3 "" H 6600 9200 50 0000 C CNN
F 4 "www.yageo.com" H 6600 9200 50 0001 C CNN "MNF1_URL"
F 5 "CC0603KRX7R8BB104" H 6600 9200 50 0001 C CNN "MPN"
F 6 "603-CC603KRX7R8BB104" H 6600 9200 50 0001 C CNN "Mouser"
F 7 "?" H 6600 9200 50 0001 C CNN "Digikey"
F 8 "?" H 6600 9200 50 0001 C CNN "LCSC"
F 9 "?" H 6600 9200 50 0001 C CNN "Koncar"
F 10 "TB" H 6600 9200 50 0001 C CNN "Side"
1 6600 9200
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0142
U 1 1 612BD90F
P 6600 9350
F 0 "#PWR0142" H 6600 9100 50 0001 C CNN
F 1 "GND" H 6605 9177 50 0000 C CNN
F 2 "" H 6600 9350 50 0001 C CNN
F 3 "" H 6600 9350 50 0001 C CNN
1 6600 9350
1 0 0 -1
$EndComp
$Comp
L power:+3.3V #PWR0143
U 1 1 612C0425
P 6600 9050
F 0 "#PWR0143" H 6600 8900 50 0001 C CNN
F 1 "+3.3V" H 6615 9223 50 0000 C CNN
F 2 "" H 6600 9050 50 0001 C CNN
F 3 "" H 6600 9050 50 0001 C CNN
1 6600 9050
1 0 0 -1
$EndComp
$EndSCHEMATC

64
sbus-to-ztex/sdcard.sch
View File

@@ -4,7 +4,7 @@ EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 5 5
Sheet 5 6
Title "sbus-to-ztex sdcard"
Date ""
Rev ""
@@ -49,32 +49,14 @@ SD_D0
Text GLabel 3600 5350 0 60 Input ~ 0
SD_D1
$Comp
L Device:R R9
U 1 1 590C5D62
P 5450 4750
F 0 "R9" V 5530 4750 50 0000 C CNN
F 1 "0.47" V 5450 4750 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 5380 4750 50 0001 C CNN
F 3 "" H 5450 4750 50 0000 C CNN
F 4 "CTS" V 5450 4750 50 0001 C CNN "MFG1"
F 5 "www.ctscorp.com" V 5450 4750 50 0001 C CNN "MNF1_URL"
F 6 "73L2R47J" V 5450 4750 50 0001 C CNN "MPN"
F 7 "774-73L2R47J" V 5450 4750 50 0001 C CNN "Mouser"
F 8 "73L2R47JCT-ND" V 5450 4750 50 0001 C CNN "Digikey"
F 9 "FR001" V 5450 4750 50 0001 C CNN "Koncar"
1 5450 4750
-1 0 0 1
$EndComp
$Comp
L Device:C C1
U 1 1 590C7447
P 5450 5150
F 0 "C1" H 5475 5250 50 0000 L CNN
F 1 "22uF" H 5475 5050 50 0000 L CNN
F 1 "47uF" H 5475 5050 50 0000 L CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 5488 5000 50 0001 C CNN
F 3 "" H 5450 5150 50 0000 C CNN
F 4 "www.yageo.com" H 5450 5150 50 0001 C CNN "MNF1_URL"
F 5 "CC0805ZKY5V5BB226 " H 5450 5150 50 0001 C CNN "MPN"
F 4 "GRM21BR60J476ME15L" H 5450 5150 50 0001 C CNN "MPN"
1 5450 5150
1 0 0 -1
$EndComp
@@ -91,7 +73,7 @@ F 4 "47219-2001" H 4300 5250 50 0001 C CNN "MPN"
1 0 0 -1
$EndComp
Wire Wire Line
5450 5450 5000 5450
5450 5450 5200 5450
Wire Wire Line
5000 5450 5000 5350
Connection ~ 5000 5450
@@ -107,12 +89,40 @@ Wire Wire Line
5450 5300 5450 5450
Connection ~ 5450 5450
Wire Wire Line
5000 4950 5450 4950
Wire Wire Line
5450 4900 5450 4950
5000 4950 5200 4950
Connection ~ 5450 4950
Wire Wire Line
5450 4950 5450 5000
Text Label 5100 4950 0 50 ~ 0
SD-3V3
$Comp
L Device:C C?
U 1 1 60D77AD6
P 5200 5150
AR Path="/5F679B53/60D77AD6" Ref="C?" Part="1"
AR Path="/5F69F4EF/60D77AD6" Ref="C2" Part="1"
F 0 "C2" H 5225 5250 50 0000 L CNN
F 1 "100nF" H 5225 5050 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5238 5000 50 0001 C CNN
F 3 "" H 5200 5150 50 0000 C CNN
F 4 "www.yageo.com" H 5200 5150 50 0001 C CNN "MNF1_URL"
F 5 "CC0603KRX7R8BB104" H 5200 5150 50 0001 C CNN "MPN"
F 6 "603-CC603KRX7R8BB104" H 5200 5150 50 0001 C CNN "Mouser"
F 7 "?" H 5200 5150 50 0001 C CNN "Digikey"
F 8 "?" H 5200 5150 50 0001 C CNN "LCSC"
F 9 "?" H 5200 5150 50 0001 C CNN "Koncar"
F 10 "TB" H 5200 5150 50 0001 C CNN "Side"
1 5200 5150
1 0 0 -1
$EndComp
Wire Wire Line
5200 5000 5200 4950
Connection ~ 5200 4950
Wire Wire Line
5200 4950 5450 4950
Wire Wire Line
5200 5300 5200 5450
Connection ~ 5200 5450
Wire Wire Line
5200 5450 5000 5450
Wire Wire Line
5450 4600 5450 4950
$EndSCHEMATC

BIN
sbus-to-ztex/signals.xlsx
View File

Binary file not shown.

BIN
sbus-to-ztex/ug475_7Series_Pkg_Pinout.pdf
View File

Binary file not shown.

197
sbus-to-ztex/usb.sch
View File

@@ -15,43 +15,30 @@ Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Connector:USB_B_Micro J?
L Connector:USB_B_Micro J4
U 1 1 60D9A6A3
P 5000 2800
F 0 "J?" H 5055 3267 50 0000 C CNN
F 0 "J4" H 5055 3267 50 0000 C CNN
F 1 "USB_B_Micro" H 5055 3176 50 0000 C CNN
F 2 "Connector_USB:USB_Micro-B_Molex-105017-0001" H 5150 2750 50 0001 C CNN
F 3 "https://www.molex.com/pdm_docs/sd/1050170001_sd.pdf" H 5150 2750 50 0001 C CNN
F 4 "WM1399CT-ND" H 5000 2800 50 0001 C CNN "Digi-Key_PN"
F 5 "1050170001" H 5000 2800 50 0001 C CNN "MPN"
F 6 "https://www.molex.com/pdm_docs/sd/1050170001_sd.pdf" H 5000 2800 50 0001 C CNN "DK_Datasheet_Link"
F 7 "CONN RCPT USB2.0 MICRO B SMD R/A" H 5000 2800 50 0001 C CNN "Description"
F 8 "Molex" H 5000 2800 50 0001 C CNN "Manufacturer"
F 6 "CONN RCPT USB2.0 MICRO B SMD R/A" H 5000 2800 50 0001 C CNN "Description"
F 7 "Molex" H 5000 2800 50 0001 C CNN "Manufacturer"
F 8 "https://eu.mouser.com/ProductDetail/Molex/105017-0001?qs=hlXxxvYE36k7QcsR97GUKA%3D%3D" H 5000 2800 50 0001 C CNN "URL"
1 5000 2800
-1 0 0 -1
$EndComp
$Comp
L Power_Management:TPS2041B U?
U 1 1 60D9A6AC
P 6700 2800
F 0 "U?" H 6700 3267 50 0000 C CNN
F 1 "TPS2065" H 6700 3176 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 6700 3300 50 0001 C CNN
F 3 "" H 6650 3100 50 0001 C CNN
F 4 "TPS2065CDBVT-2" H 6700 2800 50 0001 C CNN "MPN"
F 5 "595-TPS2065CDBVT-2" H 6700 2800 50 0001 C CNN "Mouser No"
1 6700 2800
1 0 0 -1
$EndComp
Text Label 7400 2800 0 50 ~ 0
VBus
Wire Wire Line
7400 2800 7200 2800
$Comp
L power:GND #PWR?
L power:GND #PWR0126
U 1 1 60D9A6B5
P 6700 3400
F 0 "#PWR?" H 6700 3150 50 0001 C CNN
F 0 "#PWR0126" H 6700 3150 50 0001 C CNN
F 1 "GND" H 6705 3227 50 0000 C CNN
F 2 "" H 6700 3400 50 0001 C CNN
F 3 "" H 6700 3400 50 0001 C CNN
@@ -64,8 +51,6 @@ Text GLabel 7400 2600 2 50 Input ~ 0
+5V
Wire Wire Line
6200 2600 6000 2600
Wire Wire Line
6200 3000 6000 3000
Text Label 6000 2600 2 50 ~ 0
USB_FLT
Text Label 6000 3000 2 50 ~ 0
@@ -77,7 +62,8 @@ P 6200 2450
AR Path="/5F6B165A/60D9A6C2" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A6C2" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A6C2" Ref="R?" Part="1"
F 0 "R?" V 6280 2450 50 0000 C CNN
AR Path="/60D72F2C/60D9A6C2" Ref="R19" Part="1"
F 0 "R19" V 6280 2450 50 0000 C CNN
F 1 "10k" V 6200 2450 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 6130 2450 50 0001 C CNN
F 3 "" H 6200 2450 50 0000 C CNN
@@ -85,11 +71,8 @@ F 4 "0603WAF1002T5E" V 6200 1850 50 0001 C CNN "MPN"
1 6200 2450
-1 0 0 1
$EndComp
Connection ~ 6200 2600
Wire Wire Line
6200 2300 6200 2100
Text GLabel 6250 2100 2 50 Input ~ 0
+3.3V
$Comp
L Device:R R?
U 1 1 60D9A6CD
@@ -97,7 +80,8 @@ P 6100 2850
AR Path="/5F6B165A/60D9A6CD" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A6CD" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A6CD" Ref="R?" Part="1"
F 0 "R?" V 6180 2850 50 0000 C CNN
AR Path="/60D72F2C/60D9A6CD" Ref="R18" Part="1"
F 0 "R18" V 6180 2850 50 0000 C CNN
F 1 "10k" V 6100 2850 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 6030 2850 50 0001 C CNN
F 3 "" H 6100 2850 50 0000 C CNN
@@ -122,7 +106,8 @@ U 1 1 60D9A6E1
P 7200 2000
AR Path="/5F679B53/60D9A6E1" Ref="C?" Part="1"
AR Path="/5F69F4EF/60D9A6E1" Ref="C?" Part="1"
F 0 "C?" H 7225 2100 50 0000 L CNN
AR Path="/60D72F2C/60D9A6E1" Ref="C5" Part="1"
F 0 "C5" H 7225 2100 50 0000 L CNN
F 1 "100nF" H 7225 1900 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 7238 1850 50 0001 C CNN
F 3 "" H 7200 2000 50 0000 C CNN
@@ -137,46 +122,25 @@ F 10 "TB" H 7200 2000 50 0001 C CNN "Side"
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
L power:GND #PWR0127
U 1 1 60D9A6E8
P 7200 2150
F 0 "#PWR?" H 7200 1900 50 0001 C CNN
F 0 "#PWR0127" H 7200 1900 50 0001 C CNN
F 1 "GND" H 7205 1977 50 0000 C CNN
F 2 "" H 7200 2150 50 0001 C CNN
F 3 "" H 7200 2150 50 0001 C CNN
1 7200 2150
1 0 0 -1
$EndComp
$Comp
L Device:R R?
U 1 1 60D9A6EF
P 7200 2950
AR Path="/5F6B165A/60D9A6EF" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A6EF" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A6EF" Ref="R?" Part="1"
F 0 "R?" V 7280 2950 50 0000 C CNN
F 1 "1k" V 7200 2950 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7130 2950 50 0001 C CNN
F 3 "" H 7200 2950 50 0000 C CNN
F 4 "0603WAF1001T5E" V 7200 2350 50 0001 C CNN "MPN"
1 7200 2950
-1 0 0 1
$EndComp
Connection ~ 7200 2800
Wire Wire Line
7200 3100 7200 3400
Wire Wire Line
7200 3400 6700 3400
Connection ~ 6700 3400
Wire Wire Line
4700 2900 4450 2900
Wire Wire Line
4700 2800 4450 2800
$Comp
L Power_Protection:SN65220 U?
L Power_Protection:SN65220 U5
U 1 1 60D9A6FD
P 4250 2850
F 0 "U?" V 4296 2937 50 0000 L CNN
F 0 "U5" V 4296 2937 50 0000 L CNN
F 1 "SN65220" V 4205 2937 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23-6" H 4600 2700 50 0001 L CNN
F 3 "http://www.ti.com/lit/ds/symlink/sn65220.pdf" H 4250 3000 50 0001 C CNN
@@ -189,10 +153,10 @@ Wire Wire Line
Wire Wire Line
4450 2900 4450 3450
$Comp
L power:GND #PWR?
L power:GND #PWR0128
U 1 1 60D9A706
P 3850 2850
F 0 "#PWR?" H 3850 2600 50 0001 C CNN
F 0 "#PWR0128" H 3850 2600 50 0001 C CNN
F 1 "GND" H 3855 2677 50 0000 C CNN
F 2 "" H 3850 2850 50 0001 C CNN
F 3 "" H 3850 2850 50 0001 C CNN
@@ -209,7 +173,8 @@ P 3950 2500
AR Path="/5F6B165A/60D9A70F" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A70F" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A70F" Ref="R?" Part="1"
F 0 "R?" V 4030 2500 50 0000 C CNN
AR Path="/60D72F2C/60D9A70F" Ref="R14" Part="1"
F 0 "R14" V 4030 2500 50 0000 C CNN
F 1 "15k" V 3950 2500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 3880 2500 50 0001 C CNN
F 3 "" H 3950 2500 50 0000 C CNN
@@ -224,11 +189,12 @@ P 3950 3200
AR Path="/5F6B165A/60D9A717" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A717" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A717" Ref="R?" Part="1"
F 0 "R?" V 4030 3200 50 0000 C CNN
F 1 "10k" V 3950 3200 50 0000 C CNN
AR Path="/60D72F2C/60D9A717" Ref="R15" Part="1"
F 0 "R15" V 4030 3200 50 0000 C CNN
F 1 "15k" V 3950 3200 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 3880 3200 50 0001 C CNN
F 3 "" H 3950 3200 50 0000 C CNN
F 4 "0603WAF1002T5E" V 3950 2600 50 0001 C CNN "MPN"
F 4 "0603WAF1502T5E" V 3950 2600 50 0001 C CNN "MPN"
1 3950 3200
-1 0 0 1
$EndComp
@@ -263,11 +229,13 @@ P 3700 2250
AR Path="/5F6B165A/60D9A72D" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A72D" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A72D" Ref="R?" Part="1"
F 0 "R?" V 3780 2250 50 0000 C CNN
AR Path="/60D72F2C/60D9A72D" Ref="R9" Part="1"
F 0 "R9" V 3780 2250 50 0000 C CNN
F 1 "27" V 3700 2250 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 3630 2250 50 0001 C CNN
F 3 "" H 3700 2250 50 0000 C CNN
F 4 "ERJ-3EKF27R0V" V 3700 1650 50 0001 C CNN "MPN"
F 4 "0603WAF270JT5E" V 3700 2250 50 0001 C CNN "MPN"
F 5 "ERJ-3EKF27R0V" V 3700 1650 50 0001 C CNN "MPN-ALT"
1 3700 2250
0 1 1 0
$EndComp
@@ -278,11 +246,13 @@ P 3700 3450
AR Path="/5F6B165A/60D9A735" Ref="R?" Part="1"
AR Path="/5F679B53/60D9A735" Ref="R?" Part="1"
AR Path="/5F69F4EF/60D9A735" Ref="R?" Part="1"
F 0 "R?" V 3780 3450 50 0000 C CNN
AR Path="/60D72F2C/60D9A735" Ref="R10" Part="1"
F 0 "R10" V 3780 3450 50 0000 C CNN
F 1 "27" V 3700 3450 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 3630 3450 50 0001 C CNN
F 3 "" H 3700 3450 50 0000 C CNN
F 4 "ERJ-3EKF27R0V" V 3700 2850 50 0001 C CNN "MPN"
F 4 "0603WAF270JT5E" V 3700 3450 50 0001 C CNN "MPN"
F 5 "ERJ-3EKF27R0V" V 3700 2850 50 0001 C CNN "MPN-ALT"
1 3700 3450
0 1 1 0
$EndComp
@@ -292,24 +262,16 @@ Connection ~ 3950 3450
Wire Wire Line
3850 2250 3950 2250
Connection ~ 3950 2250
Text Label 3550 2250 2 50 ~ 0
USBH0_D+
Text Label 3550 3450 2 50 ~ 0
USBH0_D-
Text Label 4950 1450 2 50 ~ 0
VBus
Wire Wire Line
4700 3000 4700 3200
Wire Wire Line
4700 3200 5000 3200
Wire Wire Line
5000 3200 5100 3200
Connection ~ 5000 3200
$Comp
L power:GND #PWR?
L power:GND #PWR0129
U 1 1 60D9A747
P 5000 3200
F 0 "#PWR?" H 5000 2950 50 0001 C CNN
F 0 "#PWR0129" H 5000 2950 50 0001 C CNN
F 1 "GND" H 5005 3027 50 0000 C CNN
F 2 "" H 5000 3200 50 0001 C CNN
F 3 "" H 5000 3200 50 0001 C CNN
@@ -321,11 +283,11 @@ Wire Wire Line
Wire Wire Line
4700 1850 4950 1850
$Comp
L Device:CP C?
L Device:CP C3
U 1 1 60D9A750
P 4950 2000
F 0 "C?" H 5068 2046 50 0000 L CNN
F 1 "CP" H 5068 1955 50 0000 L CNN
F 0 "C3" H 5068 2046 50 0000 L CNN
F 1 "150uF" H 5068 1955 50 0000 L CNN
F 2 "Capacitor_SMD:C_1206_3216Metric" H 4988 1850 50 0001 C CNN
F 3 "~" H 4950 2000 50 0001 C CNN
F 4 "GRM31CR60J157ME11L" H 4950 2000 50 0001 C CNN "MPN"
@@ -333,14 +295,15 @@ F 4 "GRM31CR60J157ME11L" H 4950 2000 50 0001 C CNN "MPN"
1 0 0 -1
$EndComp
$Comp
L Device:Ferrite_Bead_Small FB?
L Device:Ferrite_Bead_Small FB1
U 1 1 60D9A758
P 4950 1750
F 0 "FB?" H 5050 1796 50 0000 L CNN
F 0 "FB1" H 5050 1796 50 0000 L CNN
F 1 "Ferrite_Bead_Small" H 5050 1705 50 0000 L CNN
F 2 "Inductor_SMD:L_0805_2012Metric" V 4880 1750 50 0001 C CNN
F 3 "~" H 4950 1750 50 0001 C CNN
F 4 "742792022" H 4950 1750 50 0001 C CNN "MPN"
F 4 "742792022" H 4950 1750 50 0001 C CNN "MPN-ALT"
F 5 "PZ2012U221-2R0TF" H 4950 1750 50 0001 C CNN "MPN"
1 4950 1750
1 0 0 -1
$EndComp
@@ -348,14 +311,86 @@ Connection ~ 4950 1850
Wire Wire Line
4950 1650 4950 1450
$Comp
L power:GND #PWR?
L power:GND #PWR0130
U 1 1 60D9A761
P 4950 2150
F 0 "#PWR?" H 4950 1900 50 0001 C CNN
F 0 "#PWR0130" H 4950 1900 50 0001 C CNN
F 1 "GND" H 4955 1977 50 0000 C CNN
F 2 "" H 4950 2150 50 0001 C CNN
F 3 "" H 4950 2150 50 0001 C CNN
1 4950 2150
1 0 0 -1
$EndComp
Wire Wire Line
6000 3000 6100 3000
Connection ~ 6100 3000
Wire Wire Line
6100 3000 6200 3000
Text GLabel 3550 2250 0 50 Input ~ 0
USBH0_D+
Text GLabel 3550 3450 0 50 Input ~ 0
USBH0_D-
Text Label 4700 2050 2 50 ~ 0
VBus_USB0
Text Notes 5050 4200 0 50 ~ 0
Inspired by Dolu1990's USB pmod\nSwitch to a TPS2051C for availability (and .5A is enough as there's just one port)\n
Text GLabel 6250 2100 2 50 Input ~ 0
+5V
Text Notes 6350 4050 1 50 ~ 0
TPS2051C uses EN not !EN
Wire Wire Line
7850 1850 8050 1850
$Comp
L Device:C C?
U 1 1 612D3A06
P 7850 2000
AR Path="/5F679B53/612D3A06" Ref="C?" Part="1"
AR Path="/5F69F4EF/612D3A06" Ref="C?" Part="1"
AR Path="/60D72F2C/612D3A06" Ref="C14" Part="1"
F 0 "C14" H 7875 2100 50 0000 L CNN
F 1 "100nF" H 7875 1900 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 7888 1850 50 0001 C CNN
F 3 "" H 7850 2000 50 0000 C CNN
F 4 "www.yageo.com" H 7850 2000 50 0001 C CNN "MNF1_URL"
F 5 "CC0603KRX7R8BB104" H 7850 2000 50 0001 C CNN "MPN"
F 6 "603-CC603KRX7R8BB104" H 7850 2000 50 0001 C CNN "Mouser"
F 7 "?" H 7850 2000 50 0001 C CNN "Digikey"
F 8 "?" H 7850 2000 50 0001 C CNN "LCSC"
F 9 "?" H 7850 2000 50 0001 C CNN "Koncar"
F 10 "TB" H 7850 2000 50 0001 C CNN "Side"
1 7850 2000
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0134
U 1 1 612D3A0D
P 7850 2150
F 0 "#PWR0134" H 7850 1900 50 0001 C CNN
F 1 "GND" H 7855 1977 50 0000 C CNN
F 2 "" H 7850 2150 50 0001 C CNN
F 3 "" H 7850 2150 50 0001 C CNN
1 7850 2150
1 0 0 -1
$EndComp
Text Label 8050 1850 0 50 ~ 0
VBus
$Comp
L Power_Management:TPS2041B U7
U 1 1 60D9A6AC
P 6700 2800
F 0 "U7" H 6700 3267 50 0000 C CNN
F 1 "TPS2051C" H 6700 3176 50 0000 C CNN
F 2 "Package_TO_SOT_SMD:SOT-23-5" H 6700 3300 50 0001 C CNN
F 3 "" H 6650 3100 50 0001 C CNN
F 4 "TPS2051CDBVR" H 6700 2800 50 0001 C CNN "MPN"
F 5 "595-TPS2051CDBVR" H 6700 2800 50 0001 C CNN "Mouser No"
F 6 "https://www.mouser.fr/ProductDetail/Texas-Instruments/TPS2051CDBVR?qs=PF3AD18CSE5vi2HeWLJCmw%3D%3D" H 6700 2800 50 0001 C CNN "URL"
1 6700 2800
1 0 0 -1
$EndComp
Connection ~ 6200 2600
Text HLabel 4450 2250 2 50 Input ~ 0
USB_D+
Text HLabel 4450 3450 2 50 Input ~ 0
USB_D-
$EndSCHEMATC