github.com/rdolbeau.SBusFPGA
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brz to brz32, erasecols in console

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This commit is contained in:
Romain Dolbeau
2022-03-12 13:32:29 +01:00
parent 798a4975c0
commit fb9cbeb165
3 changed files with 52 additions and 44 deletions
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68
NetBSD/9.0/usr/src/sys/dev/sbus/goblin.c
View File

@@ -72,6 +72,7 @@ static void goblin_set_video(struct goblin_softc *, int);
static int goblin_get_video(struct goblin_softc *);
static void jareth_copyrows(void *, int, int, int);
static void jareth_eraserows(void *, int, int, long int);
dev_type_open(goblinopen);
dev_type_close(goblinclose);
@@ -682,6 +683,7 @@ goblin_init_screen(void *cookie, struct vcons_screen *scr,
ri->ri_hw = scr;
if (sc->sc_has_jareth) {
ri->ri_ops.copyrows = jareth_copyrows;
ri->ri_ops.eraserows = jareth_eraserows;
device_printf(sc->sc_dev, "Jareth enabled\n");
}
}
@@ -736,7 +738,7 @@ static int wait_job(struct goblin_softc *sc, uint32_t param, enum jareth_verbosi
static int jareth_scroll(struct goblin_softc *sc, enum jareth_verbosity verbose, int y0, int y1, int x0, int w, int n) {
const uint32_t base = 0;
const int pidx = 0;
int i;
/* int i; */
power_on(sc);
@@ -753,10 +755,10 @@ static int jareth_scroll(struct goblin_softc *sc, enum jareth_verbosity verbose,
}
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(2,0), (w));
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(3,0), (n));
for (i = 1 ; i < 8 ; i++) {
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(2,i), 0);
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(3,i), 0);
}
/* for (i = 1 ; i < 8 ; i++) { */
/* bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(2,i), 0); */
/* bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(3,i), 0); */
/* } */
jareth_mpstart_write(sc, program_offset[pidx]);
jareth_mplen_write(sc, program_len[pidx]);
@@ -783,10 +785,10 @@ static int jareth_fill(struct goblin_softc *sc, enum jareth_verbosity verbose, i
}
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(2,0), (w));
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(3,0), (n));
for (i = 1 ; i < 8 ; i++) {
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(2,i), 0);
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(3,i), 0);
}
/* for (i = 1 ; i < 8 ; i++) { */
/* bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(2,i), 0); */
/* bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(3,i), 0); */
/* } */
bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_regfile,SUBREG_ADDR(4,0), (sc->sc_stride));
jareth_mpstart_write(sc, program_offset[pidx]);
jareth_mplen_write(sc, program_len[pidx]);
@@ -827,7 +829,6 @@ jareth_copyrows(void *cookie, int src, int dst, int n)
n *= ri->ri_font->fontheight;
src *= ri->ri_font->fontheight;
dst *= ri->ri_font->fontheight;
int x0 = ri->ri_xorigin;
int y0 = ri->ri_yorigin + src;
@@ -839,28 +840,35 @@ jareth_copyrows(void *cookie, int src, int dst, int n)
/* int y3 = ri->ri_yorigin + dst + n - 1; */
jareth_scroll(sc, jareth_silent, y0, y2, x0, ri->ri_emuwidth, n);
}
#if 0
if (y0 > y2) {
int x, y;
for (y = 0 ; y < n ; y++) {
for (x = x0 & ~3 ; x < x1 ; x+= 4) {
uint32_t* srcadr = (uint32_t*)(((uint8_t*)sc->sc_fb.fb_pixels) + (y0 + y) * sc->sc_stride + x);
uint32_t* dstadr = (uint32_t*)(((uint8_t*)sc->sc_fb.fb_pixels) + (y2 + y) * sc->sc_stride + x);
*dstadr = *srcadr;
}
}
} else {
int x, y;
for (y = n-1 ; y >= 0 ; y--) {
for (x = x0 & ~3; x < x1 ; x+= 4) {
uint32_t* srcadr = (uint32_t*)(((uint8_t*)sc->sc_fb.fb_pixels) + (y0 + y) * sc->sc_stride + x);
uint32_t* dstadr = (uint32_t*)(((uint8_t*)sc->sc_fb.fb_pixels) + (y2 + y) * sc->sc_stride + x);
*dstadr = *srcadr;
}
}
static void
jareth_eraserows(void *cookie, int row, int n, long int attr)
{
struct rasops_info *ri = cookie;
struct vcons_screen *scr = ri->ri_hw;
struct goblin_softc *sc = scr->scr_cookie;
uint32_t pat;
if (row < 0) {
n += row;
row = 0;
}
if (row+n > ri->ri_rows)
n = ri->ri_rows - row;
if (n <= 0)
return;
pat = ri->ri_devcmap[(attr >> 16) & 0xff];
pat |= pat << 8;
pat |= pat << 16;
if ((n == ri->ri_rows) && (ri->ri_flg & RI_FULLCLEAR)) {
(void)jareth_fill(sc, jareth_silent, 0, pat, 0, ri->ri_width, ri->ri_height);
} else {
row *= ri->ri_font->fontheight;
(void)jareth_fill(sc, jareth_silent, ri->ri_yorigin + row, pat, ri->ri_xorigin, ri->ri_emuwidth, n * ri->ri_font->fontheight);
}
#endif
}
static int start_job(struct goblin_softc *sc, enum jareth_verbosity verbose) {

10
sbus-to-ztex-gateware-migen/jareth.py
View File

@@ -21,7 +21,7 @@ opcodes = { # mnemonic : [bit coding, docstring] ; if bit 6 (0x20) is set, shif
"SUB32V" : [6, "Wd[x..x+32] $\gets$ Ra[x..x+32] - Rb[x..x+32] // vector 32-bit binary add"],
"AND" : [7, "Wd $\gets$ Ra & Rb // bitwise AND"], # replace MUL
"BRNZ32" : [8, "If Ra[0:32] != 0 then mpc[9:0] $\gets$ mpc[9:0] + immediate[9:0] + 1, else mpc $\gets$ mpc + 1 // Branch if non-zero"], # replace TRD
"BRZ" : [9, "If Ra == 0 then mpc[9:0] $\gets$ mpc[9:0] + immediate[9:0] + 1, else mpc $\gets$ mpc + 1 // Branch if zero"],
"BRZ32" : [9, "If Ra[0:32] == 0 then mpc[9:0] $\gets$ mpc[9:0] + immediate[9:0] + 1, else mpc $\gets$ mpc + 1 // Branch if zero"],
"FIN" : [10, "halt execution and assert interrupt to host CPU that microcode execution is done"],
"SHL" : [11, "Wd $\gets$ Ra << 1 // shift Ra left by one and store in Wd"],
# 12 XBT
@@ -1144,8 +1144,8 @@ Here are the currently implemented opcodes for The Engine:
)
)
seq.act("EXEC", # not a great name. This is actually where the register file fetches its contents.
If(instruction.opcode == opcodes["BRZ"][0],
NextState("DO_BRZ"),
If(instruction.opcode == opcodes["BRZ32"][0],
NextState("DO_BRZ32"),
).Elif(instruction.opcode == opcodes["BRNZ32"][0],
NextState("DO_BRNZ32"),
).Elif(instruction.opcode == opcodes["FIN"][0],
@@ -1174,8 +1174,8 @@ Here are the currently implemented opcodes for The Engine:
NextValue(running, 0),
illegal_opcode.eq(1),
)
seq.act("DO_BRZ",
If(ra_dat == 0,
seq.act("DO_BRZ32",
If(ra_dat[0:32] == 0,
If( (sext_immediate + mpc + 1 < mpc_stop) & (sext_immediate + mpc + 1 >= self.mpstart.fields.mpstart), # validate new PC is in range
NextState("FETCH"),
NextValue(mpc, sext_immediate + mpc + 1),

18
sbus-to-ztex-gateware-migen/jareth_code/jareth_code.rs
View File

@@ -26,7 +26,7 @@ fn main() -> std::io::Result<()> {
setmq %31, %1, #16
and %5, %2, #15
sub32v %6, %2, %5
brz done, %6
brz32 done, %6
loop:
psa %18, %16
psa %19, %17
@@ -34,10 +34,10 @@ fn main() -> std::io::Result<()> {
psa %20, %17
store128inc %31, %2, %17
sub32v %6, %6, #16
brz last, %6
brz32 last, %6
loadh128inc %16, %0, %16
loadh128inc %17, %1, %17
brz loop, #0
brz32 loop, #0
last:
// FIXME: not if Q is aligned
loadh128inc %17, %1, %17
@@ -79,11 +79,11 @@ fn main() -> std::io::Result<()> {
// decrement Y count
sub32v %3, %3, #1
// if 0, finished
brz done, %3
brz32 done, %3
// add strides to initial addresses
add32v %0, %0, %4
// loop to do next line
brz loop_y, #0
brz32 loop_y, #0
done:
fin
fin
@@ -119,11 +119,11 @@ fn main() -> std::io::Result<()> {
// decrement Y count
sub32v %3, %3, #1
// if 0, finished
brz done, %3
brz32 done, %3
// add strides to initial addresses
add32v %0, %0, %4
// loop to do next line
brz loop_y, #0
brz32 loop_y, #0
done:
fin
fin
@@ -158,11 +158,11 @@ fn main() -> std::io::Result<()> {
// decrement Y count
sub32v %3, %3, #1
// if 0, finished
brz done, %3
brz32 done, %3
// add strides to initial addresses
add32v %0, %0, %4
// loop to do next line
brz loop_y, #0
brz32 loop_y, #0
done:
fin
fin