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Removed trace files, now unused in testing

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This commit is contained in:
Ross Wilson
2015-06-10 17:42:56 +07:00
parent 685b075cde
commit c45d698d86
22 changed files with 0 additions and 720 deletions
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15
pymlac/good_testX_ptr.trace
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@@ -1,15 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'testX_ptr.ptp' mounted on PTR
Running from address 000040
Imlac halted
File 'test.txt' mounted on PTR
Trace set to (000106, 000106)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000106 HRB L=0 AC=000101
000106 HRB L=0 AC=000102
000106 HRB L=0 AC=000103
Imlac halted

41
pymlac/good_test_add.trace
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@@ -1,41 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_add.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 00000 L=0 AC=000000
000101 ADD 00150 L=0 AC=000000
000102 SAM 00150 L=0 AC=000000
000104 LAW 00000 L=0 AC=000000
000105 ADD 00151 L=0 AC=000001
000106 SAM 00151 L=0 AC=000001
000110 LAW 00001 L=0 AC=000001
000111 ADD 00151 L=0 AC=000002
000112 SAM 00152 L=0 AC=000002
000114 CLL L=0 AC=000002
000115 LWC 00002 L=0 AC=177776
000116 ADD 00151 L=0 AC=177777
000117 SAM 00153 L=0 AC=177777
000121 ADD 00151 L=1 AC=000000
000122 SAM 00150 L=1 AC=000000
000124 LAW 00000 L=1 AC=000000
000125 ADD *00155 L=1 AC=000000
000126 SAM 00150 L=1 AC=000000
000130 LAW 00000 L=1 AC=000000
000131 ADD *00154 L=1 AC=000001
000132 SAM 00151 L=1 AC=000001
000134 LAW 00001 L=1 AC=000001
000135 ADD *00154 L=1 AC=000002
000136 SAM 00152 L=1 AC=000002
000140 LWC 00002 L=1 AC=177776
000141 ADD *00154 L=1 AC=177777
000142 SAM 00153 L=1 AC=177777
000144 ADD *00154 L=0 AC=000000
000145 SAM 00150 L=0 AC=000000
000147 HLT L=0 AC=000000
Imlac halted

30
pymlac/good_test_and.trace
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@@ -1,30 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_and.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAC 00134 L=0 AC=177777
000101 AND 00132 L=0 AC=000001
000102 SAM 00132 L=0 AC=000001
000104 LAW 00010 L=0 AC=000010
000105 AND 00132 L=0 AC=000000
000106 SAM 00131 L=0 AC=000000
000110 LAW 00002 L=0 AC=000002
000111 AND 00133 L=0 AC=000002
000112 SAM 00133 L=0 AC=000002
000114 LAC 00134 L=0 AC=177777
000115 AND 00137 L=0 AC=100000
000116 SAM 00137 L=0 AC=100000
000120 LAC 00134 L=0 AC=177777
000121 AND *00135 L=0 AC=177777
000122 SAM 00134 L=0 AC=177777
000124 LAC 00134 L=0 AC=177777
000125 AND *00136 L=0 AC=000000
000126 SAM 00131 L=0 AC=000000
000130 HLT L=0 AC=000000
Imlac halted

17
pymlac/good_test_bank.trace
View File

@@ -1,17 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_bank.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAC 00110 L=0 AC=012345
000101 DAC *00107 L=0 AC=012345
000102 CLA L=0 AC=000000
000103 LAC *00107 L=0 AC=012345
000104 SAM 00110 L=0 AC=012345
000106 HLT L=0 AC=012345
Imlac halted

47
pymlac/good_test_conditional.trace
View File

@@ -1,47 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_conditional.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LWC 00001 L=0 AC=177777
000101 ASZ L=0 AC=177777
000102 JMP 00104 L=0 AC=177777
000104 LAW 00000 L=0 AC=000000
000105 ASZ L=0 AC=000000
000107 LWC 00001 L=0 AC=177777
000110 ASN L=0 AC=177777
000112 LAW 00000 L=0 AC=000000
000113 ASN L=0 AC=000000
000114 JMP 00116 L=0 AC=000000
000116 LAW 00000 L=0 AC=000000
000117 ASP L=0 AC=000000
000121 LAW 00001 L=0 AC=000001
000122 ASP L=0 AC=000001
000124 LWC 00001 L=0 AC=177777
000125 ASP L=0 AC=177777
000126 JMP 00130 L=0 AC=177777
000130 LAW 00000 L=0 AC=000000
000131 ASM L=0 AC=000000
000132 JMP 00134 L=0 AC=000000
000134 LAW 00001 L=0 AC=000001
000135 ASM L=0 AC=000001
000136 JMP 00140 L=0 AC=000001
000140 LWC 00001 L=0 AC=177777
000141 ASM L=0 AC=177777
000143 STL L=1 AC=177777
000144 LSZ L=1 AC=177777
000145 JMP 00147 L=1 AC=177777
000147 CLL L=0 AC=177777
000150 LSZ L=0 AC=177777
000152 STL L=1 AC=177777
000153 LSN L=1 AC=177777
000155 CLL L=0 AC=177777
000156 LSN L=0 AC=177777
000157 JMP 00161 L=0 AC=177777
000161 HLT L=0 AC=177777
Imlac halted

22
pymlac/good_test_dac.trace
View File

@@ -1,22 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_dac.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LWC 00001 L=0 AC=177777
000101 DAC 00115 L=0 AC=177777
000102 CLA L=0 AC=000000
000103 LAC 00115 L=0 AC=177777
000104 SAM 00116 L=0 AC=177777
000106 LWC 00002 L=0 AC=177776
000107 DAC *00120 L=0 AC=177776
000110 CLA L=0 AC=000000
000111 LAC 00115 L=0 AC=177776
000112 SAM 00117 L=0 AC=177776
000114 HLT L=0 AC=177776
Imlac halted

32
pymlac/good_test_increg.trace
View File

@@ -1,32 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_increg.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 01000 L=0 AC=001000
000101 DAC 00010 L=0 AC=001000
000102 LAW 00123 L=0 AC=000123
000103 DAC *00010 L=0 AC=000123
000104 LAC 00010 L=0 AC=001001
000105 SAM 00134 L=0 AC=001001
000107 LAW 00123 L=0 AC=000123
000110 DAC *00010 L=0 AC=000123
000111 LAC 00010 L=0 AC=001002
000112 SAM 00135 L=0 AC=001002
000114 LAW 00123 L=0 AC=000123
000115 DAC *00010 L=0 AC=000123
000116 LAC 00010 L=0 AC=001003
000117 SAM 00136 L=0 AC=001003
000121 LAC 01001 L=0 AC=000123
000122 SAM 00133 L=0 AC=000123
000124 LAC 01002 L=0 AC=000123
000125 SAM 00133 L=0 AC=000123
000127 LAC 01003 L=0 AC=000123
000130 SAM 00133 L=0 AC=000123
000132 HLT L=0 AC=000123
Imlac halted

54
pymlac/good_test_ior.trace
View File

@@ -1,54 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_ior.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 00000 L=0 AC=000000
000101 IOR 00172 L=0 AC=000001
000102 SAM 00172 L=0 AC=000001
000104 LAW 00001 L=0 AC=000001
000105 IOR 00171 L=0 AC=000001
000106 SAM 00172 L=0 AC=000001
000110 LAC 00173 L=0 AC=100000
000111 IOR 00172 L=0 AC=100001
000112 SAM 00174 L=0 AC=100001
000114 LWC 00001 L=0 AC=177777
000115 IOR 00175 L=0 AC=177777
000116 SAM 00177 L=0 AC=177777
000120 LWC 00001 L=0 AC=177777
000121 IOR 00176 L=0 AC=177777
000122 SAM 00200 L=0 AC=177777
000124 LAW 00000 L=0 AC=000000
000125 IOR 00175 L=0 AC=125252
000126 SAM 00175 L=0 AC=125252
000130 LAW 00000 L=0 AC=000000
000131 IOR 00176 L=0 AC=052525
000132 SAM 00176 L=0 AC=052525
000134 LAW 00000 L=0 AC=000000
000135 IOR *00202 L=0 AC=000001
000136 SAM 00172 L=0 AC=000001
000140 LAW 00001 L=0 AC=000001
000141 IOR *00201 L=0 AC=000001
000142 SAM 00172 L=0 AC=000001
000144 LAC 00173 L=0 AC=100000
000145 IOR *00202 L=0 AC=100001
000146 SAM 00174 L=0 AC=100001
000150 LWC 00001 L=0 AC=177777
000151 IOR *00203 L=0 AC=177777
000152 SAM 00177 L=0 AC=177777
000154 LWC 00001 L=0 AC=177777
000155 IOR *00204 L=0 AC=177777
000156 SAM 00200 L=0 AC=177777
000160 LAW 00000 L=0 AC=000000
000161 IOR *00203 L=0 AC=125252
000162 SAM 00175 L=0 AC=125252
000164 LAW 00000 L=0 AC=000000
000165 IOR *00204 L=0 AC=052525
000166 SAM 00176 L=0 AC=052525
000170 HLT L=0 AC=052525
Imlac halted

22
pymlac/good_test_isz.trace
View File

@@ -1,22 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_isz.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LWC 00002 L=0 AC=177776
000101 DAC 00117 L=0 AC=177776
000102 ISZ 00117 L=0 AC=177776
000103 JMP 00105 L=0 AC=177776
000105 ISZ 00117 L=0 AC=177776
000107 LWC 00002 L=0 AC=177776
000110 DAC 00117 L=0 AC=177776
000111 ISZ *00120 L=0 AC=177776
000112 JMP 00114 L=0 AC=177776
000114 ISZ *00120 L=0 AC=177776
000116 HLT L=0 AC=177776
Imlac halted

19
pymlac/good_test_jmp.trace
View File

@@ -1,19 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_jmp.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 JMP 00102 L=0 AC=177777
000102 NOP L=0 AC=177777
000103 JMP 00106 L=0 AC=177777
000106 JMP 00104 L=0 AC=177777
000104 JMP 00110 L=0 AC=177777
000110 NOP L=0 AC=177777
000111 JMP *00114 L=0 AC=177777
000113 HLT L=0 AC=177777
Imlac halted

24
pymlac/good_test_jms.trace
View File

@@ -1,24 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_jms.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 JMS 00115 L=0 AC=177777
000116 LAC 00115 L=0 AC=000101
000117 JMP *00115 L=0 AC=000101
000101 SAM 00120 L=0 AC=000101
000103 LAC 00115 L=0 AC=000101
000104 SAM 00120 L=0 AC=000101
000106 JMS *00122 L=0 AC=000101
000116 LAC 00115 L=0 AC=000107
000117 JMP *00115 L=0 AC=000107
000107 SAM 00121 L=0 AC=000107
000111 LAC 00115 L=0 AC=000107
000112 SAM 00121 L=0 AC=000107
000114 HLT L=0 AC=000107
Imlac halted

24
pymlac/good_test_lac.trace
View File

@@ -1,24 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_lac.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAC 00123 L=0 AC=000000
000101 SAM 00123 L=0 AC=000000
000103 LAC 00124 L=0 AC=000001
000104 SAM 00124 L=0 AC=000001
000106 LAC 00125 L=0 AC=177777
000107 SAM 00125 L=0 AC=177777
000111 LAC *00126 L=0 AC=000000
000112 SAM 00123 L=0 AC=000000
000114 LAC *00127 L=0 AC=000001
000115 SAM 00124 L=0 AC=000001
000117 LAC *00130 L=0 AC=177777
000120 SAM 00125 L=0 AC=177777
000122 HLT L=0 AC=177777
Imlac halted

20
pymlac/good_test_law.trace
View File

@@ -1,20 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_law.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 00000 L=0 AC=000000
000101 SAM 00115 L=0 AC=000000
000103 LAW 00001 L=0 AC=000001
000104 SAM 00116 L=0 AC=000001
000106 LAW 00002 L=0 AC=000002
000107 SAM 00117 L=0 AC=000002
000111 LAW 03777 L=0 AC=003777
000112 SAM 00120 L=0 AC=003777
000114 HLT L=0 AC=003777
Imlac halted

15
pymlac/good_test_load.trace
View File

@@ -1,15 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_load.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 CLA L=0 AC=000000
000101 LAC *00105 L=0 AC=000123
000102 SAM 00106 L=0 AC=000123
000104 HLT L=0 AC=000123
Imlac halted

20
pymlac/good_test_lwc.trace
View File

@@ -1,20 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_lwc.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LWC 00000 L=0 AC=000000
000101 SAM 00115 L=0 AC=000000
000103 LWC 00001 L=0 AC=177777
000104 SAM 00116 L=0 AC=177777
000106 LWC 00002 L=0 AC=177776
000107 SAM 00117 L=0 AC=177776
000111 LWC 03777 L=0 AC=174001
000112 SAM 00120 L=0 AC=174001
000114 HLT L=0 AC=174001
Imlac halted

46
pymlac/good_test_micro.trace
View File

@@ -1,46 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_micro.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LWC 00001 L=0 AC=177777
000101 NOP L=0 AC=177777
000102 CLA L=0 AC=000000
000103 SAM 00161 L=0 AC=000000
000105 LWC 00001 L=0 AC=177777
000106 CMA L=0 AC=000000
000107 SAM 00161 L=0 AC=000000
000111 CLA L=0 AC=000000
000112 CMA L=0 AC=177777
000113 SAM 00163 L=0 AC=177777
000115 STA L=0 AC=177777
000116 SAM 00163 L=0 AC=177777
000120 LAW 00000 L=0 AC=000000
000121 IAC L=0 AC=000001
000122 SAM 00162 L=0 AC=000001
000124 LWC 00001 L=0 AC=177777
000125 IAC L=1 AC=000000
000126 SAM 00161 L=1 AC=000000
000130 LWC 00000 L=1 AC=000000
000131 COA L=1 AC=000001
000132 SAM 00162 L=1 AC=000001
000134 CIA L=1 AC=177777
000135 SAM 00163 L=1 AC=177777
000137 CLL L=0 AC=177777
000140 LSZ L=0 AC=177777
000142 CML L=1 AC=177777
000143 LSN L=1 AC=177777
000145 CAL L=0 AC=000000
000146 SAM 00161 L=0 AC=000000
000150 LSZ L=0 AC=000000
000152 STL L=1 AC=000000
000153 LSN L=1 AC=000000
000155 ODA+CLA+CMA+IAC+CLL+CML L=0 AC=000000
000156 SAM 00161 L=0 AC=000000
000160 HLT L=0 AC=000000
Imlac halted

32
pymlac/good_test_sam.trace
View File

@@ -1,32 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_sam.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 00000 L=0 AC=000000
000101 SAM 00135 L=0 AC=000000
000103 LAW 00000 L=0 AC=000000
000104 SAM 00136 L=0 AC=000000
000105 JMP 00107 L=0 AC=000000
000107 LWC 00001 L=0 AC=177777
000110 SAM 00137 L=0 AC=177777
000112 LAW 00000 L=0 AC=000000
000113 SAM 00137 L=0 AC=000000
000114 JMP 00116 L=0 AC=000000
000116 LAW 00000 L=0 AC=000000
000117 SAM *00141 L=0 AC=000000
000121 LAW 00000 L=0 AC=000000
000122 SAM *00140 L=0 AC=000000
000123 JMP 00125 L=0 AC=000000
000125 LWC 00001 L=0 AC=177777
000126 SAM *00142 L=0 AC=177777
000130 LAW 00000 L=0 AC=000000
000131 SAM *00142 L=0 AC=000000
000132 JMP 00134 L=0 AC=000000
000134 HLT L=0 AC=000000
Imlac halted

112
pymlac/good_test_shift_rotate.trace
View File

@@ -1,112 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_shift_rotate.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 STL L=1 AC=177777
000101 LWC 00001 L=1 AC=177777
000102 SAL 00001 L=1 AC=177776
000103 SAM 00316 L=1 AC=177776
000105 LSN L=1 AC=177776
000107 CLL L=0 AC=177776
000110 LWC 00001 L=0 AC=177777
000111 SAL 00002 L=0 AC=177774
000112 SAM 00317 L=0 AC=177774
000114 LSZ L=0 AC=177774
000116 LWC 00001 L=0 AC=177777
000117 SAL 00003 L=0 AC=177770
000120 SAM 00320 L=0 AC=177770
000122 LAC 00321 L=0 AC=100001
000123 SAL 00001 L=0 AC=100002
000124 SAM 00322 L=0 AC=100002
000126 LAC 00321 L=0 AC=100001
000127 SAL 00002 L=0 AC=100004
000130 SAM 00323 L=0 AC=100004
000132 LAC 00321 L=0 AC=100001
000133 SAL 00003 L=0 AC=100010
000134 SAM 00324 L=0 AC=100010
000136 LSZ L=0 AC=100010
000140 STL L=1 AC=100010
000141 LWC 00001 L=1 AC=177777
000142 SAR 00001 L=1 AC=177777
000143 SAM 00325 L=1 AC=177777
000145 LSN L=1 AC=177777
000147 CLL L=0 AC=177777
000150 LWC 00001 L=0 AC=177777
000151 SAR 00002 L=0 AC=177777
000152 SAM 00326 L=0 AC=177777
000154 LSZ L=0 AC=177777
000156 LWC 00001 L=0 AC=177777
000157 SAR 00003 L=0 AC=177777
000160 SAM 00327 L=0 AC=177777
000162 LAC 00330 L=0 AC=077777
000163 SAR 00001 L=0 AC=037777
000164 SAM 00331 L=0 AC=037777
000166 LAC 00330 L=0 AC=077777
000167 SAR 00002 L=0 AC=017777
000170 SAM 00332 L=0 AC=017777
000172 LAC 00330 L=0 AC=077777
000173 SAR 00003 L=0 AC=007777
000174 SAM 00333 L=0 AC=007777
000176 CLL L=0 AC=007777
000177 LAC 00334 L=0 AC=100000
000200 RAR 00001 L=0 AC=040000
000201 SAM 00335 L=0 AC=040000
000203 LSZ L=0 AC=040000
000205 CLL L=0 AC=040000
000206 LAC 00334 L=0 AC=100000
000207 RAR 00002 L=0 AC=020000
000210 SAM 00336 L=0 AC=020000
000212 LSZ L=0 AC=020000
000214 CLL L=0 AC=020000
000215 LAC 00334 L=0 AC=100000
000216 RAR 00003 L=0 AC=010000
000217 SAM 00337 L=0 AC=010000
000221 LSZ L=0 AC=010000
000223 STL L=1 AC=010000
000224 LAC 00334 L=1 AC=100000
000225 RAR 00001 L=0 AC=140000
000226 SAM 00340 L=0 AC=140000
000230 LSZ L=0 AC=140000
000232 STL L=1 AC=140000
000233 LAC 00334 L=1 AC=100000
000234 RAR 00002 L=0 AC=060000
000235 SAM 00341 L=0 AC=060000
000237 LSZ L=0 AC=060000
000241 STL L=1 AC=060000
000242 LAC 00334 L=1 AC=100000
000243 RAR 00003 L=0 AC=030000
000244 SAM 00342 L=0 AC=030000
000246 LSZ L=0 AC=030000
000250 CLL L=0 AC=030000
000251 LAW 00003 L=0 AC=000003
000252 RAR 00001 L=1 AC=000001
000253 SAM 00343 L=1 AC=000001
000255 LSN L=1 AC=000001
000257 STL L=1 AC=000001
000260 LAW 00003 L=1 AC=000003
000261 RAR 00001 L=1 AC=100001
000262 SAM 00344 L=1 AC=100001
000264 LSN L=1 AC=100001
000266 CLL L=0 AC=100001
000267 LAC 00345 L=0 AC=100001
000270 RAL 00001 L=1 AC=000002
000271 SAM 00347 L=1 AC=000002
000273 LSN L=1 AC=000002
000275 STL L=1 AC=000002
000276 LAC 00345 L=1 AC=100001
000277 RAL 00001 L=1 AC=000003
000300 SAM 00350 L=1 AC=000003
000302 LSN L=1 AC=000003
000304 STL L=1 AC=000003
000305 LAC 00346 L=1 AC=000001
000306 RAL 00001 L=0 AC=000003
000307 SAM 00350 L=0 AC=000003
000311 LSZ L=0 AC=000003
000313 HLT L=0 AC=000003
Imlac halted

12
pymlac/good_test_smallest.trace
View File

@@ -1,12 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_smallest.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 HLT L=0 AC=177777
Imlac halted

50
pymlac/good_test_sub.trace
View File

@@ -1,50 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_sub.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 00000 L=0 AC=000000
000101 SUB 00165 L=0 AC=000000
000102 SAM 00165 L=0 AC=000000
000104 LAW 00001 L=0 AC=000001
000105 SUB 00165 L=0 AC=000001
000106 SAM 00166 L=0 AC=000001
000110 LAW 00001 L=0 AC=000001
000111 SUB 00166 L=0 AC=000000
000112 SAM 00165 L=0 AC=000000
000114 CLL L=0 AC=000000
000115 LAW 00000 L=0 AC=000000
000116 SUB 00166 L=1 AC=177777
000117 SAM 00167 L=1 AC=177777
000121 LSN L=1 AC=177777
000123 STL L=1 AC=177777
000124 LAW 00000 L=1 AC=000000
000125 SUB 00166 L=0 AC=177777
000126 SAM 00167 L=0 AC=177777
000130 LSZ L=0 AC=177777
000132 LAW 00000 L=0 AC=000000
000133 SUB *00171 L=0 AC=000000
000134 SAM 00165 L=0 AC=000000
000136 LAW 00001 L=0 AC=000001
000137 SUB *00171 L=0 AC=000001
000140 SAM 00166 L=0 AC=000001
000142 LAW 00001 L=0 AC=000001
000143 SUB *00170 L=0 AC=000000
000144 SAM 00165 L=0 AC=000000
000146 CLL L=0 AC=000000
000147 LAW 00000 L=0 AC=000000
000150 SUB *00170 L=1 AC=177777
000151 SAM 00167 L=1 AC=177777
000153 LSN L=1 AC=177777
000155 STL L=1 AC=177777
000156 LAW 00000 L=1 AC=000000
000157 SUB *00170 L=0 AC=177777
000160 SAM 00167 L=0 AC=177777
000162 LSZ L=0 AC=177777
000164 HLT L=0 AC=177777
Imlac halted

30
pymlac/good_test_xam.trace
View File

@@ -1,30 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_xam.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 STL L=1 AC=177777
000101 LAW 00000 L=1 AC=000000
000102 DAC 00131 L=1 AC=000000
000103 LWC 00001 L=1 AC=177777
000104 XAM 00131 L=1 AC=000000
000105 SAM 00132 L=1 AC=000000
000107 LSN L=1 AC=000000
000111 LWC 00001 L=1 AC=177777
000112 SAM 00131 L=1 AC=177777
000114 CLL L=0 AC=177777
000115 LAW 00000 L=0 AC=000000
000116 DAC 00131 L=0 AC=000000
000117 LWC 00001 L=0 AC=177777
000120 XAM *00131 L=0 AC=000000
000121 SAM 00132 L=0 AC=000000
000123 LSZ L=0 AC=000000
000125 LWC 00001 L=0 AC=177777
000126 SAM 00131 L=0 AC=177777
000130 HLT L=0 AC=177777
Imlac halted

36
pymlac/good_test_xor.trace
View File

@@ -1,36 +0,0 @@
pymlac pymlac 0.1 trace
Bootstrap ROM set to PTR
File 'test_xor.ptp' mounted on PTR
Running from address 000040
Imlac halted
Trace set to (000100, None)
Running from address 000100
DPC Display PC Main Regs
------ ------------- ------ -------------- -----------------------
000100 LAW 00000 L=0 AC=000000
000101 XOR 00142 L=0 AC=000001
000102 SAM 00142 L=0 AC=000001
000104 LAW 00001 L=0 AC=000001
000105 XOR 00142 L=0 AC=000000
000106 SAM 00141 L=0 AC=000000
000110 LAW 00001 L=0 AC=000001
000111 XOR 00141 L=0 AC=000001
000112 SAM 00142 L=0 AC=000001
000114 LAC 00143 L=0 AC=177777
000115 XOR 00142 L=0 AC=177776
000116 SAM 00145 L=0 AC=177776
000120 LAW 00000 L=0 AC=000000
000121 XOR *00147 L=0 AC=000001
000122 SAM 00142 L=0 AC=000001
000124 LAW 00001 L=0 AC=000001
000125 XOR *00147 L=0 AC=000000
000126 SAM 00141 L=0 AC=000000
000130 LAW 00001 L=0 AC=000001
000131 XOR *00146 L=0 AC=000001
000132 SAM 00142 L=0 AC=000001
000134 LAC 00143 L=0 AC=177777
000135 XOR *00147 L=0 AC=177776
000136 SAM 00145 L=0 AC=177776
000140 HLT L=0 AC=177776
Imlac halted