1
0
mirror of https://github.com/rzzzwilson/pymlac.git synced 2025-06-10 09:32:41 +00:00
Commit Graph

178 Commits

Author SHA1 Message Date
Ross Wilson
b252f53cb3 Implemented 'cmpmem' DSL command 2016-03-13 15:29:53 +07:00
Ross Wilson
d58d2974d5 Last test still not working 2016-03-13 15:28:27 +07:00
Ross Wilson
024ae45504 Finalize tracing for both PTR/TTY cases 2016-03-13 11:16:30 +07:00
Ross Wilson
228d13db63 Remove old code, finalize bootstrap code 2016-03-13 11:12:39 +07:00
Ross Wilson
5926eff0ed Cleaning up test cases 2016-03-13 10:23:33 +07:00
Ross Wilson
b151570fe3 Removed logging 2016-03-13 10:18:07 +07:00
Ross Wilson
4f8d416e09 PTR dumpmem test now completes without error 2016-03-12 16:30:46 +07:00
Ross Wilson
f49e9e1fce Turned OFF logging for TtyIn 2016-03-12 16:02:50 +07:00
Ross Wilson
56bbd98194 Added high-level logginh 2016-03-12 16:00:59 +07:00
Ross Wilson
30e245fd66 Test dumpmem_test_c8lds.ptp both TTY/PTR 2016-03-12 15:32:12 +07:00
Ross Wilson
6df5849406 Test both PTR and TTY scenarios 2016-03-12 15:29:58 +07:00
Ross Wilson
19fe917c15 Fixed spelling error 2016-03-12 15:29:22 +07:00
Ross Wilson
c07a4f3ea5 Better format dump, handle ttyin device 2016-03-12 15:28:50 +07:00
Ross Wilson
5aea17a41d Ignore *.dump files 2016-03-12 15:27:56 +07:00
Ross Wilson
6f6715b66b Better logging for TtyIn device 2016-03-12 15:27:22 +07:00
Ross Wilson
8153fd86ac Better example, smaller range, halts 2016-03-12 15:26:25 +07:00
Ross Wilson
e6a0acf574 Removed old code 2016-03-12 11:31:56 +07:00
Ross Wilson
8a1b6b5f61 Added PTR+TTY c8lds cases 2016-03-12 11:31:02 +07:00
Ross Wilson
081882dbaf Changes for ambidextrous bloader 2016-03-12 11:07:52 +07:00
Ross Wilson
ee7d6e5f69 Remove debug logging 2016-03-12 11:07:08 +07:00
Ross Wilson
8ce9cdb2bc Remove debug logging 2016-03-12 11:05:22 +07:00
Ross Wilson
fd1dc1c833 lc16sd bug is because lc16sd blockloader is a TTY blockloader 2016-03-11 19:34:02 +07:00
Ross Wilson
240b88263b Debugging lc16sd bootstrap+blockloader 2016-03-10 17:41:44 +07:00
Ross Wilson
37d3cbbe72 Nonsensical bootstrap disassemblies 2016-03-10 17:01:36 +07:00
Ross Wilson
0f7a84b201 Disassembly of bootstraps from docs/PNG 2016-03-10 17:00:07 +07:00
Ross Wilson
8880144605 Removed debug HLT at bootstrap end 2016-03-10 16:57:50 +07:00
Ross Wilson
8e2e2468ce Better formatting 2016-03-09 16:24:04 +07:00
Ross Wilson
b81021931e Dumped PTR bootstrap for debugging 2016-03-08 12:25:12 +07:00
Ross Wilson
b15e8c59ce Fixed bug where self.offset not defined 2016-03-05 13:03:36 +07:00
Ross Wilson
2cca1fbb69 For debug, stopped bootstrap running blockloadr 2016-03-05 13:03:03 +07:00
Ross Wilson
7c30d52953 Debug changes 2016-03-05 13:02:24 +07:00
Ross Wilson
793265d22c Fixed LWC code 2016-03-05 13:01:57 +07:00
Ross Wilson
d37fc2d7e8 Reflect changes in LWC code 2016-03-05 12:29:25 +07:00
Ross Wilson
f9cfa17e60 Further testing 2016-03-04 16:40:17 +07:00
Ross Wilson
f6ddcf0772 More debug and testing 2016-03-03 23:19:14 +07:00
Ross Wilson
614bd2d226 Do full TTY load test 2016-03-03 20:51:14 +07:00
Ross Wilson
9f6a1f0d97 Add second ORG block for debug 2016-03-03 20:44:34 +07:00
Ross Wilson
4b4b0a9369 Add logging for debug 2016-03-03 20:44:01 +07:00
Ross Wilson
1a4f601964 Add special ROM code for testing 2016-03-03 20:43:22 +07:00
Ross Wilson
ae453b350c Add trace, turn off DISPLAY stuff 2016-03-03 20:42:43 +07:00
Ross Wilson
8271db3b86 Fixed handling of TtyIn device 2016-03-02 19:55:03 +07:00
Ross Wilson
f4e74140ec Test lc16sd blockloader 2016-03-02 12:00:31 +07:00
Ross Wilson
9be7aa869a New disassembled code fragments 2016-03-01 15:10:09 +07:00
Ross Wilson
ee9660384e Removed debug, improved 'dumpmem' file format 2016-02-29 15:42:09 +07:00
Ross Wilson
115bff6c90 Removed debug 2016-02-29 15:41:20 +07:00
Ross Wilson
65470f0bcb Final form of pymlac test 2016-02-29 15:40:36 +07:00
Ross Wilson
5def9fb012 Removed all debug prints 2016-02-29 15:40:09 +07:00
Ross Wilson
125848db7e Removed all debug prints 2016-02-29 15:39:39 +07:00
Ross Wilson
925f818fc5 Final form of test 2016-02-29 15:39:06 +07:00
Ross Wilson
176b507dc1 Testing PTR ROM code 2016-02-28 12:11:14 +07:00