mirror of
https://github.com/simh/simh.git
synced 2026-02-26 16:54:22 +00:00
Various simulators: Set line endings to CRLF for consistency, remove stray tabs
Project standard source code has tabs converted to spaces and CRLF line endings
This commit is contained in:
@@ -1168,7 +1168,7 @@ static void ha_cmd(uint8 op, uint8 subdev, uint32 addr, int32 len, t_bool expres
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void ha_ctrl(uint8 tc)
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{
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volatile t_bool txn_done;
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uint32 i, j;
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uint32 i, j;
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uint32 plen, ha_ptr;
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uint32 in_len, out_len;
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uint8 lu, status;
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@@ -1252,7 +1252,7 @@ void vt_receive()
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* <enter>HYC<enter> needs to be typed
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* to re-initialize the line
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*/
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TTY_IN |= mask; /* "long start" */
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TTY_IN |= mask; /* "long start" */
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break;
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}
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switch (tty_unit[num].flags & TTY_CHARSET_MASK) {
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@@ -1363,12 +1363,12 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
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chk -= addr >> 8;
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for (i=0; i<HLEN; i++) {
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byte = get_mbyte(addr + i);
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fprintf(fileref, "%02X", byte & BYTEMASK);
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fprintf(fileref, "%02X", byte & BYTEMASK);
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chk -= byte; chk &= BYTEMASK;
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cnt++;
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}
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fprintf(fileref,"%02X\n", chk & BYTEMASK);
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addr += HLEN;
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addr += HLEN;
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}
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if(addr < end) { //last record
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fprintf(fileref, ":%02X%04X00", end - addr, addr);
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@@ -1378,12 +1378,12 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
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chk -= addr >> 8;
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for (i=0; i<=(end - addr); i++) {
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byte = get_mbyte(addr + i);
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fprintf(fileref, "%02X", byte & BYTEMASK);
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fprintf(fileref, "%02X", byte & BYTEMASK);
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chk -= byte; chk &= BYTEMASK;
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cnt++;
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}
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fprintf(fileref, "%02X\n", chk);
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addr = end;
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addr = end;
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}
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fprintf(fileref,":00000001FF\n"); //EOF record
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} else { //binary
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598
NOVA/nova_pt.c
598
NOVA/nova_pt.c
@@ -1,299 +1,299 @@
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/* nova_pt.c: NOVA paper tape read/punch simulator
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Copyright (c) 1993-2016, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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||||
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Except as contained in this notice, the name of Robert M Supnik shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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ptr paper tape reader
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ptp paper tape punch
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13-May-16 RMS Lengthened wait time for DCC BASIC timing error
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28-Mar-15 RMS Revised to use sim_printf
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04-Jul-07 BKR added PTR and PTP device DISABLE capability,
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added 7B/8B support PTR and PTP (default is 8B),
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DEV_SET/CLR macros now used,
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PTR and PTP can now be DISABLED
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25-Apr-03 RMS Revised for extended file support
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03-Oct-02 RMS Added DIBs
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30-May-02 RMS Widened POS to 32b
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29-Nov-01 RMS Added read only unit support
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Notes:
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- data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits
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- register TIME is the delay between character read or write operations
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- register POS show the number of characters read from or sent to the PTR or PTP
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- register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted
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*/
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#include "nova_defs.h"
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extern int32 int_req, dev_busy, dev_done, dev_disable ;
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extern int32 SR ;
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extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ;
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int32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
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int32 ptr (int32 pulse, int32 code, int32 AC);
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int32 ptp (int32 pulse, int32 code, int32 AC);
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t_stat ptr_svc (UNIT *uptr);
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t_stat ptp_svc (UNIT *uptr);
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t_stat ptr_reset (DEVICE *dptr);
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t_stat ptp_reset (DEVICE *dptr);
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t_stat ptr_boot (int32 unitno, DEVICE *dptr);
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/* 7 or 8 bit data mask support for either device */
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#define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */
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#define UNIT_8B (1 << UNIT_V_8B)
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/* PTR data structures
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ptr_dev PTR device descriptor
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ptr_unit PTR unit descriptor
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ptr_reg PTR register list
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*/
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DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };
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UNIT ptr_unit = { /* 2007-May-30, bkr */
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UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0), 300
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};
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REG ptr_reg[] = {
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{ ORDATA (BUF, ptr_unit.buf, 8) },
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{ FLDATA (BUSY, dev_busy, INT_V_PTR) },
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{ FLDATA (DONE, dev_done, INT_V_PTR) },
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{ FLDATA (DISABLE, dev_disable, INT_V_PTR) },
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{ FLDATA (INT, int_req, INT_V_PTR) },
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{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
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{ NULL }
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};
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MTAB ptr_mod[] = /* 2007-May-30, bkr */
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{
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{ UNIT_8B, 0, "7b", "7B", NULL },
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{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
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{ 0, 0, NULL, NULL, NULL }
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} ;
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DEVICE ptr_dev = {
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"PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptr_reset,
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&ptr_boot, NULL, NULL,
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&ptr_dib, DEV_DISABLE /* 2007-May-30, bkr */
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};
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/* PTP data structures
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ptp_dev PTP device descriptor
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ptp_unit PTP unit descriptor
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ptp_reg PTP register list
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*/
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DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };
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UNIT ptp_unit =
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{
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UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT
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};
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REG ptp_reg[] = {
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{ ORDATA (BUF, ptp_unit.buf, 8) },
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{ FLDATA (BUSY, dev_busy, INT_V_PTP) },
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{ FLDATA (DONE, dev_done, INT_V_PTP) },
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{ FLDATA (DISABLE, dev_disable, INT_V_PTP) },
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{ FLDATA (INT, int_req, INT_V_PTP) },
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{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
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{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
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{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
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{ NULL }
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};
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MTAB ptp_mod[] =
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{
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{ UNIT_8B, 0, "7b", "7B", NULL },
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{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
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{ 0, 0, NULL, NULL, NULL }
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} ;
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DEVICE ptp_dev =
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{
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"PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptp_reset,
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NULL, NULL, NULL,
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&ptp_dib, DEV_DISABLE /* 2007-May-30, bkr */
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};
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/* Paper tape reader: IOT routine */
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int32 ptr (int32 pulse, int32 code, int32 AC)
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{
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int32 iodata;
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iodata = (code == ioDIA)?
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ptr_unit.buf & 0377
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: 0;
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switch (pulse)
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{ /* decode IR<8:9> */
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case iopS: /* start */
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DEV_SET_BUSY( INT_PTR ) ;
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DEV_CLR_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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sim_activate (&ptr_unit, ptr_unit.wait); /* activate unit */
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break;
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case iopC: /* clear */
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DEV_CLR_BUSY( INT_PTR ) ;
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DEV_CLR_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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sim_cancel (&ptr_unit); /* deactivate unit */
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break;
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} /* end switch */
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return iodata;
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}
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/* Unit service */
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t_stat ptr_svc (UNIT *uptr)
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{
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int32 temp;
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if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptr_stopioe, SCPE_UNATT);
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if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
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if (feof (ptr_unit.fileref)) {
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if (ptr_stopioe)
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sim_printf ("PTR end of file\n");
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else return SCPE_OK;
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}
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else sim_perror ("PTR I/O error");
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clearerr (ptr_unit.fileref);
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return SCPE_IOERR;
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}
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DEV_CLR_BUSY( INT_PTR ) ;
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DEV_SET_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);
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++(ptr_unit.pos);
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat ptr_reset (DEVICE *dptr)
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{
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ptr_unit.buf = 0; /* <not DG compatible> */
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DEV_CLR_BUSY( INT_PTR ) ;
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DEV_CLR_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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sim_cancel (&ptr_unit); /* deactivate unit */
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return SCPE_OK;
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}
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/* Boot routine */
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t_stat ptr_boot (int32 unitno, DEVICE *dptr)
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{
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ptr_reset( dptr ) ;
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/* set position to 0? */
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cpu_boot( unitno, dptr ) ;
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SR = /* low-speed: no high-order bit set */ DEV_PTR ;
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return ( SCPE_OK );
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} /* end of 'ptr_boot' */
|
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|
||||
|
||||
|
||||
|
||||
|
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/* Paper tape punch: IOT routine */
|
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|
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int32 ptp (int32 pulse, int32 code, int32 AC)
|
||||
{
|
||||
if (code == ioDOA)
|
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ptp_unit.buf = AC & 0377;
|
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|
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switch (pulse)
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{ /* decode IR<8:9> */
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case iopS: /* start */
|
||||
DEV_SET_BUSY( INT_PTP ) ;
|
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DEV_CLR_DONE( INT_PTP ) ;
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DEV_UPDATE_INTR ;
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sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */
|
||||
break;
|
||||
|
||||
case iopC: /* clear */
|
||||
DEV_CLR_BUSY( INT_PTP ) ;
|
||||
DEV_CLR_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
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sim_cancel (&ptp_unit); /* deactivate unit */
|
||||
break;
|
||||
} /* end switch */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* Unit service */
|
||||
|
||||
t_stat ptp_svc (UNIT *uptr)
|
||||
{
|
||||
DEV_CLR_BUSY( INT_PTP ) ;
|
||||
DEV_SET_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
if ((ptp_unit.flags & UNIT_ATT) == 0) /* attached? */
|
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return IORETURN (ptp_stopioe, SCPE_UNATT);
|
||||
if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {
|
||||
sim_perror ("PTP I/O error");
|
||||
clearerr (ptp_unit.fileref);
|
||||
return SCPE_IOERR;
|
||||
}
|
||||
++(ptp_unit.pos);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Reset routine */
|
||||
|
||||
t_stat ptp_reset (DEVICE *dptr)
|
||||
{
|
||||
ptp_unit.buf = 0; /* <not DG compatible> */
|
||||
DEV_CLR_BUSY( INT_PTP ) ;
|
||||
DEV_CLR_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_cancel (&ptp_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
/* nova_pt.c: NOVA paper tape read/punch simulator
|
||||
|
||||
Copyright (c) 1993-2016, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
Except as contained in this notice, the name of Robert M Supnik shall not be
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
ptr paper tape reader
|
||||
ptp paper tape punch
|
||||
|
||||
13-May-16 RMS Lengthened wait time for DCC BASIC timing error
|
||||
28-Mar-15 RMS Revised to use sim_printf
|
||||
04-Jul-07 BKR added PTR and PTP device DISABLE capability,
|
||||
added 7B/8B support PTR and PTP (default is 8B),
|
||||
DEV_SET/CLR macros now used,
|
||||
PTR and PTP can now be DISABLED
|
||||
25-Apr-03 RMS Revised for extended file support
|
||||
03-Oct-02 RMS Added DIBs
|
||||
30-May-02 RMS Widened POS to 32b
|
||||
29-Nov-01 RMS Added read only unit support
|
||||
|
||||
|
||||
Notes:
|
||||
- data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits
|
||||
- register TIME is the delay between character read or write operations
|
||||
- register POS show the number of characters read from or sent to the PTR or PTP
|
||||
- register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted
|
||||
*/
|
||||
|
||||
#include "nova_defs.h"
|
||||
|
||||
extern int32 int_req, dev_busy, dev_done, dev_disable ;
|
||||
extern int32 SR ;
|
||||
|
||||
extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ;
|
||||
|
||||
|
||||
int32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
|
||||
|
||||
int32 ptr (int32 pulse, int32 code, int32 AC);
|
||||
int32 ptp (int32 pulse, int32 code, int32 AC);
|
||||
t_stat ptr_svc (UNIT *uptr);
|
||||
t_stat ptp_svc (UNIT *uptr);
|
||||
t_stat ptr_reset (DEVICE *dptr);
|
||||
t_stat ptp_reset (DEVICE *dptr);
|
||||
t_stat ptr_boot (int32 unitno, DEVICE *dptr);
|
||||
|
||||
|
||||
/* 7 or 8 bit data mask support for either device */
|
||||
|
||||
#define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */
|
||||
#define UNIT_8B (1 << UNIT_V_8B)
|
||||
|
||||
|
||||
/* PTR data structures
|
||||
|
||||
ptr_dev PTR device descriptor
|
||||
ptr_unit PTR unit descriptor
|
||||
ptr_reg PTR register list
|
||||
*/
|
||||
|
||||
DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };
|
||||
|
||||
UNIT ptr_unit = { /* 2007-May-30, bkr */
|
||||
UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0), 300
|
||||
};
|
||||
|
||||
REG ptr_reg[] = {
|
||||
{ ORDATA (BUF, ptr_unit.buf, 8) },
|
||||
{ FLDATA (BUSY, dev_busy, INT_V_PTR) },
|
||||
{ FLDATA (DONE, dev_done, INT_V_PTR) },
|
||||
{ FLDATA (DISABLE, dev_disable, INT_V_PTR) },
|
||||
{ FLDATA (INT, int_req, INT_V_PTR) },
|
||||
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
|
||||
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
MTAB ptr_mod[] = /* 2007-May-30, bkr */
|
||||
{
|
||||
{ UNIT_8B, 0, "7b", "7B", NULL },
|
||||
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
|
||||
{ 0, 0, NULL, NULL, NULL }
|
||||
} ;
|
||||
|
||||
DEVICE ptr_dev = {
|
||||
"PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,
|
||||
1, 10, 31, 1, 8, 8,
|
||||
NULL, NULL, &ptr_reset,
|
||||
&ptr_boot, NULL, NULL,
|
||||
&ptr_dib, DEV_DISABLE /* 2007-May-30, bkr */
|
||||
};
|
||||
|
||||
/* PTP data structures
|
||||
|
||||
ptp_dev PTP device descriptor
|
||||
ptp_unit PTP unit descriptor
|
||||
ptp_reg PTP register list
|
||||
*/
|
||||
|
||||
DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };
|
||||
|
||||
UNIT ptp_unit =
|
||||
{
|
||||
UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT
|
||||
};
|
||||
|
||||
REG ptp_reg[] = {
|
||||
{ ORDATA (BUF, ptp_unit.buf, 8) },
|
||||
{ FLDATA (BUSY, dev_busy, INT_V_PTP) },
|
||||
{ FLDATA (DONE, dev_done, INT_V_PTP) },
|
||||
{ FLDATA (DISABLE, dev_disable, INT_V_PTP) },
|
||||
{ FLDATA (INT, int_req, INT_V_PTP) },
|
||||
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
|
||||
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
MTAB ptp_mod[] =
|
||||
{
|
||||
{ UNIT_8B, 0, "7b", "7B", NULL },
|
||||
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
|
||||
{ 0, 0, NULL, NULL, NULL }
|
||||
} ;
|
||||
|
||||
DEVICE ptp_dev =
|
||||
{
|
||||
"PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,
|
||||
1, 10, 31, 1, 8, 8,
|
||||
NULL, NULL, &ptp_reset,
|
||||
NULL, NULL, NULL,
|
||||
&ptp_dib, DEV_DISABLE /* 2007-May-30, bkr */
|
||||
};
|
||||
|
||||
|
||||
/* Paper tape reader: IOT routine */
|
||||
|
||||
int32 ptr (int32 pulse, int32 code, int32 AC)
|
||||
{
|
||||
int32 iodata;
|
||||
|
||||
iodata = (code == ioDIA)?
|
||||
ptr_unit.buf & 0377
|
||||
: 0;
|
||||
switch (pulse)
|
||||
{ /* decode IR<8:9> */
|
||||
case iopS: /* start */
|
||||
DEV_SET_BUSY( INT_PTR ) ;
|
||||
DEV_CLR_DONE( INT_PTR ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_activate (&ptr_unit, ptr_unit.wait); /* activate unit */
|
||||
break;
|
||||
|
||||
case iopC: /* clear */
|
||||
DEV_CLR_BUSY( INT_PTR ) ;
|
||||
DEV_CLR_DONE( INT_PTR ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_cancel (&ptr_unit); /* deactivate unit */
|
||||
break;
|
||||
} /* end switch */
|
||||
|
||||
return iodata;
|
||||
}
|
||||
|
||||
|
||||
/* Unit service */
|
||||
|
||||
t_stat ptr_svc (UNIT *uptr)
|
||||
{
|
||||
int32 temp;
|
||||
|
||||
if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||||
return IORETURN (ptr_stopioe, SCPE_UNATT);
|
||||
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
|
||||
if (feof (ptr_unit.fileref)) {
|
||||
if (ptr_stopioe)
|
||||
sim_printf ("PTR end of file\n");
|
||||
else return SCPE_OK;
|
||||
}
|
||||
else sim_perror ("PTR I/O error");
|
||||
clearerr (ptr_unit.fileref);
|
||||
return SCPE_IOERR;
|
||||
}
|
||||
|
||||
DEV_CLR_BUSY( INT_PTR ) ;
|
||||
DEV_SET_DONE( INT_PTR ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);
|
||||
++(ptr_unit.pos);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Reset routine */
|
||||
|
||||
t_stat ptr_reset (DEVICE *dptr)
|
||||
{
|
||||
ptr_unit.buf = 0; /* <not DG compatible> */
|
||||
DEV_CLR_BUSY( INT_PTR ) ;
|
||||
DEV_CLR_DONE( INT_PTR ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_cancel (&ptr_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Boot routine */
|
||||
|
||||
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
|
||||
{
|
||||
ptr_reset( dptr ) ;
|
||||
/* set position to 0? */
|
||||
cpu_boot( unitno, dptr ) ;
|
||||
SR = /* low-speed: no high-order bit set */ DEV_PTR ;
|
||||
return ( SCPE_OK );
|
||||
} /* end of 'ptr_boot' */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* Paper tape punch: IOT routine */
|
||||
|
||||
int32 ptp (int32 pulse, int32 code, int32 AC)
|
||||
{
|
||||
if (code == ioDOA)
|
||||
ptp_unit.buf = AC & 0377;
|
||||
|
||||
switch (pulse)
|
||||
{ /* decode IR<8:9> */
|
||||
case iopS: /* start */
|
||||
DEV_SET_BUSY( INT_PTP ) ;
|
||||
DEV_CLR_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */
|
||||
break;
|
||||
|
||||
case iopC: /* clear */
|
||||
DEV_CLR_BUSY( INT_PTP ) ;
|
||||
DEV_CLR_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_cancel (&ptp_unit); /* deactivate unit */
|
||||
break;
|
||||
} /* end switch */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* Unit service */
|
||||
|
||||
t_stat ptp_svc (UNIT *uptr)
|
||||
{
|
||||
DEV_CLR_BUSY( INT_PTP ) ;
|
||||
DEV_SET_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
if ((ptp_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||||
return IORETURN (ptp_stopioe, SCPE_UNATT);
|
||||
if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {
|
||||
sim_perror ("PTP I/O error");
|
||||
clearerr (ptp_unit.fileref);
|
||||
return SCPE_IOERR;
|
||||
}
|
||||
++(ptp_unit.pos);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
||||
/* Reset routine */
|
||||
|
||||
t_stat ptp_reset (DEVICE *dptr)
|
||||
{
|
||||
ptp_unit.buf = 0; /* <not DG compatible> */
|
||||
DEV_CLR_BUSY( INT_PTP ) ;
|
||||
DEV_CLR_DONE( INT_PTP ) ;
|
||||
DEV_UPDATE_INTR ;
|
||||
sim_cancel (&ptp_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
@@ -90,4 +90,4 @@
|
||||
#define UNIT_MODE_TEST (1 << UNIT_V_MODE)
|
||||
|
||||
|
||||
#endif /* TX0_DEFS_H_ */
|
||||
#endif /* TX0_DEFS_H_ */
|
||||
|
||||
@@ -97,7 +97,7 @@ iii_draw_line(int x1, int y1, int x2, int y2, int l)
|
||||
if (dy == 0) {
|
||||
for (i = 1; i < dx; i++) {
|
||||
display_point(x1, y1, l, 0);
|
||||
x1+=ax;
|
||||
x1+=ax;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
8
scp.c
8
scp.c
@@ -6853,10 +6853,10 @@ if (vdelt) {
|
||||
if (1) {
|
||||
char mode[] = S_xstr(SIM_VERSION_MODE);
|
||||
|
||||
if (NULL != strchr (mode, '\"')) { /* Quoted String? */
|
||||
mode[strlen (mode) - 1] = '\0'; /* strip quotes */
|
||||
memmove (mode, mode + 1, strlen (mode));
|
||||
}
|
||||
if (NULL != strchr (mode, '\"')) { /* Quoted String? */
|
||||
mode[strlen (mode) - 1] = '\0'; /* strip quotes */
|
||||
memmove (mode, mode + 1, strlen (mode));
|
||||
}
|
||||
fprintf (st, " %s", mode);
|
||||
setenv ("SIM_VERSION_MODE", mode, 1);
|
||||
}
|
||||
|
||||
@@ -2050,13 +2050,13 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
|
||||
chk += addr >> 8;
|
||||
for (i=0; i<HLEN; i++) {
|
||||
byte = CPU_BD_get_mbyte(addr + i);
|
||||
fprintf(fileref, "%02X", byte);
|
||||
fprintf(fileref, "%02X", byte);
|
||||
chk += byte; chk &= BYTEMASK;
|
||||
cnt++;
|
||||
}
|
||||
chk = (~chk) & BYTEMASK;
|
||||
fprintf(fileref,"%02X\n", chk);
|
||||
addr += HLEN;
|
||||
addr += HLEN;
|
||||
}
|
||||
if(addr < end) { //last record
|
||||
fprintf(fileref, "S1%02X%04X", end - addr + 3, addr);
|
||||
@@ -2066,13 +2066,13 @@ int32 sim_load(FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
|
||||
chk += addr >> 8;
|
||||
for (i=0; i<=(end - addr); i++) {
|
||||
byte = CPU_BD_get_mbyte(addr + i);
|
||||
fprintf(fileref, "%02X", byte);
|
||||
fprintf(fileref, "%02X", byte);
|
||||
chk += byte; chk &= BYTEMASK;
|
||||
cnt++;
|
||||
}
|
||||
chk = (~chk) & BYTEMASK;
|
||||
fprintf(fileref, "%02X\n", chk);
|
||||
addr = end;
|
||||
addr = end;
|
||||
}
|
||||
fprintf(fileref,"S9\n"); //EOF record
|
||||
} else { //binary
|
||||
|
||||
@@ -335,23 +335,23 @@ int32 sio0d(int32 io, int32 data)
|
||||
case 0x11: // PTR on
|
||||
ptr_flag = 1;
|
||||
ptr_unit.u3 |= RXF;
|
||||
printf("Reader on\n");
|
||||
printf("Reader on\n");
|
||||
break;
|
||||
case 0x12: // PTP on
|
||||
ptp_flag = 1;
|
||||
ptp_unit.u3 |= TXE;
|
||||
printf("Punch on\n");
|
||||
printf("Punch on\n");
|
||||
break;
|
||||
case 0x13: // PTR off
|
||||
ptr_flag = 0;
|
||||
if (ptr_unit.pos)
|
||||
printf("Reader off-%d bytes read\n", ptr_unit.pos);
|
||||
printf("Reader off-%d bytes read\n", ptr_unit.pos);
|
||||
ptr_unit.pos = 0;
|
||||
break;
|
||||
case 0x14: // PTP off
|
||||
ptp_flag = 0;
|
||||
if (ptp_unit.pos)
|
||||
printf("Punch off-%d bytes written\n", ptp_unit.pos);
|
||||
printf("Punch off-%d bytes written\n", ptp_unit.pos);
|
||||
ptp_unit.pos = 0;
|
||||
break;
|
||||
default: // ignore all other characters
|
||||
|
||||
@@ -63,7 +63,7 @@ int dpy_quit = FALSE;
|
||||
4000
|
||||
6000
|
||||
|
||||
tv-off tv-off-const 1 001 (unused)
|
||||
tv-off tv-off-const 1 001 (unused)
|
||||
tv-green-const 2 010 (unused)
|
||||
|
||||
tv-blank green-blank-const 4 100 (flash)
|
||||
|
||||
@@ -1,99 +1,99 @@
|
||||
/* tt2500_cpu.c: TT2500 bootstrap ROM contents.
|
||||
|
||||
Copyright (c) 2020, Lars Brinkhoff
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
LARS BRINKHOFF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
Except as contained in this notice, the name of Lars Brinkhoff shall not be
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Lars Brinkhoff.
|
||||
*/
|
||||
|
||||
#include "tt2500_defs.h"
|
||||
|
||||
uint16 tt2500_rom[] =
|
||||
{
|
||||
/* BEGIN 0 */ 0010000, /* (NOP) */
|
||||
/* 1 */ 0010000, /* (NOP) */
|
||||
/* 2 */ 0010000, /* (NOP) */
|
||||
/* START 3 */ 0040025, /* (PUSHJ GETC & GET CHAR) */
|
||||
/* 4 */ 0007001, /* (SUBI 0 WD & IS WORD "LOGO") */
|
||||
/* 5 */ 0147577, /* (147577) */
|
||||
/* 6 */ 0133774, /* (BNE START) */
|
||||
/* 7 */ 0040022, /* (PUSHJ GETW) */
|
||||
/* 10 */ 0074201, /* (GET ADR WD) */
|
||||
/* 11 */ 0040022, /* (PUSHJ GETW) */
|
||||
/* 12 */ 0074301, /* (GET CNT WD) */
|
||||
/* LOOP 13 */ 0040022, /* (PUSHJ GETW) */
|
||||
/* 14 */ 0004220, /* (DEC ADR) */
|
||||
/* 15 */ 0025100, /* (CWRITE WD) */
|
||||
/* 16 */ 0004320, /* (DEC CNT) */
|
||||
/* 17 */ 0133773, /* (BNE LOOP) */
|
||||
/* 20 */ 0074023, /* (GET 0 XR) */
|
||||
/* 21 */ 0050100, /* (JUMP 100) */
|
||||
/* GETW 22 */ 0040025, /* (PUSHJ GETC) */
|
||||
/* 23 */ 0040025, /* (PUSHJ GETC) */
|
||||
/* 24 */ 0040025, /* (PUSHJ GETC) */
|
||||
/* GETC 25 */ 0073320, /* (DIS INTS 2) */
|
||||
/* 26 */ 0050025, /* (JUMP GETC) */
|
||||
/* 27 */ 0010000, /* (NOP) */
|
||||
/* 30 */ 0074424, /* (GET CH UART) */
|
||||
/* 31 */ 0001444, /* (ANDI CH CH) */
|
||||
/* 32 */ 0000017, /* (17) */
|
||||
/* 33 */ 0004114, /* (ROT WD 14) */
|
||||
/* 34 */ 0001141, /* (ANDI WD WD) */
|
||||
/* 35 */ 0177760, /* (177760) */
|
||||
/* 36 */ 0002104, /* (IOR WD CH) */
|
||||
/* 37 */ 0076016 /* (POPJ) */
|
||||
|
||||
|
||||
#if 0
|
||||
0010000, /* NOP */
|
||||
0010000, /* NOP */
|
||||
0010000, /* NOP */
|
||||
0040025, /* PUSHJ GETC Call subroutine to read TTY character. */
|
||||
0007001, /* SUBI 0 WD 32-bit instruction computes 147577 - WD */
|
||||
0147577, /* 147577 (The constant "LOGO" is stored here.) */
|
||||
0133774, /* BNE START Branch to START if result Not zero. */
|
||||
0040022, /* PUSHJ GETW Reads 4 characters to make 16-bit word. */
|
||||
0074201, /* GET ADR WD Move word from WD to ADR (register 2). */
|
||||
0040022, /* PUSHJ GETW Get next data word into WD. */
|
||||
0074301, /* GET CNT WD Move it to CNT. */
|
||||
0040022, /* PUSHJ GETW Get another data word. */
|
||||
0004220, /* DEC ADR Decrement the Address and use it to */
|
||||
0025100, /* CWRITE WD write [WD] into control memory. */
|
||||
0004320, /* DEC CNT Decrement the word in CNT (count). */
|
||||
0133773, /* BNE LOOP Branch to LOOP unless CNT is zero. */
|
||||
0074023, /* GET 0 XR Makes PC leave Bootstrap Loader. */
|
||||
0050100, /* JUMP 100 Jump to location 100. */
|
||||
0040025, /* PUSHJ GETC Get 4 bits and shift into WD. */
|
||||
0040025, /* PUSHJ GETC Get 4 more. */
|
||||
0040025, /* PUSHJ GETC Get 4 more. */
|
||||
0073320, /* DIS INTS 2 Skip 2 steps if TTY interrupt active. */
|
||||
0050025, /* JUMP GETC If not, go back and wait. */
|
||||
0010000, /* NOP (Skip over this.) */
|
||||
0074424, /* GET CH UART Put the character into CH. */
|
||||
0001444, /* ANDI CH CH Mask out all but last four bits by */
|
||||
0000017, /* 17 ANDing with 0 000 000 000 001 111. */
|
||||
0004114, /* ROT WD 14 Rotate WD four places right. */
|
||||
0001141, /* ANDI WD WD Zero out last four bits by */
|
||||
0177760, /* 177760 ANDing with 1 111 111 111 110 000. */
|
||||
0002104, /* IOR WD CH Finally, OR them together. */
|
||||
0075600, /* POPJ Return to calling program. */
|
||||
#endif
|
||||
};
|
||||
/* tt2500_cpu.c: TT2500 bootstrap ROM contents.
|
||||
|
||||
Copyright (c) 2020, Lars Brinkhoff
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
LARS BRINKHOFF BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
Except as contained in this notice, the name of Lars Brinkhoff shall not be
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Lars Brinkhoff.
|
||||
*/
|
||||
|
||||
#include "tt2500_defs.h"
|
||||
|
||||
uint16 tt2500_rom[] =
|
||||
{
|
||||
/* BEGIN 0 */ 0010000, /* (NOP) */
|
||||
/* 1 */ 0010000, /* (NOP) */
|
||||
/* 2 */ 0010000, /* (NOP) */
|
||||
/* START 3 */ 0040025, /* (PUSHJ GETC & GET CHAR) */
|
||||
/* 4 */ 0007001, /* (SUBI 0 WD & IS WORD "LOGO") */
|
||||
/* 5 */ 0147577, /* (147577) */
|
||||
/* 6 */ 0133774, /* (BNE START) */
|
||||
/* 7 */ 0040022, /* (PUSHJ GETW) */
|
||||
/* 10 */ 0074201, /* (GET ADR WD) */
|
||||
/* 11 */ 0040022, /* (PUSHJ GETW) */
|
||||
/* 12 */ 0074301, /* (GET CNT WD) */
|
||||
/* LOOP 13 */ 0040022, /* (PUSHJ GETW) */
|
||||
/* 14 */ 0004220, /* (DEC ADR) */
|
||||
/* 15 */ 0025100, /* (CWRITE WD) */
|
||||
/* 16 */ 0004320, /* (DEC CNT) */
|
||||
/* 17 */ 0133773, /* (BNE LOOP) */
|
||||
/* 20 */ 0074023, /* (GET 0 XR) */
|
||||
/* 21 */ 0050100, /* (JUMP 100) */
|
||||
/* GETW 22 */ 0040025, /* (PUSHJ GETC) */
|
||||
/* 23 */ 0040025, /* (PUSHJ GETC) */
|
||||
/* 24 */ 0040025, /* (PUSHJ GETC) */
|
||||
/* GETC 25 */ 0073320, /* (DIS INTS 2) */
|
||||
/* 26 */ 0050025, /* (JUMP GETC) */
|
||||
/* 27 */ 0010000, /* (NOP) */
|
||||
/* 30 */ 0074424, /* (GET CH UART) */
|
||||
/* 31 */ 0001444, /* (ANDI CH CH) */
|
||||
/* 32 */ 0000017, /* (17) */
|
||||
/* 33 */ 0004114, /* (ROT WD 14) */
|
||||
/* 34 */ 0001141, /* (ANDI WD WD) */
|
||||
/* 35 */ 0177760, /* (177760) */
|
||||
/* 36 */ 0002104, /* (IOR WD CH) */
|
||||
/* 37 */ 0076016 /* (POPJ) */
|
||||
|
||||
|
||||
#if 0
|
||||
0010000, /* NOP */
|
||||
0010000, /* NOP */
|
||||
0010000, /* NOP */
|
||||
0040025, /* PUSHJ GETC Call subroutine to read TTY character. */
|
||||
0007001, /* SUBI 0 WD 32-bit instruction computes 147577 - WD */
|
||||
0147577, /* 147577 (The constant "LOGO" is stored here.) */
|
||||
0133774, /* BNE START Branch to START if result Not zero. */
|
||||
0040022, /* PUSHJ GETW Reads 4 characters to make 16-bit word. */
|
||||
0074201, /* GET ADR WD Move word from WD to ADR (register 2). */
|
||||
0040022, /* PUSHJ GETW Get next data word into WD. */
|
||||
0074301, /* GET CNT WD Move it to CNT. */
|
||||
0040022, /* PUSHJ GETW Get another data word. */
|
||||
0004220, /* DEC ADR Decrement the Address and use it to */
|
||||
0025100, /* CWRITE WD write [WD] into control memory. */
|
||||
0004320, /* DEC CNT Decrement the word in CNT (count). */
|
||||
0133773, /* BNE LOOP Branch to LOOP unless CNT is zero. */
|
||||
0074023, /* GET 0 XR Makes PC leave Bootstrap Loader. */
|
||||
0050100, /* JUMP 100 Jump to location 100. */
|
||||
0040025, /* PUSHJ GETC Get 4 bits and shift into WD. */
|
||||
0040025, /* PUSHJ GETC Get 4 more. */
|
||||
0040025, /* PUSHJ GETC Get 4 more. */
|
||||
0073320, /* DIS INTS 2 Skip 2 steps if TTY interrupt active. */
|
||||
0050025, /* JUMP GETC If not, go back and wait. */
|
||||
0010000, /* NOP (Skip over this.) */
|
||||
0074424, /* GET CH UART Put the character into CH. */
|
||||
0001444, /* ANDI CH CH Mask out all but last four bits by */
|
||||
0000017, /* 17 ANDing with 0 000 000 000 001 111. */
|
||||
0004114, /* ROT WD 14 Rotate WD four places right. */
|
||||
0001141, /* ANDI WD WD Zero out last four bits by */
|
||||
0177760, /* 177760 ANDing with 1 111 111 111 110 000. */
|
||||
0002104, /* IOR WD CH Finally, OR them together. */
|
||||
0075600, /* POPJ Return to calling program. */
|
||||
#endif
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user