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PDP11: Fixed problem in KDJ11-E programmable clock
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@ -1,6 +1,6 @@
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/* pdp11_cpumod.c: PDP-11 CPU model-specific features
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Copyright (c) 2004-2016, Robert M Supnik
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Copyright (c) 2004-2020, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@ -25,6 +25,7 @@
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system PDP-11 model-specific registers
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15-Sep-20 RMS Fixed problem in KDJ11E programmable clock (Paul Koning)
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04-Mar-16 RMS Fixed maximum memory sizes to exclude IO page
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14-Mar-16 RMS Modified to keep cpu_memsize in sync with MEMSIZE
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06-Jun-13 RMS Fixed change model to set memory size last
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@ -83,7 +84,7 @@ int32 uba_last = 0; /* UBA last mapped */
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int32 ub_map[UBM_LNT_LW] = { 0 }; /* UBA map array */
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int32 toy_state = 0;
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uint8 toy_data[TOY_LNT] = { 0 };
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static int32 clk_tps_map[4] = { 60, 60, 50, 800 };
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static int32 clk_tps_map[4] = { 0, 50, 60, 800 }; /* 0 = use BEVENT */
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extern uint16 *M;
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extern int32 R[8];
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@ -830,7 +831,7 @@ switch ((pa >> 1) & 03) { /* decode pa<2:1> */
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clk_fnxm = 1;
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else clk_fnxm = 0;
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t = CSRJ_LTCSEL (JCSR); /* get freq sel */
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if (t)
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if (t != 0)
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clk_tps = clk_tps_map[t];
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else clk_tps = clk_default;
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return SCPE_OK;
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@ -921,7 +922,7 @@ switch ((pa >> 1) & 03) { /* decode pa<2:1> */
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clk_fnxm = 1;
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else clk_fnxm = 0;
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t = CSRJ_LTCSEL (JCSR); /* get freq sel */
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if (t)
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if (t != 0)
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clk_tps = clk_tps_map[t];
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else clk_tps = clk_default;
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return SCPE_OK;
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