github.com/simh.simh
1
0
Fork 0
mirror of https://github.com/simh/simh.git synced 2026-01-11 23:52:58 +00:00
Code Releases Activity

3b2: Fix incorrect register width

Browse Source 
Several registers in the TIMERS device were described
as being 16 bits wide, when they are in fact 8 bits wide.
This commit is contained in:
Seth Morabito 2020-02-26 17:27:11 -08:00 committed by Mark Pizzolato
parent 6aafb375eb
commit 814ce9ea2a
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
3B2/3b2_sysdev.c
View File

@ -425,11 +425,11 @@ UNIT *timer_clk_unit = &timer_unit[1];
REG timer_reg[] = {
{ HRDATAD(DIVA, TIMERS[0].divider, 16, "Divider A") },
{ HRDATAD(STA, TIMERS[0].mode, 16, "Mode A") },
{ HRDATAD(STA, TIMERS[0].mode, 8, "Mode A") },
{ HRDATAD(DIVB, TIMERS[1].divider, 16, "Divider B") },
{ HRDATAD(STB, TIMERS[1].mode, 16, "Mode B") },
{ HRDATAD(STB, TIMERS[1].mode, 8, "Mode B") },
{ HRDATAD(DIVC, TIMERS[2].divider, 16, "Divider C") },
{ HRDATAD(STC, TIMERS[2].mode, 16, "Mode C") },
{ HRDATAD(STC, TIMERS[2].mode, 8, "Mode C") },
{ NULL }
};