mirror of
https://github.com/simh/simh.git
synced 2026-05-10 08:37:22 +00:00
Merge branch 'master' into KDP
This commit is contained in:
@@ -613,6 +613,7 @@ struct pdp_dib {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
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uint32 ulnt; /* IO length per unit */
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};
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typedef struct pdp_dib DIB;
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@@ -1156,7 +1156,8 @@ for (i = 0; dib_tab[i] != NULL; i++) { /* print table */
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(dib_tab[i]->vloc<=19)? 5: 4);
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else
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fprintf (st, " ");
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fprintf (st, " %2u %s\n", (dptr? dptr->numunits: 1), dptr? sim_dname (dptr): "CPU");
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fprintf (st, " %2u %s\n", (dib_tab[i]->ulnt? dib_tab[i]->lnt/dib_tab[i]->ulnt:
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(dptr? dptr->numunits: 1)), dptr? sim_dname (dptr): "CPU");
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}
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return SCPE_OK;
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}
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@@ -387,7 +387,7 @@ t_stat rp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
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DIB rp_dib = {
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IOBA_RP, IOLN_RP, &rp_rd, &rp_wr,
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1, IVCL (RP), VEC_RP, { &rp_inta }
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1, IVCL (RP), VEC_RP, { &rp_inta }, IOLN_RP
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};
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UNIT rp_unit[] = {
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@@ -359,7 +359,7 @@ t_stat tu_map_err (UNIT *uptr, t_stat st, t_bool qdt);
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DIB tu_dib = {
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IOBA_TU, IOLN_TU, &tu_rd, &tu_wr,
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1, IVCL (TU), VEC_TU, { &tu_inta }
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1, IVCL (TU), VEC_TU, { &tu_inta }, IOLN_TU,
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};
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UNIT tu_unit[] = {
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@@ -154,7 +154,7 @@ char *dcx_description (DEVICE *dptr);
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DIB dci_dib = {
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IOBA_AUTO, IOLN_DC * DCX_LINES, &dcx_rd, &dcx_wr,
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2, IVCL (DCI), VEC_AUTO, { &dci_iack, &dco_iack }
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2, IVCL (DCI), VEC_AUTO, { &dci_iack, &dco_iack }, IOLN_DC,
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};
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UNIT dci_unit = { UDATA (&dci_svc, 0, 0), KBD_POLL_WAIT };
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@@ -513,6 +513,7 @@ struct pdp_dib {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routines */
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uint32 ulnt; /* IO length per-unit */
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};
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typedef struct pdp_dib DIB;
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@@ -118,7 +118,7 @@ void dlx_reset_ln (int32 ln);
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DIB dli_dib = {
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IOBA_AUTO, IOLN_DL * DLX_LINES, &dlx_rd, &dlx_wr,
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2, IVCL (DLI), VEC_AUTO, { &dli_iack, &dlo_iack }
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2, IVCL (DLI), VEC_AUTO, { &dli_iack, &dlo_iack }, IOLN_DL,
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};
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UNIT dli_unit = { UDATA (&dli_svc, 0, 0), KBD_POLL_WAIT };
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@@ -293,7 +293,8 @@ char *dz_description (DEVICE *dptr);
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DIB dz_dib = {
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IOBA_AUTO, IOLN_DZ * DZ_MUXES, &dz_rd, &dz_wr,
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2, IVCL (DZRX), VEC_AUTO, { &dz_rxinta, &dz_txinta }
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2, IVCL (DZRX), VEC_AUTO, { &dz_rxinta, &dz_txinta },
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IOLN_DZ,
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};
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UNIT dz_unit = { UDATA (&dz_svc, UNIT_IDLE|UNIT_ATTABLE|DZ_8B_DFLT, 0) };
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@@ -581,7 +581,7 @@ char *hk_description (DEVICE *dptr);
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DIB hk_dib = {
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IOBA_AUTO, IOLN_HK, &hk_rd, &hk_wr,
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1, IVCL (HK), VEC_AUTO, { NULL }
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1, IVCL (HK), VEC_AUTO, { NULL }, IOLN_HK,
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};
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UNIT hk_unit[] = {
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@@ -327,7 +327,8 @@ for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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l = strlen (dptr? sim_dname (dptr): "CPU");
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if (l>maxname)
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maxname = (int32)l;
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j = (dptr? dptr->numunits: 1);
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j = (dibp->ulnt? dibp->lnt/dibp->ulnt:
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(dptr? dptr->numunits: 1));
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if (j > maxdev)
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maxdev = j;
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} /* end if */
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@@ -407,7 +408,9 @@ for (i = 0, dibp = NULL; i < (IOPAGESIZE >> 1); i++) { /* loop thru entries */
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fprintf (st, " %2u", dibp->vloc/32);
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else
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fprintf (st, " ");
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fprintf (st, " %*u %s\n", maxdev, (dptr? dptr->numunits: 1), dptr? sim_dname (dptr): "CPU");
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fprintf (st, " %*u %s\n", maxdev, (dibp->ulnt? dibp->lnt/dibp->ulnt:
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(dptr? dptr->numunits: 1)),
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dptr? sim_dname (dptr): "CPU");
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} /* end if */
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} /* end for i */
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return SCPE_OK;
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@@ -201,7 +201,7 @@ static DIB kg_dib = {
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(IOLN_KG + 2) * KG_UNITS,
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&kg_rd,
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&kg_wr,
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0, 0, 0, { NULL }
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0, 0, 0, { NULL }, IOLN_KG+2
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};
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static UNIT kg_unit[] = {
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@@ -187,7 +187,7 @@ static DIB rc_dib = {
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IOLN_RC,
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&rc_rd,
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&rc_wr,
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1, IVCL (RC), VEC_AUTO, { NULL }
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1, IVCL (RC), VEC_AUTO, { NULL }, IOLN_RC,
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};
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static UNIT rc_unit = {
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@@ -145,7 +145,7 @@ uint32 update_rfcs (uint32 newcs, uint32 newdae);
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DIB rf_dib = {
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IOBA_AUTO, IOLN_RF, &rf_rd, &rf_wr,
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1, IVCL (RF), VEC_AUTO, {NULL}
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1, IVCL (RF), VEC_AUTO, {NULL}, IOLN_RF,
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};
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@@ -207,7 +207,7 @@ static int32 mba_mapofs[(MBA_OFSMASK + 1) >> 1] = {
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DIB mba0_dib = {
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IOBA_AUTO, IOLN_RP, &mba_rd, &mba_wr,
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1, IVCL (RP), VEC_AUTO, { &mba0_inta }
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1, IVCL (RP), VEC_AUTO, { &mba0_inta }, IOLN_RP,
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};
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UNIT mba0_unit = { UDATA (NULL, 0, 0) };
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@@ -216,7 +216,7 @@ t_stat rk_boot (int32 unitno, DEVICE *dptr);
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DIB rk_dib = {
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IOBA_AUTO, IOLN_RK, &rk_rd, &rk_wr,
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1, IVCL (RK), VEC_AUTO, { &rk_inta }
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1, IVCL (RK), VEC_AUTO, { &rk_inta }, IOLN_RK,
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};
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UNIT rk_unit[] = {
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@@ -275,7 +275,7 @@ char *rl_description (DEVICE *dptr);
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static DIB rl_dib = {
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IOBA_AUTO, IOLN_RL, &rl_rd, &rl_wr,
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1, IVCL (RL), VEC_AUTO, { NULL } };
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1, IVCL (RL), VEC_AUTO, { NULL }, IOLN_RL };
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static UNIT rl_unit[] = {
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{ UDATA (&rl_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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@@ -857,7 +857,7 @@ MSC rq_ctx = { 0 };
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DIB rq_dib = {
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IOBA_AUTO, IOLN_RQ, &rq_rd, &rq_wr,
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1, IVCL (RQ), 0, { &rq_inta }
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1, IVCL (RQ), 0, { &rq_inta }, IOLN_RQ
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};
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UNIT rq_unit[] = {
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@@ -144,7 +144,7 @@ void rx_done (int32 esr_flags, int32 new_ecode);
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DIB rx_dib = {
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IOBA_AUTO, IOLN_RX, &rx_rd, &rx_wr,
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1, IVCL (RX), VEC_AUTO, { NULL }
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1, IVCL (RX), VEC_AUTO, { NULL }, IOLN_RX,
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};
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UNIT rx_unit[] = {
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@@ -180,7 +180,7 @@ char *ry_description (DEVICE *dptr);
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DIB ry_dib = {
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IOBA_AUTO, IOLN_RY, &ry_rd, &ry_wr,
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1, IVCL (RY), VEC_AUTO, { NULL }
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1, IVCL (RY), VEC_AUTO, { NULL }, IOLN_RY,
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};
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UNIT ry_unit[] = {
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@@ -150,7 +150,7 @@ uint32 ta_crc (uint8 *buf, uint32 cnt);
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DIB ta_dib = {
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IOBA_AUTO, IOLN_TA, &ta_rd, &ta_wr,
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1, IVCL (TA), VEC_AUTO, { NULL }
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1, IVCL (TA), VEC_AUTO, { NULL }, IOLN_TA
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};
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UNIT ta_unit[] = {
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@@ -319,7 +319,7 @@ int32 dt_gethdr (UNIT *uptr, int32 blk, int32 relpos);
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DIB dt_dib = {
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IOBA_AUTO, IOLN_TC, &dt_rd, &dt_wr,
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1, IVCL (DTA), VEC_AUTO, { NULL }
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1, IVCL (DTA), VEC_AUTO, { NULL }, IOLN_TC,
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};
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UNIT dt_unit[] = {
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@@ -191,7 +191,7 @@ t_stat tm_vlock (UNIT *uptr, int32 val, char *cptr, void *desc);
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DIB tm_dib = {
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IOBA_AUTO, IOLN_TM, &tm_rd, &tm_wr,
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1, IVCL (TM), VEC_AUTO, { NULL }
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1, IVCL (TM), VEC_AUTO, { NULL }, IOLN_TM,
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};
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UNIT tm_unit[] = {
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@@ -417,7 +417,7 @@ UNIT *tq_getucb (uint32 lu);
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DIB tq_dib = {
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IOBA_AUTO, IOLN_TQ, &tq_rd, &tq_wr,
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1, IVCL (TQ), 0, { &tq_inta }
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1, IVCL (TQ), 0, { &tq_inta }, IOLN_TQ,
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};
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UNIT tq_unit[] = {
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@@ -311,7 +311,7 @@ char *ts_description (DEVICE *dptr);
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DIB ts_dib = {
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IOBA_AUTO, IOLN_TS, &ts_rd, &ts_wr,
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1, IVCL (TS), VEC_AUTO, { NULL }
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1, IVCL (TS), VEC_AUTO, { NULL }, IOLN_TS
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};
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UNIT ts_unit = { UDATA (&ts_svc, UNIT_ATTABLE + UNIT_ROABLE + UNIT_DISABLE, 0) };
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@@ -361,7 +361,8 @@ static DIB vh_dib = {
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2, /* # of vectors */
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IVCL (VHRX),
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VEC_FLOAT,
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{ &vh_rxinta, &vh_txinta } /* int. ack. routines */
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{ &vh_rxinta, &vh_txinta }, /* int. ack. routines */
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IOLN_VH, /* IO space per device */
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};
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static UNIT vh_unit[VH_MUXES] = {
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@@ -326,7 +326,7 @@ struct xq_device xqb = {
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#define IOLN_XQ 020
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DIB xqa_dib = { IOBA_AUTO, IOLN_XQ, &xq_rd, &xq_wr,
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1, IVCL (XQ), 0, { &xq_int } };
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1, IVCL (XQ), 0, { &xq_int }, IOLN_XQ };
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UNIT xqa_unit[] = {
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{ UDATA (&xq_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 2047) }, /* receive timer */
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@@ -134,7 +134,7 @@ char *xu_description (DEVICE *dptr);
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#define IOLN_XU 010
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DIB xua_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
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1, IVCL (XU), VEC_AUTO, {&xu_int} };
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1, IVCL (XU), VEC_AUTO, {&xu_int}, IOLN_XU };
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UNIT xua_unit[] = {
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{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) }, /* receive timer */
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@@ -234,7 +234,7 @@ DEVICE xu_dev = {
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#define IOLN_XU 010
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DIB xub_dib = { IOBA_AUTO, IOLN_XU, &xu_rd, &xu_wr,
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1, IVCL (XU), 0, { &xu_int } };
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1, IVCL (XU), 0, { &xu_int }, IOLN_XU };
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UNIT xub_unit[] = {
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{ UDATA (&xu_svc, UNIT_IDLE|UNIT_ATTABLE|UNIT_DISABLE, 0) } /* receive timer */
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@@ -196,6 +196,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
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@@ -243,6 +243,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
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@@ -237,6 +237,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details */
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@@ -274,6 +274,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details
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@@ -286,6 +286,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Unibus I/O page layout - see pdp11_io_lib.c for address layout details
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@@ -321,6 +321,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Unibus I/O page layout - XUB,RQB,RQC,RQD float based on number of DZ's
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@@ -284,6 +284,7 @@ typedef struct {
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int32 vloc; /* locator */
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int32 vec; /* value */
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int32 (*ack[VEC_DEVMAX])(void); /* ack routine */
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uint32 ulnt; /* IO length per unit */
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} DIB;
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/* Qbus I/O page layout - see pdp11_io_lib.c for address layout details */
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3
scp.c
3
scp.c
@@ -3664,7 +3664,8 @@ if (uptr->flags & UNIT_ATT) /* already attached? */
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return r;
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}
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else
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return SCPE_ALATT; /* Already attached */
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if (!(uptr->dynflags & UNIT_ATTMULT))
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return SCPE_ALATT; /* Already attached */
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sim_trim_endspc (cptr); /* trim trailing spc */
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return scp_attach_unit (dptr, uptr, cptr); /* attach */
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}
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