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mirror of https://github.com/simh/simh.git synced 2026-01-13 15:27:14 +00:00

4851 Commits

Author SHA1 Message Date
Mark Pizzolato
2c0b465275 VAX: Explain idling sim_interval decrement
- Explain reasoning for idle decrement
- Fix TODR debug output for all simulators with a TODR register
2023-11-16 11:33:52 -10:00
Lars Brinkhoff
04b2795982 PDP11, VAX, KS10: Speed up Chaosnet polling when there is traffic. 2023-11-16 11:19:38 -10:00
Mark Pizzolato
810ec6300d SCP: Add visible countdown for the SLEEP command 2023-11-16 09:47:03 -10:00
Tony Lawrence
7af559c580 PDP11: TA11/TU60 fix identification 2023-11-12 12:58:55 -10:00
Mark Pizzolato
65d0ae2a44 SCP: Properly write debug output for commands run at the sim> prompt
- Without regard to whether the circular buffer data is otherwise in
   use while instructions are executing.
- When a circular debug buffer is in use, avoid writing out the contents
  with the periodic open file flushes and only do so on returns to the
  sim> prompt and when debug is closed
2023-11-12 12:49:07 -10:00
Mark Pizzolato
4b8902cd06 SCP: When debugging, add output of EXAMINE commands to debug data 2023-11-12 10:04:28 -10:00
Bob Supnik
4dd7cae047 SDS: Fix shift counts > 48 bits 2023-11-12 10:04:28 -10:00
Bob Supnik
4c63340ba9 PDP11, PDP10 & VAXen: Fix TS11, RH11/TM02-3, TU45 for proper BOT handling
A user observed that the TS11 would not run XXDP+, even though it ran
fine with the PDP11 operating systems, VMS, and XXDP V2.  I traced this
back to a conceptual error in the implementation of some magtapes,
specifically the TS11, RH11/TM02-3, and the PDP10 TU45.

The issues is that beginning of tape, and being positioned in front of
the first record, are not necessarily the same. Following BOT, tape
drives record a ID burst If high density and an inter-record gap before
the first record. When the first record is read backwards or backspaced
over, the tape ends up at position 0 but should not show BOT.  Most
simulated tape drives did this correctly, but a few used sim_tape_bot()
as a shortcut for BOT, and it's simply not correct.

BOT should be set at ATTACH, by a successful rewind, and by any reverse
operation when the tape is positioned in front of the first record.

BOT should be cleared by any successful movement operation, except
rewind.
2023-11-12 10:04:28 -10:00
Mark Pizzolato
67ec597696 SCP: Add support for REGisters containing double values 2023-11-12 10:04:28 -10:00
Mark Pizzolato
3ac5062c12 APPVEYOR: Fix incorrect environment variable names
Remove irrelevant travis CI references that are no longer used at all
2023-10-15 19:10:22 -10:00
Mark Pizzolato
05458260c7 APPVEYOR: Properly reference Appveyor environement variables 2023-10-15 15:19:50 -10:00
Mark Pizzolato
ce1087353b APPVEYOR: Fixes for build reliability and saving build results
- On MacOS, avoid Homebrew updating other pre-installed packages.
  Autoupdating packages that aren't needed or referenced by the build
  can take a very long time and cause the build timeout to be exceeded.
- Be sure to only save build results for changes to the master branch
  of simh/simh
- Avoid saving binaries when one has been saved within the last week
2023-10-15 03:17:48 -10:00
Tony Lawrence
abd1834380 PDP11: 11/70 read-only registers must not return NXM on write
17 777 740 - 17 777 742, read-only error address registers,
and 17 777 764, a read-only System ID register,

and are not handled in the CPU70_wr() routine, which means for these
addresses the routine returns NXM, which then translates to "bus timeout"
(no response to address), and then, as a result, trap to vector 4.

That is incorrect, IMO.

These locations are read-only yet the address gets decoded, and even
though writing does not have any effect, the write routine for these
addresses should return SCPE_OK.
2023-10-15 02:44:43 -10:00
Derek Peschel
68e071407e TX-0: Make ^E work in readin mode.
sim_instr does not completely follow the outline in the SIMH v3
developer docs. It does not decrease sim_interval in readin mode.
Fixing this, I cleaned up some other things:

- Move the decrease of sim_interval to after the check for breakpoints,
  but before the check for ios. This ensures that sim_interval will
  decrease any time an instruction executes in normal mode, or readin
  mode executes, or ios is set and the CPU is waiting for ios to clear.
  (Except the CPU should be clearing ios itself, not waiting for ios to
  clear, but that fix requires a complete redesign of the I/O routines
  and belongs in another branch.)
- Correctly handle all four combinations of mod_tst and mod_rdin.
- When changing from readin mode to normal mode, if cpu_set_mode returns
  an error, stop with the same error. If cpu_set_mode returns SCPE_OK,
  either stop or continue execution, depending on the word read from tape.
- In petr_boot and in the readin mode code in sim_instr, if the
  PETR is not attached to a file, return SCPE_UNATT. Never try to read
  from an unattached unit; I believe this reads standard input and
  prevents ^E from working.

Overall control structure inside the while (reason == 0) loop:

- When stopping due to an error, break out of the while loop where
  possible.
- After handling "ios is set", continue, don't run readin/test/normal-
  mode code.
- After handling one readin operation, if the code didn't break out
  of the while loop, continue, don't run normal-mode code.
2023-10-13 13:08:29 -10:00
Derek Peschel
cce97b7d6c TX-0: Stop ptp_svc from setting the ios bit
sim_instr never clears it and simulation loops.

The CPU-to-device routines and device service routines need a redesign.
In the meantime, this quick patch makes tape punching possible.
2023-10-13 13:07:28 -10:00
Derek Peschel
bb9fa6f258 TX-0: Adjust CPU cry to reflected documented behavior and separated from pad
Before, when the simulator decoded pad, it handled pad without cry
and pad with cry. When it decoded cry, it printed a "TO DO" message.

http://bitsavers.org/pdf/mit/tx-0/memos/M-5001-19_macros_Apr60.pdf
derives a simple algorithm for cry. Implement that, remove the test
for cry from the pad code, and reformat the debug messages.

The same change appears in sim_instr and sim_opr_orig.
2023-10-13 13:06:53 -10:00
Mark Pizzolato
df96d1dbe1 SCP: Reject throttling setting when throttling was previously enabled 2023-10-13 09:37:20 -10:00
Mark Pizzolato
985137cbff SCP: Avoid reading excess data when putting register values into a string 2023-10-06 13:40:11 -10:00
Mark Pizzolato
4f1f97698c Visual Studio Projects: Clarify additional updates needed for VS2008 builds 2023-10-06 13:38:03 -10:00
Tony Lawrence
5b9a6abb37 PDP11: TS11: Fix help output for BOOT command
The BOOT command for this device was not correctly documented in HELP
(appearing both supported and not) for PDP-11.

This change fixes the issue and syncs HELP output with the actual code
(by using the same #if conditional).
2023-10-06 00:31:29 -10:00
Tony Lawrence
a6ad4d0acb SCP: Fix correctly loading simh.ini when user HOME not defined 2023-10-03 09:07:57 -10:00
Richard Cornwell
1359a22cd2 KA10: Fixed OWGBP on KL10B. 2023-10-03 09:04:31 -10:00
Patrick Linstruth
d317f6c0ed AltairZ80: M2SIO, CPU, SIO and PMMI additions and fixes
Adds 6850 DCD status latch to M2SIO devices.
Adds vector interrupt support to M2SIO devices.

Removes CTS inactive transmit disable from PMMI device.

Adds IMSAI-style programmed output to CPU/SIO devices.

SET CPU PO will display "PO: AREG" upon an "OUT 0FFH"
instruction.

SET CPU NOPO will disable the function (default).

Corrects problem with Mode 0 interrupts.

When the CPU receives an interrupt, it pushes the current
program counter on the stack. The current implementation
of Mode 0 was performing interrupt processing after fetching
the next opcode from RAM, which also increases the PC by 1.
This caused PC+1 to be pushed on the stack. The interrupt
processing is now done prior to fetching the next opcode,
preserving the correct program counter.
2023-10-02 02:25:29 -10:00
Peter Schorn
7464b90b36 AltairZ80: Correct spelling, formatting and years 2023-10-02 02:24:02 -10:00
Richard Cornwell
4e6c49f48e KA10: Allow single step over XCT, byte and extend instructions. 2023-10-01 15:10:06 -10:00
Richard Cornwell
25fc02b90f KA10: Add -m option to load .exe files to load monitors. 2023-10-01 13:23:44 -10:00
Richard Cornwell
69bea4bf9c KA10: Fixed nopage read/write to always refer to memory. 2023-10-01 13:23:44 -10:00
John D. Bruner
be969fe46c Visiual Studio Projects: handle missing XP tools when converting to VS2022
build_vstudio.bat converts the .vcproj files from Visual Studio 2008 to
.vcxproj when used with newer versions of Visual Studio and configures
it to build XP-compatible binaries using the v141_xp toolset. However,
this toolset is deprecated and may not be present when using Visual
Studio 2022. The script intends to edit the .vcxproj files only in the
case where it exists; however, due to a logic error it actually does
this unconditionally. This causes the build to fail on VS2022 when
the XP toolset is not present.
2023-10-01 13:22:05 -10:00
Richard Cornwell
575df4bd67 KA10: Moved over older changed to ITS and WAITS devices. 2023-09-27 07:04:14 -10:00
Richard Cornwell
b0e3938308 KA10: Fixed depositing symbolic into register and symbolic of reg 17 2023-09-27 07:04:14 -10:00
Richard Cornwell
bc8518d932 KA10: Fixed PUSH for extended addressing on KL. 2023-09-27 07:04:14 -10:00
Richard Cornwell
0f65a8a3c1 KA10: Fixed to allow EDDT to work correctly on KL10. 2023-09-26 13:49:01 -10:00
Richard Cornwell
34fa733325 KA10: Fixed save command on Tops 10 7.0x. 2023-09-26 13:49:01 -10:00
Richard Cornwell
a56316389d SIM_CARD: Fixed to better detect mixed binary and ascii decks. 2023-09-26 13:49:01 -10:00
Mark Pizzolato
d7560cf3e4 SCP: Provide more context when command errors are found 2023-09-25 14:30:14 -10:00
Mark Pizzolato
40aa90f732 SCP: Fix source content address while issuing error message 2023-09-19 06:25:59 -10:00
Mark Pizzolato
926721d7c9 DISK: Add geometry values to SCSI DRVTYP initializer
- Add geometry values to 3b2-700 SCSI drive types
2023-09-19 03:11:24 -10:00
Mark Pizzolato
c8b03944a5 SCP: Fix Invalid register message text 2023-09-19 03:09:11 -10:00
Mark Pizzolato
ec475d83f8 SCP: Report detailed context while parsing errors in EXAMINE/DEPOSIT commands 2023-09-18 11:21:54 -10:00
Mark Pizzolato
1f9881734a SCP: Exit if disk or tape initialization routines return a failure 2023-09-10 08:45:54 -10:00
Mark Pizzolato
62c0daf8f8 README: Update with current info 2023-09-09 13:03:59 -10:00
Mark Pizzolato
3b4c6a821a PDP10-KA: Remove irrelevant system include files 2023-09-09 13:03:12 -10:00
Mark Pizzolato
9b0413045a DISK: Provide disk Geometry (Cylinders, Heads, Sectors) for all disk types
- Display Media-ID and Geometry info for all SHOW <unit> output when attached
- Use real drive Geometry info for all disk types
- Fix RA80 cylinders copied from RM80
- Fix RZ23 cylinders to reflect disk size
- Return correct cylinder info on MSCP error path
2023-09-09 13:02:45 -10:00
Reindert Voorhorst
95e88d3d76 PDP8: Fixed decoding of DVI 2023-09-06 08:14:22 -10:00
Mark Pizzolato
e60416d36f DISK: Add automatic CHS correction for VHD containers with improper values
- Display modify time and CHS info for containers when available via DISKINFO
2023-09-05 08:59:38 -10:00
Mark Pizzolato
06659c82c8 SCP: Correct DIR command to use create time if modify time isn't populated. 2023-09-04 14:48:22 -10:00
Robert de Bath
93347076a1 DISK: Fix VHD to Ensure that the CHS capacity exceeds the disk length
If the total sectors exceeds 127Gb this is not possible, but normal
simh disks are smaller and the largest user settable size via RAUSER
is just under 1Tb.  The excessive size case (>127Gb) will have a CHS
of 0xFFFF10FF.

simh never cares about the CHS Disk Geometry value in the VHD footer
data structure, but other applications which do care about the CHS
value using the previously incorrect value as the capacity of the disk
even though the Current Size indicated in the footer may have been
larger.
2023-09-03 18:35:51 -10:00
Mark Pizzolato
292286b568 DISK: Fix compiler warning 2023-08-30 06:37:13 -10:00
Mark Pizzolato
a21a7f9620 APPVEYOR: Fix test for LFS cache contents on Windows setup 2023-08-30 06:21:44 -10:00
Mark Pizzolato
2f1ab2ec6b DISK: Polishing various functionality 2023-08-30 06:17:35 -10:00