- Cleanup tape debug options and internal usage
- Add MTSE_DBG_INT for internal API activities
- Make sure SCSI uses the correct debug value for tape debug
- Some OS support had a bug in the command passed to run telnet in the
new window.
- Report when there appears to be no telnet client available on the
local system.
- Add support for Fedora KDE.
This is the initial release of the Altair8800 simulator.
Why another Altair simulator? AltairZ80 has been described as a
“software simulator”, where the intent is to run software designed
specifically for executing under a simulator. Altair8800 is intended
to accurately simulate the Altair hardware and execute software
that will run unchanged on real hardware. Software and disk images
can be moved between the Altair8800 simulator and real Altair and
other S-100 hardware without any changes. The Altair8800 simulator
is a tool that can assist with the restoration of vintage Altair
and other S-100 hardware and software along with the development
of new hardware and software. The accomplish this, the following
are major differences between AltairZ80 and Altair8800.
* The monolithic design where devices access other devices directly
through external variables and functions is no longer supported.
All devices exchange data through a new BUS device. Memory and I/O
address decoding and transfers are now handled by the BUS device.
All interrupt requests are handled by the BUS device.
* System RAM was moved from the CPU device to a new RAM device and
managed by the BUS device.
* Banked RAM was moved from the CPU device to a new BRAM device.
* Banked RAM can only be accessed through the BUS device. Memory in
banks that are not currently selected cannot be accessed. The AZ80
“banked” RAM was removed.
* ROMs were moved from the CPU and DSK devices to the new ROM device.
Mike Douglas’ Altmon Monitor is also available through the ROM
device. The custom AltairZ80 ALTAIRROM, which is not compatible
with original Altair disk images, is also available.
* The custom ALTAIRROM boot loader was replaced with the original
MITS Disk Boot Loader as the default ROM.
* The monolithic Multiple-CPU/RAM/ROM/IO/BankedRAM CPU device has
been replaced with a generic CPU device that provides an abstraction
layer between SIMH and the supported CPU architectures (currently
8080 and Z80). All IO is handled through the BUS device. RAM, Banked
RAM, and ROM are each handled by their own independent devices.
* The AltairZ80 SIO device was replaced with the M2SIO0 and M2SIO1
devices. The M2SIO devices fully support TMXR.
* A new SIO device was added to provide generic, programmable, Serial
IO. TMXR is not supported on this device.
* The Altair 8800 did not have PTR or PTP hardware devices. They have
been removed and replaced with the M2SIO1 device. PTR and PTP devices
are defined by software executing on the simulator.
* Contention between multiple enabled serial devices checking the
single host keyboard for input is now handled by the BUS device.
Port 0xFF sense switches was moved to a new SSW device and IMSAI
programmed output was moved to a new PO device.
* The SIMH pseudo device no longer uses the removed PTR and PTP
devices. The SIMH device has its own IO system. To avoid conflicts
with other devices and remain compatible with the R and W utilities
written for AltairZ80, SIMH “borrows” I/O ports 12H and 13H during
file transfers. Only SIMH commands needed to support R and W file
transfers are supported. All other SIMH commands were removed.
* AltairZ80-specific versions of CP/M are not supported by Altair8800.
* PC queue was removed from CPU device and replaced with CPU HISTORY.
* The Altair8800 simulator only supports 16-bit address and 8-bit
data buses. 8086 and 68K CPU architectures were removed.
* All CPU timing (clockFrequency) and “sleeps” (SIO SLEEP) have been
removed. SIMH THROTTLE is fully supported and is the recommended
way to manage simulator speed and host CPU utilization. Executing
“SET THROTTLE 100K/1”, for example, should provide ample speed
without tasking the host CPU.
* HEXLOAD and HEXSAVE commands were added. The LOAD “-h” option has
been removed. Intel Hex and sRecord (coming soon) formats are
supported.
* The WD179X device was converted to an API.
* A new DSK API was added to provide a consistent way to manage soft
sector raw disk images.
* Support for the proprietary IMD disk image format was removed. Only
RAW disk images are supported.
The following devices are supported by this initial release:
BUS - Altair (S-100) Bus
CPU - Intel 8080 / Zilog Z80
RAM - 64K RAM
ROM - ROMs
BRAM - Banked RAM
DSK - MITS 88-DCDD Floppy Disk Controller
M2SIO0 - MITS 88-2SIO Port 0
M2SIO1 - MITS 88-2SIO Port 1
SSW - Sense Switches
PO - Programmed Output
SIO - Generic Serial I/O
SBC200 - SD Systems SBC-200
TARBELL - Tarbell SD and DD Floppy Disk Controller
VFII - SD Systems VersaFloppy II
SIMH - SIMH Pseudo Device
- Cleanup build details and provide initial detection support for
building Visual Studio 2026.
- Automatically leverage the v141 Visual Studio platform Toolset if
it is installed. This avoids failing build attempts when windows_build
hasn't yet been updated to support the frequently changing VS2022
or VS2026 build components.
- Fix pdp11.vcproj to avoid warning when project is converted.
- Fix trivial compiler warnings in alpha_cpu.c and hp_tapelib.c
The value in _X_REQUIRED_WINDOWS_BUILD normally forces a fetch of the
latest windows_build components that are available. This value might
not be updated before the local system's Visual Studio tool chain is
updated. When this Visual Studio is a version that isn't supported by
the locally available windows_build, it is worth checking to see if
windows_build has already been updated to support the newest Visual
Studio version.
- Invoking make with QUIET=0 (or in an exported environment variable)
will display the full compile and link commands executed.
- Invoking make with BUILD_SEPARATE=0 will cause each simulator
being built to be built with a single compile and link command.
This is how things were previously, but now the default has been
changed to more easily support active simulator development
by compiling files that have changed.
- Silence link time warning on macOS
- cleanup C++ support for ND100 and C++ builds of other simulators
This emulates the classic LINC. The design was settled in 1965,
increasing memory to 2048 words, and adding a Z register, an overflow
flag, and an interrupt facility.
These are tests for the classic LINC, including the features new in
1965: 2048 words of memory, a Z register, an overflow flag, and an
interrupt facility.
This emulates the classic LINC. The design was settled in 1965,
increasing memory to 2048 words, and adding a Z register, an overflow
flag, and an interrupt facility.
SIMH SHOW VERSION output displays as much potentially useful information
about both the currently running simulator and the host platform it is running
on. On Windows host systems, some of this information has been gathered
from the output of the WMIC command which is deprecated and is already
being removed from new and future systems.
This change leverages WMIC when it is available, and attempts to gather the
interesting information from elsewhere when it is not.
As reported in #1227
This problem was a latent bug introduced when summarized array register
output was added back in 2013 or 2018.
This fixes the problem reported in https://github.com/open-simh/simh/issues/499
Accept devices mapped at IOPAGEBASE -- text buffer/character generator
memory on video board starts at 160000.
Clear invalid PSW bits in trap handler -- system acceptance test writes
PSW 113705 to vector 34 (TRAP instruction).
