Originally, the VAX allowed immediate operands (8F) to be used without
restrictions in address mode instructions, either standalone or indexed.
Starting with MicroVAX II, immediate indexed became reserved. This
remained true for all subsequent chip implementations. The SRM was
ECOed in March, 1985 to make immediate indexed unpredictable.
In MicroVAX II, immediate g-floating operands didn't work correctly. The
problem was found a couple of months after tape-out. While the index
flows could be fixed, and were fixed according to the microcode revision
history:
; 7-May-84 [RMS] Fixed FD problem in index flows (JLR)
the problem in indexed immediate could only be fixed by a significant
hardware change in an area that was already packed full. The VAX
Architecture Team, which had always been very sympathetic to the
VAX chip efforts, proposed a much simpler solution: make immediate
indexed unpredictable. It was useless, in any case.
I'm rather surprised that this wasn't flagged by the 780 diagnostics.
Maybe it was never tested. It was tested in HCORE (the original MicroVAX I
core diagnostic that is failing), but I removed it subsequently:
; 8-may-85 rms removed indexed immediate tests
Bottom line - the simulator is right for the chip VAXes (including, I think,
V11) and wrong for MicroVAX I and probably the 8600, 780, 750, and 730.
As originally specified, both MTPR and MFPR set N,Z based on the
transmitted/received longword data, cleared V, and left C untouched. The
simulator hardwired this (except for the standardized TBCHK register)
based on the CVAX microcode.
In the 8200, accessing the RXCD register sets V for character
sent/received. (The VAX vector MxPRs also return non-standard values
for the condition codes.) This is one of the reasons that, in 1986, the
VAX architecture spec was changed to make the condition codes
UNPREDICTABLE following MTPR or MFPR.
Accordingly, I've added a "hook" to support the 8200 and other
non-standard MxPRs: global variable mxpr_cc_vc.
At the start of MTPR or MFPR (only), this variable is set to
000<current C bit>. MTPR will set N and Z based on the transmitted
operand and clear V and C. MFPR will set N and Z based on the received
data and clear V and C. Then, at the end, mxpr_cc_vc, masked down to
V & C, is ORed into the condition codes.
Thus, if an IPR write or read does nothing special, MTPR and MFPR will
get the canonical results. N,Z set, V cleared, C preserved. However, an
IPR routine can now specify a non-standard value for V and/or C by
modifying mxpr_cc_vc.
This tweak required changes only in vax_cpu.c. None of the model-
specific IPR routines need to be changed, except for Matt's 8200 RXCD
code. Anyone attempting implementation of further models (or VAX
vectors) should be aware of this new capability.
3.10 is mostly an attempt to get aligned with the current head of the
GitHub 4.0 sources. While the core libraries and SCP have diverged too
far for real forward and backward compatibility, enough 4.0 workalikes
have been added to allow much closer convergence of the two streams.
3.10 will provide the basis for my future simulation work.
From page 6-6 of DEC STD 032 (the VAX architecture spec):
"Execution of MTPR src, #PR$_ASTLVL with src<31:0> GEQU 5 results in
UNDEFINED behavior. The preferred implementation is to cause a reserved
operand fault." MicroVAX II, CVAX, and Rigel all conform to the preferred
behavior, as does the current simulator, which was written from the CVAX
microcode. NVAX masks to 3b and does not take an exception on a value
GEQU 5.
The 1982 Architecture Handbook describes ASTLVL as a 3b register, with
src<31:3> ignored/read as zero, and exceptions taken on values GEQU 5.
The780 microcode masks the input value to 3b before doing the GEQU 5 test.
The ASTLVL test needs to be model specific.
I suspect the behavior became undefined when MicroVAX II simplified the
original test to save a microword. I do not see how the code fragment Matt
references could work on a MicroVAX II, which was supported under 4.5.
Perhaps the device Matt mentions couldn't exist on a MicroVAX II?
For those who wants the gory details... uVAX, CVAX, and Rigel do an
unsigned compare on the unmasked src and the constant 5. Carry out
means reserved operand. Overflow is ignored. So an input of 0x80000002 -
0x00000005 (done in the data path as 0x80000002 + 0xFFFFFFFB) generates overflow (ignored) and carry out.
the opcode table first word consists of bits:
<7> = FPD is legal for this opcode.
<4:6> = number of specifiers for unimplemented opcodes (VAX subsets)
<3> = unused
<0:2> = number of specifiers
The mask used to be 0x70. The convention is that x_M_y is a mask value
<right-justified>, for a macro like:
#define get_foo(x) (((x) >> x_V_foo) & x_M_foo)
For a subset VAX (like the 3900), the unimplemented opcodes are those
that are recognized on a full VAX but simply trap as reserved instructions
(e.g., the H-floating instructions). This really only affected symbolic
printing and decoding of these instructions.
IPL_UBA already has the subtract built in:
So it shouldn't be extracted again.
The whole routine looks a little strange, but the way it works is
that an interrupt from the UBA itself sets <bit 31> in the returned vector.
Because the vector is read by code and not used by hardware, the flag
bit is "harmless."
UBA interrupts occur only under strange circumstances, like bad map
pages and device NXMs. Under the simulator, with a debugged OS, they
never happen.
Design Notes for Fixing VAX Unaligned Access to IO and Register Space
Problem Statement: VAX unaligned accesses are handled by reading the
surrounding longword (or longwords) and
a) for reads, extracting the addressed addressed word or longword
b) for writes, inserting the addressed word or longword and then
writing the surrounding longword (or longwords) back
This is correct for all memory cases. On the 11/780, the unaligned
access to register or IO space causes an error, as it should. On
CVAX, it causes incorrect behavior, by either performing too many
QBus references, or performing read-modify-writes instead of pure
writes, or accessing the wrong Qbus locations.
The problem cannot be trivially solved with address manipulation.
The core issues is that on CVAX, unaligned access is done to
exactly as many bytes as are required, using a base longword
address and a byte mask. There are five cases, corresponding to
word and longword lengths, and byte offsets 1, 2 (longword only),
and 3. Further, behavior is different for reads and writes, because
the Qbus always performs word operations on reads, leaving it to
the processor to extract a byte if needed.
Conceptual design: Changes in vax_mmu.c:
Unaligned access is done with two separate physical addresses, pa
and pa1, because if the access crosses a page boundary, pa1 may
not be contiguous with pa. It's worth noting that in an unaligned
access, the low part of the data begins at pa (complete with byte
offset), but the high parts begins at pa1 & ~03 (always in the
low-order end of the second longword).
To handle unaligned data, we will add two routines for read and
write unaligned:
data = ReadU (pa, len);
WriteU (pa, len, val);
Note that the length can be 1, 2, or 3 bytes. For ReadU, data is
return right-aligned and masked. For WriteU, val is expected to
be right-aligned and masked.
The read-unaligned flows are changed as follows:
if (mapen && ((off + lnt) > VA_PAGSIZE)) { /* cross page? */
vpn = VA_GETVPN (va + lnt); /* vpn 2nd page */
tbi = VA_GETTBI (vpn);
xpte = (va & VA_S0)? stlb[tbi]: ptlb[tbi]; /* access tlb */
if (((xpte.pte & acc) == 0) || (xpte.tag != vpn) ||
((acc & TLB_WACC) && ((xpte.pte & TLB_M) == 0)))
xpte = fill (va + lnt, lnt, acc, NULL); /* fill if needed */
pa1 = ((xpte.pte & TLB_PFN) | VA_GETOFF (va + 4)) & ~03;
}
else pa1 = ((pa + 4) & PAMASK) & ~03; /* not cross page */
bo = pa & 3;
if (lnt >= L_LONG) { /* lw unaligned? */
sc = bo << 3;
wl = ReadU (pa, L_LONG - bo); /* read both fragments */
wh = ReadU (pa1, bo); /* extract */
return ((wl | (wh << (32 - sc))) & LMASK);
}
else if (bo == 1) /* read within lw */
return ReadU (pa, L_WORD);
else {
wl = ReadU (pa, L_BYTE); /* word cross lw */
wh = ReadU (pa1, L_BYTE); /* read, extract */
return (wl | (wh << 8));
}
These are not very different, but they do reflect that ReadU returns
right-aligned and properly masked data, rather than the encapsulating
longword.
The write-unaligned flows change rather more drastically:
if (mapen && ((off + lnt) > VA_PAGSIZE)) {
vpn = VA_GETVPN (va + 4);
tbi = VA_GETTBI (vpn);
xpte = (va & VA_S0)? stlb[tbi]: ptlb[tbi]; /* access tlb */
if (((xpte.pte & acc) == 0) || (xpte.tag != vpn) ||
((xpte.pte & TLB_M) == 0))
xpte = fill (va + lnt, lnt, acc, NULL);
pa1 = ((xpte.pte & TLB_PFN) | VA_GETOFF (va + 4)) & ~03;
}
else pa1 = ((pa + 4) & PAMASK) & ~03;
bo = pa & 3;
if (lnt >= L_LONG) {
sc = bo << 3;
WriteU (pa, L_LONG - bo, val & insert[L_LONG - bo]);
WriteU (pa, bo, (val >> (32 - sc)) & insert[bo]);
}
else if (bo == 1) /* read within lw */
WriteU (pa, L_WORD, val & WMASK);
else { /* word cross lw */
WriteU (pa, L_BYTE, val & BMASK);
WriteU (pa, L_BYTE, (val >> 8) & BMASK);
}
return;
}
Note that all the burden here has been thrown on the WriteU routine.
-------------
ReadU is the simpler of the two routines that needs to be written.
It will handle memory reads and defer register and IO space to
model-specific unaligned handlers.
int32 ReadU (uint32 pa, int32 lnt)
{
int32 dat;
int32 sc = (pa & 3) << 3;
if (ADDR_IS_MEM (pa))
dat = M[pa >> 2];
else {
mchk = REF_V;
if (ADDR_IS_IO (pa))
dat = ReadIOU (pa, lnt);
else dat = ReadRegU (pa, lnt);
}
return ((dat >> sc) & insert[lnt]);
}
Note that the ReadIOU and ReadRegU return a "full longword," just
like their aligned counterparts, and ReadU right-aligns the result,
just as ReadB, ReadW, and ReadL do.
WriteU must handle the memory read-modify-write sequence. However,
it defers register and IO space to model-specific unaligned handlers.
void WriteU (uint32 pa, int32 lnt, int32 val)
{
if (ADDR_IS_MEM (pa)) {
int32 bo = pa & 3;
int32 sc = bo << 3;
M[pa >> 2] = (M[pa >> 2] & ~(insert[len] << sc) | (val << sc);
}
else if ADDR_IS_IO (pa)
WriteIOU (pa, lnt, val);
else WriteRegU (pa, lnt, val);
return;
}
--------------
For the 11/780, ReadIOU, ReadRegU, WriteIOU, and WriteRegU all do the
same thing: they throw an SBI machine check. We can write explicit
routines to do this (and remove the unaligned checks from all the
normal adapter flows), or leave things as they are and simply define
the four routines as macros that go to the normal routines. So there's
very little to do.
On CVAX, I suspect that ReadRegU and WriteRegU behave like the
normal routines. The CVAX specs don't say much, but CMCTL (the memory
controller) notes that it ignores the byte mask and treats every
access as an aligned longword access. I suspect this is true for
the other CVAX support chips, but I no longer have chip specs.
The Qbus, on the other hand... that's a fun one. Note that all of
these cases are presented to the existing aligned IO routine:
bo = 0, byte, word, or longword length
bo = 2, word
bo = 1, 2, 3, byte length
All the other cases are going to end up at ReadIOU and WriteIOU,
and they must turn the request into the exactly correct number of
Qbus accesses AND NO MORE, because Qbus reads can have side-effects,
and word read-modify-write is NOT the same as a byte write.
The read cases are:
bo = 0, byte or word - read one word
bo = 1, byte - read one word
bo = 2, byte or word - read one word
bo = 3, byte - read one word
bo = 0, triword - read two words
bo = 1, word or triword - read two words
ReadIOU is very similar to the existing ReadIO:
int32 ReadIOU (uint32 pa, int32 lnt)
{
int32 iod;
iod = ReadQb (pa); /* wd from Qbus */
if ((lnt + (pa & 1)) <= 2) /* byte or word & even */
iod = iod << ((pa & 2)? 16: 0); /* one op */
else iod = (ReadQb (pa + 2) << 16) | iod; /* two ops, get 2nd wd */
SET_IRQL;
return iod;
}
The write cases are:
bo = x, lnt = byte - write one byte
bo = 0 or 2, lnt = word - write one word
bo = 1, lnt = word - write two bytes
bo = 0, lnt = triword - write word, byte
bo = 1, lnt = triword - write byte, word
WriteIOU is similar to the existing WriteIO:
void WriteIO (uint32 pa, int32 val, int32 lnt)
{
switch (lnt) {
case L_BYTE: /* byte */
WriteQb (pa, val & BMASK, WRITEB);
break;
case L_WORD: /* word */
if (pa & 1) { /* odd addr? */
WriteQb (pa, val & BMASK, WRITEB);
WriteQb (pa + 1, (val >> 8) & BMASK, WRITEB);
}
else WriteQb (pa, val, WRITE);
break;
case 3: /* triword */
if (pa & 1) { /* odd addr? */
WriteQb (pa, val & BMASK, WRITEB);
WriteQb (pa + 1, (val >> 8) & WMASK, WRITE);
}
else {
WriteQb (pa, val & WMASK, WRITE);
WriteQb (pa + 2, (val >> 16) & BMASK, WRITEB);
}
break;
}
SET_IRQL;
return;
}
-----------------
I think this handles all the cases.
/Bob Supnik
After a frantic week of file exchanges, here is RC2. A lot has changed.
1. HP2100 updates completed, with new features and peripherals.
2. Many, many small file updates for nits found by compilers and static checkers.
3. A few genuine bugs fixed.
4. New makefile and MMS file.
A note on the makefile. It has almost doubled in size and attempts to ferret out PCAP locales properly, as well as do serious optimizations if gcc is used. It needs to be tested in more environments. If you run into issues, please report them to Mark Pizzolato as well as me.
The old makefile, updated for the extra files in the HP2100, is included as makefile_old. You can use that if the new makefile causes problems in your environment.
I'm still targeting a May Day release, with a final RC around Tax Day (April 15). That leaves times for one more interim RC, if needed.
At this point, I regard the release as feature-complete. Bug fixes are still fine.
The actual release will have all incomplete and beta simulators in a separate zip file, including Alpha, Sigma, Sage (the microcomputers, not the 50s anti-aircraft computer), and SC1, the SiCortex MIPS simulator.
There will be new releases of all the simulation tools as well.
/Bob
The makefile now works for Linux and most Unix's. However, for Solaris
and MacOS, you must first export the OSTYPE environment variable:
> export OSTYPE
> make
Otherwise, you will get build errors.
1. New Features
1.1 3.9-0
1.1.1 SCP and libraries
- added *nix READLINE support (Mark Pizzolato)
- added "SHOW SHOW" and "SHOW <dev> SHOW" commands (Mark Pizzolato)
- added support for BREAK key on Windows (Mark Pizzolato)
1.1.2 PDP-8
- floating point processor is now enabled
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
3. Status Report
This is the last release of SimH for which I will be sole editor. After this
release, the source is moving to a public repository:
under the general editorship of Dave Hittner and Mark Pizzolato. The status
of the individual simulators is as follows:
3.1 PDP-1
Stable and working; runs available software.
3.2 PDP-4/7/9/15
Stable and working; runs available software.
3.3 PDP-8
Stable and working; runs available software.
3.4 PDP-10 [KS-10 only]
Stable and working; runs available software.
3.5 PDP-11
Stable and working; runs available system software. The emulation of individual
models has numerous errors of detail, which prevents many diagnostics from
running correctly.
3.6 VAX-11/780
Stable and working; runs available software.
3.7 MicroVAX 3900 (VAX)
Stable and working; runs available software. Thanks to the kind generosity of
Camiel Vanderhoeven, this simulator has been verified with AXE, the VAX
architectural exerciser.
3.8 Nova
Stable and working; runs available software.
3.9 Eclipse
Stable and working, but not really supported. There is no Eclipse-specific
software available under a hobbyist license.
3.10 Interdata 16b
Stable and working, but no software for it has been found, other than
diagnostics.
3.11 Interdata 32b
Stable and working; runs 32b UNIX and diagnostics.
3.12 IBM 1401
Stable and working; runs available software.
3.13 IBM 1620
Hand debug only. No software for it has been found or tested.
3.14 IBM 7094
Stable and working as a stock system; runs IBSYS. The CTSS extensions
have not been debugged.
3.15 IBM S/3
Stable and working, but not really supported. Runs available software.
3.16 IBM 1130
Stable and working; runs available software. Supported and edited by
Brian Knittel.
3.17 HP 2100/1000
Stable and working; runs available software. Supported and edited by
Dave Bryan.
3.18 Honeywell 316/516
Stable and working; runs available software.
3.19 GRI-909/99
Hand debug only. No software for it has been found or tested.
3.20 SDS-940
Hand debug only, and a few diagnostics.
3.21 LGP-30
Unfinished; hand debug only. Does not run available software, probably
due to my misunderstanding of the LGP-30 operational procedures.
3.22 Altair (original 8080 version)
Stable and working, but not really supported. Runs available software.
3.23 AltairZ80 (Z80 version)
Stable and working; runs available software. Supported and edited by
Peter Schorn.
3.24 SWTP 6800
Stable and working; runs available software. Supported and edited by
Bill Beech
3.25 Sigma 32b
Incomplete; more work is needed on the peripherals for accuracy.
3.26 Alpha
Incomplete; essentially just an EV-5 (21164) chip emulator.
4. Suggestions for Future Work
4.1 General Structure
- Multi-threading, to allow true concurrency between SCP and the simulator
- Graphics device support, particularly for the PDP-1 and PDP-11
4.2 Current Simulators
- PDP-1 graphics, to run Space War
- PDP-11 GT40 graphics, to run Lunar Lander
- PDP-15 MUMPS-15
- Interdata native OS debug, both 16b and 32b
- SDS 940 timesharing operating system debug
- IBM 7094 CTSS feature debug and operating system debug
- IBM 1620 debug and software
- GRI-909 software
- Sigma 32b completion and debug
- LGP-30 debug
4.3 Possible Future Simulators
- Data General MV8000 (if a hobbyist license can be obtained for AOS)
- Alpha simulator
- HP 3000 (16b) simulator with MPE
The makefile now works for Linux and most Unix's. However, for Solaris
and MacOS, you must first export the OSTYPE environment variable:
> export OSTYPE
> make
Otherwise, you will get build errors.
1. New Features
1.1 3.8-0
1.1.1 SCP and Libraries
- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
show (respectively) a breakpoint at the current PC.
1.1.2 GRI
- Added support for the GRI-99 processor.
1.1.3 HP2100
- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.
1.1.4 Nova
- Added support for 64KW memory (implemented in third-party CPU's).
1.1.5 PDP-11
- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.
1.2 3.8-1
1.2.1 SCP and libraries
- Added capability to set line connection order for terminal multiplexers.
1.2.2 HP2100
- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.
1.3 3.8-2
1.3.1 SCP and libraries
- Added line history capability for *nix hosts.
- Added "SHOW SHOW" and "SHOW <dev> SHOW" commands.
1.3.2 1401
- Added "no rewind" option to magtape boot.
1.3.3 PDP-11
- Added RD32 support to RQ
- Added debug support to RL
1.3.4 PDP-8
- Added FPP support (many thanks to Rick Murphy for debugging the code)
1.3.5 VAX-11/780
- Added AUTORESTART switch support, and VMS REBOOT command support
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
The makefile now works for Linux and most Unix's. However, for Solaris
and MacOS, you must first export the OSTYPE environment variable:
> export OSTYPE
> make
Otherwise, you will get build errors.
1. New Features
1.1 3.8-0
1.1.1 SCP and Libraries
- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
show (respectively) a breakpoint at the current PC.
1.1.2 GRI
- Added support for the GRI-99 processor.
1.1.3 HP2100
- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.
1.1.4 Nova
- Added support for 64KW memory (implemented in third-party CPU's).
1.1.5 PDP-11
- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.
1.2 3.8-1
1.2.1 SCP and libraries
- Added capability to set line connection order for terminal multiplexers.
1.2.2 HP2100
- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.
1.3 3.8-2
1.3.1 1401
- Added "no rewind" option to magtape boot.
1.3.2 PDP-11
- Added RD32 support to RQ
- Added debug support to RL
1.3.3 PDP-8
- Added FPP support (many thanks to Rick Murphy for debugging the code)
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:
> export OSTYPE
> make
Otherwise, you will get build errors.
1. New Features
1.1 3.8-0
1.1.1 SCP and Libraries
- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
show (respectively) a breakpoint at the current PC.
1.1.2 GRI
- Added support for the GRI-99 processor.
1.1.3 HP2100
- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.
1.1.4 Nova
- Added support for 64KW memory (implemented in third-party CPU's).
1.1.5 PDP-11
- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.
1.2 3.8-1
1.2.1 SCP and libraries
- Added capability to set line connection order for terminal multiplexers.
1.2.2 HP2100
- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:
> export OSTYPE
> make
Otherwise, you will get build errors.
1. New Features
1.1 3.8-0
1.1.1 SCP and Libraries
- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
show (respectively) a breakpoint at the current PC.
1.2 GRI
- Added support for the GRI-99 processor.
1.3 HP2100
- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.
1.4 Nova
- Added support for 64KW memory (implemented in third-party CPU's).
1.5 PDP-11
- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
1. New Features
1.1 3.7-0
1.1.1 SCP
- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
Dave Bryan).
1.1.2 HP2100
- Added Double Integer instructions, 1000-F CPU, and Floating Point
Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
21xx binary loader protection (from Dave Bryan).
1.1.3 Interdata
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state.
1.1.4 PDP-11
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (WAIT instruction executed).
- Added TA11/TU60 cassette support.
1.1.5 PDP-8
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.
1.1.6 PDP-1
- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.
1.1.6 PDP-4/7/9/15
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
1.1.7 VAX, VAX780
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).
1.1.8 PDP-10
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (operating system dependent).
- Added CD20 (CD11) support.
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
1. New Features
1.1 3.7-0
1.1.1 SCP
- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
Dave Bryan).
1.1.2 HP2100
- Added Double Integer instructions, 1000-F CPU, and Floating Point
Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
21xx binary loader protection (from Dave Bryan).
1.1.3 Interdata
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state.
1.1.4 PDP-11
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (WAIT instruction executed).
- Added TA11/TU60 cassette support.
1.1.5 PDP-8
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.
1.1.6 PDP-1
- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.
1.1.6 PDP-4/7/9/15
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
1.1.7 VAX, VAX780
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).
1.1.8 PDP-10
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (operating system dependent).
- Added CD20 (CD11) support.
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
1. New Features
1.1 3.7-0
1.1.1 SCP
- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
Dave Bryan).
1.1.2 HP2100
- Added Double Integer instructions, 1000-F CPU, and Floating Point
Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
21xx binary loader protection (from Dave Bryan).
1.1.3 Interdata
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state.
1.1.4 PDP-11
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (WAIT instruction executed).
- Added TA11/TU60 cassette support.
1.1.5 PDP-8
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.
1.1.6 PDP-1
- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.
1.1.6 PDP-4/7/9/15
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
1.1.7 VAX, VAX780
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).
1.1.8 PDP-10
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (operating system dependent).
- Added CD20 (CD11) support.
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
1. New Features
1.1 3.7-0
1.1.1 SCP
- Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator
execution rate and host resource utilization.
- Added idle support (based on work by Mark Pizzolato).
- Added -e to control error processing in nested DO commands (from
Dave Bryan).
1.1.2 HP2100
- Added Double Integer instructions, 1000-F CPU, and Floating Point
Processor (from Dave Bryan).
- Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and
21xx binary loader protection (from Dave Bryan).
1.1.3 Interdata
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state.
1.1.4 PDP-11
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (WAIT instruction executed).
- Added TA11/TU60 cassette support.
1.1.5 PDP-8
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
- Added TA8E/TU60 cassette support.
1.1.6 PDP-1
- Added support for 16-channel sequence break system.
- Added support for PDP-1D extended features and timesharing clock.
- Added support for Type 630 data communications subsystem.
1.1.6 PDP-4/7/9/15
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (keyboard poll loop or jump-to-self).
1.1.7 VAX, VAX780
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode).
1.1.8 PDP-10
- Added SET IDLE and SET NOIDLE commands to idle the simulator in wait
state (operating system dependent).
- Added CD20 (CD11) support.
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
The save/restore format has been updated to improve its reliability.
As a result, save files prior to release 3.0 are no longer supported.
The text documentation files are obsolete and are no longer included
with the distribution. Up-to-date PDF documentation files are
available on the SimH web site.
1. New Features
1.1 3.6-0
1.1.1 Most magnetic tapes
- Added support for limiting tape capacity to a particular size in MB
1.1.2 IBM 7090/7094
- First release
1.1.3 VAX-11/780
- Added FLOAD command, loads system file from console floppy disk
1.1.4 VAX, VAX-11/780, and PDP-11
- Added card reader support (from John Dundas)
1.1.5 PDP-11
- Added instruction history
2. Bugs Fixed
Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
The source set has been extensively overhauled. For correct
viewing, set Visual C++ or Emacs to have tab stops every 4
characters.
1. New Features
1.1 3.5-0
1.1.1 All Ethernet devices
- Added Windows user-defined adapter names (from Timothe Litt)
1.1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors
- Added support for SET <unit>n DISCONNECT
1.1.3 VAX
- Added latent QDSS support
- Revised autoconfigure to handle QDSS
1.1.4 PDP-11
- Revised autoconfigure to handle more cases
1.2 3.5-1
No new features
1.3 3.5-2
1.3.1 All ASCII terminals
- Most ASCII terminal emulators have supported 7-bit and 8-bit
operation; where required, they have also supported an upper-
case only or KSR-emulation mode. This release adds a new mode,
7P, for 7-bit printing characters. In 7P mode, non-printing
characters in the range 0-31 (decimal), and 127 (decimal), are
automatically suppressed. This prevents printing of fill
characters under Windows.
The printable character set for ASCII code values 0-31 can be
changed with the SET CONSOLE PCHAR command. Code value 127
(DELETE) is always suppressed.
1.3.2 VAX-11/780
- First release. The VAX-11/780 has successfully run VMS V7.2. The
commercial instructions and compatability mode have not been
extensively tested. The Ethernet controller is not working yet
and is disabled.
2. Bugs Fixed
2.1 3.5-0
2.1.1 SCP and libraries
- Trim trailing spaces on all input (for example, attach file names)
- Fixed sim_sock spurious SIGPIPE error in Unix/Linux
- Fixed sim_tape misallocation of TPC map array for 64b simulators
2.1.2 1401
- Fixed bug, CPU reset was clearing SSB through SSG
2.1.3 PDP-11
- Fixed bug in VH vector display routine
- Fixed XU runt packet processing (found by Tim Chapman)
2.1.4 Interdata
- Fixed bug in SHOW PAS CONN/STATS
- Fixed potential integer overflow exception in divide
2.1.5 SDS
- Fixed bug in SHOW MUX CONN/STATS
2.1.6 HP
- Fixed bug in SHOW MUX CONN/STATS
2.1.7 PDP-8
- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG
2.1.8 PDP-18b
- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG
2.1.9 Nova, Eclipse
- Fixed potential integer overflow exception in divide
2.2 3.5-1
2.2.1 1401
- Changed character encodings to be compatible with Pierce 709X simulator
- Added mode for old/new character encodings
2.2.2 1620
- Changed character encodings to be compatible with Pierce 709X simulator
2.2.3 PDP-10
- Changed MOVNI to eliminate GCC warning
2.2.4 VAX
- Fixed bug in structure definitions with 32b compilation options
- Fixed bug in autoconfiguration table
2.2.5 PDP-11
- Fixed bug in autoconfiguration table
2.3 3.5-2
2.3.1 PDP-10
- RP: fixed drive clear not to clear disk address
2.3.2 PDP-11 (VAX, VAX-11/780, for shared peripherals)
- HK: fixed overlap seek interaction with drive select, drive clear, etc
- RQ, TM, TQ, TS, TU: widened address display to 64b when USE_ADDR64 option selected
- TU: changed default adapter from TM02 to TM03 (required by VMS)
- RP: fixed drive clear not to clear disk address
- RP, TU: fixed device enable/disable to enabled/disable Massbus adapter as well
- XQ: fixed register access alignment bug (found by Doug Carman)
2.3.3 PDP-8
- RL: fixed IOT 61 decoding bug (found by David Gesswein)
- DF, DT, RF: fixed register access alignment bug (found by Doug Carman)
2.3.4 VAX
- Fixed CVTfi to trap on integer overflow if PSW<iv> is set
- Fixed breakpoint detection when USE_ADDR64 option selected
The source set has been extensively overhauled. For correct
viewing, set Visual C++ or Emacs to have tab stops every 4
characters.
1. New Features
1.1 3.5-0
1.1.1 All Ethernet devices
- Added Windows user-defined adapter names (from Timothe Litt)
1.1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors
- Added support for SET <unit>n DISCONNECT
1.1.3 VAX
- Added latent QDSS support
- Revised autoconfigure to handle QDSS
1.1.4 PDP-11
- Revised autoconfigure to handle more casees
2. Bugs Fixed
2.1 3.5-0
2.1.1 SCP and libraries
- Trim trailing spaces on all input (for example, attach file names)
- Fixed sim_sock spurious SIGPIPE error in Unix/Linux
- Fixed sim_tape misallocation of TPC map array for 64b simulators
2.1.2 1401
- Fixed bug, CPU reset was clearing SSB through SSG
2.1.3 PDP-11
- Fixed bug in VH vector display routine
- Fixed XU runt packet processing (found by Tim Chapman)
2.1.4 Interdata
- Fixed bug in SHOW PAS CONN/STATS
- Fixed potential integer overflow exception in divide
2.1.5 SDS
- Fixed bug in SHOW MUX CONN/STATS
2.1.6 HP
- Fixed bug in SHOW MUX CONN/STATS
2.1.7 PDP-8
- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG
2.1.8 PDP-18b
- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG
2.1.9 Nova, Eclipse
- Fixed potential integer overflow exception in divide
2.2 3.5-1
2.2.1 1401
- Changed character encodings to be compatible with Pierce 709X simulator
- Added mode for old/new character encodings
2.2.2 1620
- Changed character encodings to be compatible with Pierce 709X simulator
2.2.3 PDP-10
- Changed MOVNI to eliminate GCC warning
2.2.4 VAX
- Fixed bug in structure definitions with 32b compilation options
- Fixed bug in autoconfiguration table
2.2.5 PDP-11
- Fixed bug in autoconfiguration table
The source set has been extensively overhauled. For correct
viewing, set Visual C++ or Emacs to have tab stops every 4
characters.
1. New Features in 3.4-1
1.1 All Ethernet devices
- Added Windows user-defined adapter names (from Timothe Litt)
1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors
- Added support for SET <unit>n DISCONNECT
1.3 VAX
- Added latent QDSS support
- Revised autoconfigure to handle QDSS
1.4 PDP-11
- Revised autoconfigure to handle more casees
2. Bugs Fixed in 3.4-1
2.1 SCP and libraries
- Trim trailing spaces on all input (for example, attach file names)
- Fixed sim_sock spurious SIGPIPE error in Unix/Linux
- Fixed sim_tape misallocation of TPC map array for 64b simulators
2.2 1401
- Fixed bug, CPU reset was clearing SSB through SSG
2.3 PDP-11
- Fixed bug in VH vector display routine
- Fixed XU runt packet processing (found by Tim Chapman)
2.4 Interdata
- Fixed bug in SHOW PAS CONN/STATS
- Fixed potential integer overflow exception in divide
2.5 SDS
- Fixed bug in SHOW MUX CONN/STATS
2.6 HP
- Fixed bug in SHOW MUX CONN/STATS
2.7 PDP-8
- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG
2.8 PDP-18b
- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG
2.9 Nova, Eclipse
- Fixed potential integer overflow exception in divide
The memory layout for the Interdata simulators has been changed.
Do not use Interdata SAVE files from prior revisions with V3.4.
1. New Features in 3.4
1.1 SCP and Libraries
- Revised interpretation of fprint_sym, fparse_sym returns
- Revised syntax for SET DEBUG
- DO command nesting allowed to ten levels
1.2 Interdata
- Revised memory model to be 16b instead of 8b
1.3 HP2100
- Added Fast FORTRAN Processor instructions
- Added SET OFFLINE/ONLINE and SET UNLOAD/LOAD commands to tapes and disks
2. Bugs Fixed in 3.4-0
2.1 Interdata
- Fixed bug in show history routine (from Mark Hittinger)
- Fixed bug in initial memory allocation
2.2 PDP-10
- Fixed TU bug, ERASE and WREOF should not clear done (reported by
Rich Alderson)
- Fixed TU error reporting
2.3 PDP-11
- Fixed TU error reporting
1. New Features in 3.3-2
1.1 SCP and Libraries
- Added ASSERT command (from Dave Bryan)
1.2 PDP-11, VAX
- Added RA60, RA71, RA81 disks
2. Bugs Fixed in 3.3-2
2.1 H316
- Fixed IORETURN macro
- PT: fixed bug in OCP '0001 (found by Philipp Hachtmann)
- MT: fixed error reporting from OCP (found by Philipp Hachtmann)
2.2 Interdata 32b
- Fixed branches to mask new PC (from Greg Johnson)
2.3 PDP-11
- Fixed bugs in RESET for 11/70 (reported by Tim Chapman)
- Fixed bug in SHOW MODEL (from Sergey Okhapkin)
- Made SYSID variable for 11/70 (from Tim Chapman)
- Fixed MBRK write case for 11/70 (from Tim Chapman)
- RY: fixed bug in boot code (reported by Graham Toal)
2.4 VAX
- Fixed initial state of cpu_extmem
2.5 HP2100 (from Dave Bryan)
- Fixed missing MPCK on JRS target
- Removed EXECUTE instruction (is NOP in actual microcode)
- Fixed missing negative overflow renorm in StoreFP
2.6 I1401
- Fixed bug in line printer write line (reported by Van Snyder)
1. New Features in 3.3-1
1.1 H316
TTY - implemented paper-tape reader and punch
- added ASCII file support
PTR,PTP - added ASCII file support
1.2 HP2100
CPU - added SET CPU 21MX-M, 21MX-E (from Dave Brian)
- disabled TIMER/EXECUTE/DIAG instructions for 21MX-M (from Dave Bryan)
- added post-processor to maintain T/M consistency (from Dave Bryan)
DS - released 13037 disk controller
1.3 Interdata
MT - added read-only file support
1.4 SDS
MT - added read-only file support
1.5 PDP-11
TM,TS - added read-only file support
2. Bugs Fixed in 3.3
2.1 H316
CPU - fixed bug in divide
LPT - fixed bug in DMA/DMC support
MT - fixed bug in DMA/DMC support
DP - fixed bug in skip on not seeking
TTY - fixed bugs in SKS '104, '504
2.2 HP2100
CPU - fixed DMA reset to clear alternate CTL flop (from Dave Bryan)
- fixed bug in JPY (from Dave Bryan)
- fixed bugs in CBS, SBS, TBS
- separate A/B from M[0/1] for DMA (found by Dave Bryan)
LPS - added restart when set online, etc. (from Dave Bryan)
- fixed col count for non-printing chars (from Dave Bryan)
LPT - added restart when set online, etc. (from Dave Bryan)
2.3 PDP-11
CPU - fixed WAIT to work in all modes (from John Dundas)
RESTRICTION: The HP DS disk is not debugged. DO NOT enable this
feature for normal operations.
WARNING: Massive changes in the PDP-11 make all previous SAVEd
file obsolete. Do not attempt to use a PDP-11 SAVE file from a
prior release with V3.3!
1. New Features in 3.3
1.1 SCP
- Added -p (powerup) qualifier to RESET
- Changed SET <unit> ONLINE/OFFLINE to SET <unit> ENABLED/DISABLED
- Moved SET DEBUG under SET CONSOLE hierarchy
- Added optional parameter value to SHOW command
- Added output file option to SHOW command
1.2 PDP-11
- Separated RH Massbus adapter from RP controller
- Added TU tape support
- Added model emulation framework
- Added model details
1.3 VAX
- Separated out CVAX-specific features from core instruction simulator
- Implemented capability for CIS, octaword, compatibility mode instructions
- Added instruction display and parse for compatibility mode
- Changed SET CPU VIRTUAL=n to SHOW CPU VIRTUAL=n
- Added =n optional parameter to SHOW CPU HISTORY
1.4 Unibus/Qbus simulators (PDP-11, VAX, PDP-10)
- Simplified DMA API's
- Modified DMA peripherals to use simplified API's
1.5 HP2100 (all changes from Dave Bryan)
CPU - moved MP into its own device; added MP option jumpers
- modified DMA to allow disabling
- modified SET CPU 2100/2116 to truncate memory > 32K
- added -F switch to SET CPU to force memory truncation
- modified WRU to be REG_HRO
- added BRK and DEL to save console settings
DR - provided protected tracks and "Writing Enabled" status bit
- added "parity error" status return on writes for 12606
- added track origin test for 12606
- added SCP test for 12606
- added "Sector Flag" status bit
- added "Read Inhibit" status bit for 12606
- added TRACKPROT modifier
LPS - added SET OFFLINE/ONLINE, POWEROFF/POWERON
- added fast/realistic timing
- added debug printouts
LPT - added SET OFFLINE/ONLINE, POWEROFF/POWERON
PTR - added paper tape loop mode, DIAG/READER modifiers to PTR
- added PV_LEFT to PTR TRLLIM register
CLK - modified CLK to permit disable
1.6 IBM 1401, IBM 1620, Interdata 16b, SDS 940, PDP-10
- Added instruction history
1.7 H316, PDP-15, PDP-8
- Added =n optional value to SHOW CPU HISTORY
2. Bugs Fixed in 3.3
2.1 SCP
- Fixed comma-separated SET options (from Dave Bryan)
- Fixed duplicate HELP displays with user-specified commands
2.2 PDP-10
- Replicated RP register state per drive
- Fixed TU to set FCE on short record
- Fixed TU to return bit<15> in drive type
- Fixed TU format specification, 1:0 are don't cares
- Fixed TU handling of TMK status
- Fixed TU handling of DONE, ATA at end of operation
- Implemented TU write check
2.3 PDP-11
- Replicated RP register state per drive
- Fixed RQ, TQ to report correct controller type and stage 1 configuration
flags on a Unibus system
- Fixed HK CS2<output_ready> flag
2.4 VAX
- Fixed parsing of indirect displacement modes in instruction input
2.5 HP2100 (all fixes from Dave Bryan)
CPU - fixed S-register behavior on 2116
- fixed LIx/MIx behavior for DMA on 2116 and 2100
- fixed LIx/MIx behavior for empty I/O card slots
DP - fixed enable/disable from either device
- fixed ANY ERROR status for 12557A interface
- fixed unattached drive status for 12557A interface
- status cmd without prior STC DC now completes (12557A)
- OTA/OTB CC on 13210A interface also does CLC CC
- fixed RAR model
- fixed seek check on 13210 if sector out of range
DQ - fixed enable/disable from either device
- shortened xtime from 5 to 3 (drive avg 156KW/second)
- fixed not ready/any error status
- fixed RAR model
DR - fixed enable/disable from either device
- fixed sector return in status word
- fixed DMA last word write, incomplete sector fill value
- fixed 12610 SFC operation
- fixed current-sector determination
IPL - fixed enable/disable from either device
LPS - fixed status returns for error conditions
- fixed handling of non-printing characters
- fixed handling of characters after column 80
- improved timing model accuracy for RTE
LPT - fixed status returns for error conditions
- fixed TOF handling so form remains on line 0
SYS - fixed display of CCA/CCB/CCE instructions
2.5 PDP-15
FPP - fixed URFST to mask low 9b of fraction
- fixed exception PC setting
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT
enable this feature for normal operations.
RESTRICTION: The HP DS disk is not debugged. DO NOT enable this
feature for normal operations.
1. New Features in 3.2-3
1.1 SCP
- Added ECHO command (from Dave Bryan)
2. Bugs Fixed in 3.2-2
2.1 SCP
- Qualified RESTORE detach with SIM_SW_REST
- Fixed OS/2 issues in sim_console.c and sim_sock.h
2.2 HP2100 (all from Dave Bryan)
- Changed CPU error stops to report PC not PC + 1
- Fixed CLC to DR to stop operation in progress
- Functional and timing fixes to DP
> controller sets ATN for all commands except read status
> controller resumes polling for ATN interrupts after read status
> check status on unattached drive set busy and not ready
> check status tests wrong unit for write protect status
> drive on line sets ATN, will set FLG if polling
- Functional and timing fixes to MS
> fixed erroneous execution of rejected command
> fixed erroneous execution of select-only command
> fixed erroneous execution of clear command
> fixed odd byte handling for read
> fixed spurious odd byte status on 13183A EOF
> modified handling of end of medium
> added detailed timing, with fast and realistic modes
> added reel sizes to simulate end of tape
> added debug printouts
- Modified MT handling of end of medium
- Added tab to TTY control char set
2.3 VAX
- VAX RQ controllers start LUNs at 0 (from Andreas Cejna)
- Added compatibility mode definitions
- Fixed EMODD, EMODG to probe second longword of quadword destination
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT
enable this feature for normal operations.
RESTRICTION: The HP DS disk is not debugged. DO NOT enable this
feature under any circumstances.
1. New Features in 3.2-2
None
2. Bugs Fixed in 3.2-2
2.1 SCP
- Fixed problem ATTACHing to read-only files (found by John Dundas)
- Fixed problems in Windows terminal code (found by Dave Bryan)
- Fixed problem in big-endian reads (reported by Scott Bailey)
2.2 GRI-909
- Updated MSR to include SOV
- Updated EAO to include additional functions
2.2 HP2100 (from Dave Bryan)
- Generalized control character handling for console terminal
2.3 VAX
- Fixed bad block initialization routine
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT
enable this feature for normal operations.
1. New Features in 3.2-1
1.1 SCP and libraries
- Added SET CONSOLE subhierarchy.
- Added SHOW CONSOLE subhierarchy.
- Added limited keyboard mapping capability.
1.2 HP2100 (new features from Dave Bryan)
- Added instruction printout to HALT message.
- Added M and T internal registers.
- Added N, S, and U breakpoints.
1.3 PDP-11 and VAX
- Added DHQ11 support (from John Dundas)
2. Bugs Fixed in 3.2-1
2.1 HP2100 (most fixes from Dave Bryan)
- SBT increments B after store.
- DMS console map must check dms_enb.
- SFS x,C and SFC x,C work.
- MP violation clears automatically on interrupt.
- SFS/SFC 5 is not gated by protection enabled.
- DMS enable does not disable mem prot checks.
- DMS status inconsistent at simulator halt.
- Examine/deposit are checking wrong addresses.
- Physical addresses are 20b not 15b.
- Revised DMS to use memory rather than internal format.
- Revised IBL facility to conform to microcode.
- Added DMA EDT I/O pseudo-opcode.
- Separated DMA SRQ (service request) from FLG.
- Revised peripherals to make SFS x,C and SFC x,C work.
- Revised boot ROMs to use IBL facility.
- Revised IBL treatment of SR to preserve SR<5:3>.
- Fixed LPS, LPT timing.
- Fixed DP boot interpretation of SR<0>.
- Revised DR boot code to use IBL algorithm.
- Fixed TTY input behavior during typeout for RTE-IV.
- Suppressed nulls on TTY output for RTE-IV.
- Added SFS x,C and SFC x,C to print/parse routines.
- Fixed spurious timing error in magtape reads.
2.2 All DEC console devices
- Removed SET TTI CTRL-C option.
2.3 PDP-11/VAX peripherals
- Fixed bug in TQ reporting write protect status (reported by Lyle Bickley).
- Fixed TK70 model number and media ID (found by Robert Schaffrath).
- Fixed bug in autoconfigure (found by John Dundas).
2.4 VAX
- Fixed bug in DIVBx and DIVWx (reported by Peter Trimmel).
