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- The div instruction gave wrong results in some corner cases when either

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divisor or quotient were the largest negative integer (100000 or -32768).
  This is corrected now, for details see ECO-026-div.txt
- some minor updates and fixes to support scripts
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt
This commit is contained in:
Walter F.J. Mueller
2014-08-10 14:32:48 +00:00
parent 46331caebb
commit 093d540121
91 changed files with 2174 additions and 1018 deletions
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1
.cvsignore
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@@ -25,6 +25,7 @@ fuse.log
*_twr.log
*_map.log
*_par.log
*_tsi.log
*_pad.log
*_bgn.log
*_svn.log

3
Makefile
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@@ -1,4 +1,4 @@
# $Id: Makefile 538 2013-10-06 17:21:25Z mueller $
# $Id: Makefile 562 2014-06-15 17:23:18Z mueller $
#
# 'Meta Makefile' for whole retro project
# allows to make all synthesis targets
@@ -6,6 +6,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-06-14 562 1.0.8 suspend nexys4 syn targets
# 2013-09-28 535 1.0.7 add nexys4 port for sys_gen/tst_sram,w11a
# 2013-05-01 513 1.0.6 add clean_sim_tmp and clean_syn_tmp targets
# 2012-12-29 466 1.0.5 add tst_rlink_cuff

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doc/ECO-026-div.txt Normal file
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@@ -0,0 +1,108 @@
$Id: ECO-026-div.txt 579 2014-08-08 20:39:46Z mueller $
Scope:
Introduced in release w11a_V0.61
Affects: all w11a systems
Symptom summary:
The div instruction gave wrong results in some corner cases when either
divisor or quotient were the largest negative integer (100000 or -32768):
1. wrong q and r when dd=n*(-32768), dr=-32768 with n even
2. V=1 set when division solvable and proper result is q=-32768
Background:
The PDP-11/70 (KB11-C) and the w11a use very different division algorithms.
Both use a non-restoring divide.
- The KB11-C uses a straight forward 2 quadrant core algorithm for positive
dividends and positive or negative divisors. Negative dividends are first
converted to positive, the results later corrected. This leads to quite
complex implementation with 35 micro states.
- The w11a uses a 4 quadrant algorithm which directly allows positive and
negative dividends and divisors. The qbit logic is much more complex in
this case. Advantage is that the whole divide algorithm can be implemented
with only 6 states in the main sequencer.
In twos complement integer arithmetic, as used in the pdp11 and almost all
contemporary computers, the range of positive and negative numbers is
different, for 16 bit for example
oct 100000 to 077777
dec -32768 to +32767
so the smallest negative number has no positive counterpart. Trying to negate
the smallest negative number leads to the same number
mov #100000, r0
neg r0 --> r0 = 100000; V=1
These special properties of the largest negative number easily lead to corner
cases which require special treatment, both the KB11-C and the w11a divide
algorithms need special rules and checks for this.
Summary of issues:
1. when dividend was dd=n*(-32768) with an even n and the divisor was
dr=-32768 the old w11a algorithm returned wrong quotient and remainder
values and V=0 status.
2. for all divisions which result in a quotient of -32768 the old w11a
algorithm set the overflow (V=1) condition. Since in this case the
destination registers were not updated and still contained the
dividend, software not checking the V code saw wrong quotient and
remainder values.
Fixes:
- Issue 1: wrong q and r for dd=n*(-32768), dr=-32768 with n even.
- the corner case is detected in state s_opg_div by testing that divisor
is 0100000 and low order part of dividend is zero. When detected, the
qbit logic is modified and quotient and remainder corrections are done
unconditionally.
- Issue 2: V=1 set when division solvable and proper result is q=-32768.
The divide core algorithm calculates the correct q and r, only the
overflow testing was incorrect.
The old algorithm had two overflow abort conditions
- a check that bit 31 and 30 of the dividend are equal
- a check after the first division cycle
The new algorithm now has three overflow abort conditions
- the bit 31/30 check on the dividend was too restrictive. Valid divisions
with dd=(-32768)*(-32768)+n and dr=-32768 giving q=-32768 and r=n would
be rejected. The 31/30 check is now only applied when the divisor is not
equal 0100000
- the division abort condition in the first division cycle was completely
revised, this avoids that solvable divisions are aborted at this stage
- the first two conditions don't catch all overflow situations. The
remaining ones all have after the quotient correction stage q>0 when
a negative quotient is expected. A third overflow check was added to
s_opg_div_sr to handle these cases.
Side effects:
- the old implementation guaranteed that the destination registers were
unchanged in case of overflow. The new does not, the overflow check in
s_opg_div_sr is done after the quotient is stored, and storing remainder
is not suppressed in case of overflow. So both q and r regs are changed.
- with additional states it could be guaranteed that destination registers
are never updated in case of overflow. See proviso below.
- the pdp-11/70 KB11-C in most cases keeps destination registers unchanged
in case of overflow, but also has a late check after one register has
been modified.
- the J11 never updates registers in case of overflow. A case like
0,177777 / 177777 were w11a now updates regs is known from J11
diagnostics to not update in J11.
- simh always preserves the destination registers in case of overflow.
!! the pdp11 processor handbook considers the destination registers as !!
!! undefined in case of division overflow, so the w11a behavior is OK. !!
Provisos:
- the behavior after V=1 aborts of a div instruction is now different in
- w11a --> regs updated under some rare conditions
- KB11-C --> regs updated under some rare conditions
but in cases different from w11a
- 11/44 --> regs updated under some conditions (see v7_longdivide_bug.txt)
- J11 --> regs never updated
- simh --> regs never updated
--> that can lead to spurious failures in original DEC diagnostics when
they test the complete response
--> even though the current w11a behavious is full within specs it is unclear
whether all software tolerates this, especially non-DEC OS. Unix V7 is
known to have an issue with ldiv and CPUs not preserving regs, see
http://minnie.tuhs.org/PUPS/v7_longdivide_bug.txt
--> Only further studes can show whether it is worth the effort and the
slow down of 1-2 cycles to guarantee preserved registers.

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doc/FILES.txt Normal file
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@@ -0,0 +1,63 @@
$Id: FILES.txt 577 2014-08-03 20:49:42Z mueller $
Short description of the directory layout, what is where ?
doc Documentation
doc/man man pages for retro11 commands
rtl VHDL sources
rtl/bplib - board and component support libs
rtl/bplib/atlys - for Digilent Atlys board
rtl/bplib/fx2lib - for Cypress FX2 USB interface controller
rtl/bplib/issi - for ISSI parts
rtl/bplib/micron - for Micron parts
rtl/bplib/nexys2 - for Digilent Nexsy2 board
rtl/bplib/nexys3 - for Digilent Nexsy3 board
rtl/bplib/nxcramlib - for CRAM part used in Nexys2/3
rtl/bplib/s3board - for Digilent S3BOARD
rtl/ibus - ibus devices (UNIBUS peripherals)
rtl/sys_gen - top level designs
rtl/sys_gen/tst_fx2loop - top level designs for Cypress FX2 tester
nexys2,nexys3 - systems for Nexsy2,Nexsy3
rtl/sys_gen/tst_rlink - top level designs for an rlink tester
nexys2,nexys3,s3board - systems for Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/tst_rlink_cuff - top level designs for rlink over FX2 tester
nexys2,nexys3,atlys - systems for Atlys,Nexsy2,Nexsy3
rtl/sys_gen/tst_serloop - top level designs for serport loop tester
nexys2,nexys3,s3board - systems for Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/tst_snhumanio - top level designs for human I/O tester
atlys,nexys2,nexys3,s3board - systems for Atlys,Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/w11a - top level designs for w11a SoC
nexys2,nexys3,s3board - w11a systems for Nexsy2,Nexsy3,S3BOARD
rtl/vlib - VHDL component libs
rtl/vlib/comlib - communication
rtl/vlib/genlib - general
rtl/vlib/memlib - memory
rtl/vlib/rbus - rri: rbus
rtl/vlib/rlink - rri: rlink
rtl/vlib/serport - serial port (UART)
rtl/vlib/simlib - simulation helper lib
rtl/vlib/xlib - Xilinx specific components
rtl/w11a - w11a core
tools helper programs
tools/asm-11 - pdp-11 assembler code
tools/asm-11/tests - test bench for asm-11
tools/asm-11/tests-err - test bench for asm-11 (error check part)
tools/bin - scripts and binaries
tools/dox - Doxygen documentation configuration
tools/make - make includes
tools/fx2 - Firmware for Cypress FX2 USB Interface
tools/fx2/bin - pre-build firmware images in .ihx format
tools/fx2/src - C and asm sources
tools/fx2/sys - udev rules for USB on fpga eval boards
tools/oskit - setup files for Operation System kits
tools/oskit/... - several PDP-11 system kits available
tools/src - C++ sources for rlink backend software
tools/src/librlink - basic rlink interface
tools/src/librlinktpp - C++ to tcl binding for rlink interface
tools/src/librtcltools - support classes to implement Tcl bindings
tools/src/librtools - general support classes and methods
tools/src/librutiltpp - Tcl support commands implemented in C++
tools/src/librw11 - w11 over rlink interface
tools/src/librwxxtpp - C++ to tcl binding for w11 over rlink iface
tools/tbench - w11 CPU test bench
tools/tcl - Tcl scripts

124
doc/INSTALL.txt
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@@ -1,4 +1,4 @@
# $Id: INSTALL.txt 559 2014-06-06 21:26:47Z mueller $
# $Id: INSTALL.txt 576 2014-08-02 12:24:28Z mueller $
Guide to install and build w11a systems, test benches and support software
@@ -15,13 +15,16 @@ Guide to install and build w11a systems, test benches and support software
b. Setup Tcl packages
c. Rebuild Cypress FX2 firmware
6. The build system
6 a. Setting up Xilinx environment with xtwi
7. Building test benches
a. General instructions
b. Available test benches
8. Building systems
a. General instructions
b. Configuring FPGAs
c. Available systems
b. Configuring FPGAs (via make flow)
c. Configuring FPGAs (directly via config_wrapper)
d. Available systems
e. Available bitkits with bit and log files
9. Generate Doxygen based source code view
1. Download ---------------------------------------------------------------
@@ -178,11 +181,11 @@ Guide to install and build w11a systems, test benches and support software
Two helper scripts will create these libraries:
<setup WebPack, e.g. source .../ISE_DS/settings32.sh>
<setup XTWI_PATH, see section 6a.>
cd $RETROBASE
xilinx_ghdl_unisim
xilinx_ghdl_simprim
xtwi xilinx_ghdl_unisim
xtwi xilinx_ghdl_simprim
If you have several WebPack versions installed, repeat for each version.
@@ -204,6 +207,13 @@ Guide to install and build w11a systems, test benches and support software
cd $RETROBASE/tools/src
make -j 4
Default is to compile with -O2 and without -g. These options can be
overwritten with the CXXOPTFLAGS enviromnent variable (or make opion).
To build with -O3 optimize use
make -j 4 CXXOPTFLAGS=-O3
To build a debug version with full symbol table use
make -j 4 CXXOPTFLAGS=-g
To cleanup, e.g. before a re-build
cd $RETROBASE/tools/src
@@ -259,28 +269,43 @@ Guide to install and build w11a systems, test benches and support software
files, often in proper compilation order (libraries before components).
The different tools have different formats of these 'project files'.
The build system employed in this project is based on
"VHDL bill of material" or 'vbom' files
which list for each vhdl source file the libraries and sources for
the instantiated components, the later via their vbom, and last but
not least the name of the vhdl source file. All file name are relative
to the current directory. A recursive traversal through all vbom's gives
for each vhld module all sources needed to compile it. The vbomconv script
in tools/bin does this, and generates depending on options
- make dependency files
- ISE xst project files
- ISE ISim project files
- ghdl commands for analysis, inspection and make step
The build system employed in this project is based on manifest files called
'vbom' or "VHDL bill of material" files
which list for each vhdl source file the libraries and sources for the
instantiated components, the later via their vbom, and last but not least
the name of the vhdl source file.
All file name are relative to the current directory. A recursive traversal
through all vbom's gives for each vhld module all sources needed to compile
it. The vbomconv script in tools/bin does this, and generates depending on
options
- make dependency files
- ISE xst project files
- ISE ISim project files
- ghdl commands for analysis, inspection and make step
The master make files contain pattern rules like
%.ngc : %.vbom -- synthesize with xst
% : %.vbom -- build functional model test bench
which encapsulate all the vbomconf magic
A full w11a is build from more than 80 source files, test benches from
A full w11a is build from about 100 source files, test benches from
even more. Using the vbom's a large number of designs can be easily
maintained.
6a. Setting up Xilinx environment with xtwi --------------------------
The Xilinx ISE setup script redefines PATH and LD_LIBRARY_PATH. The ISE
tools run fine in this environment, but other installed programs on the
system can (and actually do) fail.
The build system uses a small wrapper script called xtwi to encapsulate
the Xilinx environment. It expects that the environment variable XTWI_PATH
is setup to the install path of the ISE version to be used. Without the
/ISE_DS/ which is added by the ISE installation procedure !
Note: don't run the ISE setup scripts ..../settings(32|64).sh in your
working shell. Setup only XTWI_PATH !
7. Building test benches --------------------------------------------------
7a. General instructions ---------------------------------------------
@@ -311,6 +336,8 @@ Guide to install and build w11a systems, test benches and support software
8a. General instructions ---------------------------------------------
First ensure that XTWI_PATH is setup, see section 6a.
To generate a bit file for a system named <sys> all is needed is
make <sys>.bit
@@ -334,6 +361,11 @@ Guide to install and build w11a systems, test benches and support software
make <sys>.jconfig
If a svf file is required for configuring the FPGA a svf can be created
from a bit file with
make <sys>.svf
If only the xst or par output is wanted just use
make <sys>.ngc
@@ -349,7 +381,7 @@ Guide to install and build w11a systems, test benches and support software
after a re-build.
8b. Configuring FPGAs ------------------------------------------------
8b. Configuring FPGAs (via make flow) --------------------------------
The make flow supports also loading the bitstream into FPGAs, either
via Xilinx Impact, or via the Cypress FX2 USB controller is available.
@@ -369,20 +401,23 @@ Guide to install and build w11a systems, test benches and support software
.bit file, and configure the FPGA. In case the bit file is out-of-date
the whole design will be re-implemented before.
8c. Available systems ------------------------------------------------
8c. Configuring FPGAs (directly via config_wrapper) ------------------
The make flow described above uses two scripts
config_wrapper # must be used with xtwi !
fx2load_wrapper
which can be used directly for loading available bit or svf files into
the FPGA. For detailed documentation see the respective man pages.
Examples for the supported boards are given in section 8e.
8d. Available systems ------------------------------------------------
Currently ready to build versions exist for
- Digilent S3BOARD (-1000 FPGA version)
- Digilent Nexys2 board (-1200 FPGA version)
- Digilent Nexys3 board
Tarballs with ready to use bit file and and all logfiles from the tool
chain can be downloaded from
http://www.retro11.de/data/oc_w11/bitkits/
This area is organized in folders for different releases. The tarball
file names contain information about release, Xlinix tool, and design:
<release>_<tool>_<design>.tgz
To build the designs locally use
1. rlink tester
@@ -428,6 +463,39 @@ Guide to install and build w11a systems, test benches and support software
cd $RETROBASE/rtl/sys_gen/w11a/nexys3
make sys_w11a_n3.bit
8e. Available bitkits with bit and log files -------------------------
Tarballs with ready to use bit files and all logfiles from the tool
chain can be downloaded from
http://www.retro11.de/data/oc_w11/bitkits/
This area is organized in folders for different releases. The tarball
file names contain information about release, Xlinix tool, and design:
<release>_<tool>_<design>.tgz
These designs can be loaded with config_wrapper into the FPGA. The
procedures for the supported boards are given below.
Notes:
1. XTWI_PATH and RETROBASE environment variables must be defined.
2. config_wrapper bit2svf is only needed once to create the svf files.
3. fx2load_wrapper is needed once after each board power on.
a. for Digilent S3BOARD (using ISE Impact)
xtwi config_wrapper --board=s3board iconfig <design>.bit
b. for Digilent Nexys2 board (using Cypress FX2 USB controller)
xtwi config_wrapper --board=nexys2 bit2svf <design>.bit
fx2load_wrapper --board=nexys2 --file=nexys2_jtag_2fifo_ic.ihx
xtwi config_wrapper --board=nexys2 jconfig <design>.svf
c. for Digilent Nexys3 board (using Cypress FX2 USB controller)
xtwi config_wrapper --board=nexys3 bit2svf <design>.bit
fx2load_wrapper --board=nexys3 --file=nexys3_jtag_2fifo_ic.ihx
xtwi config_wrapper --board=nexys3 jconfig <design>.svf
9. Generate Doxygen based source code view --------------------------------
Currently there is not much real documentation included in the source

608
doc/README-w11a_V.50-w11a_V0.60.txt Normal file
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@@ -0,0 +1,608 @@
$Id: README-w11a_V.50-w11a_V0.60.txt 578 2014-08-05 21:28:19Z mueller $
Release notes for w11a
Table of content:
1. Documentation
2. Files
3. Change Log
1. Documentation -------------------------------------------------------------
More detailed information on installation, build and test can be found
in the doc directory, specifically
* README.txt: release notes
* INSTALL.txt: installation and building test benches and systems
* w11a_tb_guide.txt: running test benches
* w11a_os_guide.txt: booting operating systems
* w11a_known_issues.txt: known differences, limitations and issues
2. Files ---------------------------------------------------------------------
doc Documentation
doc/man man pages for retro11 commands
rtl VHDL sources
rtl/bplib - board and component support libs
rtl/bplib/atlys - for Digilent Atlys board
rtl/bplib/fx2lib - for Cypress FX2 USB interface controller
rtl/bplib/issi - for ISSI parts
rtl/bplib/micron - for Micron parts
rtl/bplib/nexys2 - for Digilent Nexsy2 board
rtl/bplib/nexys3 - for Digilent Nexsy3 board
rtl/bplib/nxcramlib - for CRAM part used in Nexys2/3
rtl/bplib/s3board - for Digilent S3BOARD
rtl/ibus - ibus devices (UNIBUS peripherals)
rtl/sys_gen - top level designs
rtl/sys_gen/tst_fx2loop - top level designs for Cypress FX2 tester
nexys2,nexys3 - systems for Nexsy2,Nexsy3
rtl/sys_gen/tst_rlink - top level designs for an rlink tester
nexys2,nexys3,s3board - systems for Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/tst_rlink_cuff - top level designs for rlink over FX2 tester
nexys2,nexys3,atlys - systems for Atlys,Nexsy2,Nexsy3
rtl/sys_gen/tst_serloop - top level designs for serport loop tester
nexys2,nexys3,s3board - systems for Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/tst_snhumanio - top level designs for human I/O tester
atlys,nexys2,nexys3,s3board - systems for Atlys,Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/w11a - top level designs for w11a SoC
nexys2,nexys3,s3board - w11a systems for Nexsy2,Nexsy3,S3BOARD
rtl/vlib - VHDL component libs
rtl/vlib/comlib - communication
rtl/vlib/genlib - general
rtl/vlib/memlib - memory
rtl/vlib/rbus - rri: rbus
rtl/vlib/rlink - rri: rlink
rtl/vlib/serport - serial port (UART)
rtl/vlib/simlib - simulation helper lib
rtl/vlib/xlib - Xilinx specific components
rtl/w11a - w11a core
tools helper programs
tools/asm-11 - pdp-11 assembler code
tools/asm-11/tests - test bench for asm-11
tools/asm-11/tests-err - test bench for asm-11 (error check part)
tools/bin - scripts and binaries
tools/dox - Doxygen documentation configuration
tools/make - make includes
tools/fx2 - Firmware for Cypress FX2 USB Interface
tools/fx2/bin - pre-build firmware images in .ihx format
tools/fx2/src - C and asm sources
tools/fx2/sys - udev rules for USB on fpga eval boards
tools/oskit - setup files for Operation System kits
tools/oskit/... - several PDP-11 system kits available
tools/src - C++ sources for rlink backend software
tools/src/librlink - basic rlink interface
tools/src/librlinktpp - C++ to tcl binding for rlink interface
tools/src/librtcltools - support classes to implement Tcl bindings
tools/src/librtools - general support classes and methods
tools/src/librutiltpp - Tcl support commands implemented in C++
tools/src/librw11 - w11 over rlink interface
tools/src/librwxxtpp - C++ to tcl binding for w11 over rlink iface
tools/tbench - w11 CPU test bench
tools/tcl - Tcl scripts
3. Change Log ----------------------------------------------------------------
- w11a_V0.50 -> w11a_V0.60 cummulative summary of key changes
- revised ibus protocol V2 (in w11a_V0.51)
- revised rbus protocol V3 (in w11a_V0.52)
- backend server rewritten in C++ and Tcl (in w11a_V0.53 and w11a_V0.562)
- add Nexys3 port of w11a (in w11a_V0.54)
- add Cypress FX2 support (in w11a_V0.56 and w11a_V0.57)
- added LP11,PC11 support (in w11a_V0.58)
- reference system now ISE 14.7 and Ubuntu 12.04 64 bit, ghdl 0.31
- many code cleanups; use numeric_std
- many documentation improvements
- development status upgraded to beta (from alpha)
- trunk (2014-06-06: svn rev 25(oc) 559+(wfjm); tagged w11a_V0.60) +++++++++
- Summary
- many documentation updates; no functional changes
- New features
- Tarballs with ready to use bit files and and all logfiles from the tool
chain can be downloaded from
http://www.retro11.de/data/oc_w11/bitkits/
This area is organized in folders for different releases. The tarball
file names contain information about release, Xlinix tool, and design.
- Changes
- documentation updates
- URL of oskits changed, they are now unter
http://www.retro11.de/data/oc_w11/oskits
- trunk (2014-05-29: svn rev 22(oc) 556(wfjm); untagged w11a_V0.581) ++++++++
- Summary
- new reference system
- switched from ISE 13.3 to 14.7.
- map/par behaviour changed, unfortunately unfavorably for w11a.
On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can
be achieved now.
- new man pages (in doc/man/man1/)
- support for Spartan-6 CMTs in PLL and DCM mode
- New features
- new modules
- rtl/vlib/xlib
- s6_cmt_sfs_unisim - Spartan-6 CMT for simple frequency synthesis
- s6_cmt_sfs_gsim - dito, simple ghdl simulation model
- tools/src/librutiltpp
- RtclSignalAction - Tcl signal handler
- RtclSystem - Tcl Unix system interface
- new files
- tools/bin/create_disk - creates a disk container file
- tools/bin/xtwi - Xilinx Tool Wrapper script for ISE
- tools/tcl/rw11/defs.tcl - w11a definitions
- Changes
- rtl/make
- imp_*.opt - use -fastpaths, -u, -tsi for trce
- imp_s6_speed.opt - adopt for ISE 14.x
- generic_xflow.mk - use xtwi; trce tsi file; use -C for cpp
- generic_isim.mk - use xtwi
- generic_xflow_cpld.mk - use xtwi
- rtl/sys_gen/*/nexys3
- .../sys_*.vhd - pll support, use clksys_vcodivide ect
- rtl/sys_gen/w11a/nexys3
- sys_conf.vhd - use 72 MHz, no closure in ISE 14.x for 80
- rtl/bplib/nexys(2|3)
- nexys(2|3)_time_fx2_ic.ucf - add VALID for hold time check
- tools/src/librwxxtpp
- RtclRw11Cpu - cp command options modified
- tools/bin
- vbomconv - add --viv_vhdl (for Vivado)
- tools/tcl/rw11
- util.tcl - move definitions to defs.tcl
- Bug fixes
- tools/src/librtools/RlogFile - fix date print (month was off by one)
- tools/tcl/rw11/asm.tcl - asmwait checks now pc if stop: defined
- Other updates
- INSTALL_ghdl.txt - text reflects current situation on ghdl packages
- trunk (2013-05-12: svn rev 21(oc) 518+(wfjm); untagged w11a_V0.58) ++++++++
- Summary
- C++ and Tcl based backend server now fully functional, supports with
DL11, RK11, LP11 and PC11 all devices available in w11a designs
- the old perl based backend server (pi_rri) is obsolete and removed
- operating system kits reorganized
- New features
- new directory trees for
- tools/oskit - operating system kits
- new modules
- tools/src/librw11
- Rw11*LP11 - classes for LP11 printer handling
- Rw11*PC11 - classes for PC11 paper tape handling
- Rw11*Stream* - classes for Virtual stream handling
- tools/src/librwxxtpp
- RtclRw11*LP11 - tcl iface for LP11 printer handling
- RtclRw11*PC11 - tcl iface for PC11 paper tape handling
- RtclRw11*Stream* - tcl iface for Virtual Stream handling
- Changes
- renames
- the w11 backend quick starter now named ti_w11 and under tools/bin
(was rtl/sys_gen/w11a/tb/torri)
- all operating system image related material now under
tools/oskit (was under rtl/sys_gen/w11a/tb)
- Bug fixes
- rtl/ibus/ibdr_lp11 - err flag logic fixed, was cleared in ibus racc read
- rtl/ibus/ibdr_pc11 - rbuf logic fixed. Was broken since ibus V2 update
in V0.51! Went untested because pc11 rarely used.
- trunk (2013-04-27: svn rev 20(oc) 511(wfjm); untagged w11a_V0.57) +++++++++
- Summary
- new C++ and Tcl based backend server supports now RK11 handling
- w11a systems operate with rlink over USB on nexsy2 and nexsy3 boards.
See w11a_os_guide.txt for details
- New features
- new modules
- rtl/bplib/fx2rlink - new vhdl lib with rlink over fx2 modules
- ioleds_sp1c_fx2 - io activity leds for rlink_sp1c_fx2
- rlink_sp1c_fx2 - rlink over serport + fx2 combo
- tools/src/librw11
- Rw11*RK11 - classes for RK11 disk handling
- Rw11*Disk* - classes for Virtual disk handling
- tools/src/librwxxtpp
- RtclRw11*RK11 - tcl iface for RK11 disk handling
- RtclRw11*Disk* - tcl iface for Virtual disk handling
- new files
- rtl/sys_gen/w11a/tb/torri - quick starter for new backend
- Changes
- tcl module renames:
tools/tcl/rw11a -> tools/tcl/rw11
- Bug fixes
- tools/src/ReventLoop: poll list update logic in DoPoll() corrected
- trunk (2013-04-13: svn rev 19(oc) 505(wfjm); untagged w11a_V0.562) +++++++++
- Summary
- V0.53 introduced a new C++ and Tcl based backend server, but only the
very basic rlink handling layer. This step release add now many support
classes for interfacing to w11 system designs, and the associated Tcl
bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler.
Can be used stand-alone to generate 'absolute loader' format files,
but also integrates tightly into the Tcl environment and is used as
building block in the creation of CPU test benches.
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs
See section 9. in INSTALL.txt for details.
- New features
- new directory trees for
- tools/asm-11 - asm-11 code
- tools/asm-11/tests - test bench for asm-11
- tools/asm-11/tests-err - test bench for asm-11 (error check part)
- tools/src/librw11 - w11 over rlink interface
- tools/src/librwxxtpp - C++ to tcl binding for w11 over rlink iface
- tools/tbench - w11 CPU test bench
- new modules
- tools/bin
- asm-11 - simple, Macro-11 syntax subset compatible, assembler
- asm-11_expect - expect checker for asm-11 test bench
- tools/dox
- *.Doxyfile - new descriptors c++,tcl,vhdl docs
- make_dox - driver script to generate c++,tcl,vhdl doxygen docs
- Changes
- vhdl module renames:
vlib/serport -> vlib/serportlib
- vhdl module splits:
bplib/bpgen/bpgenlib -> bpgenlib + bpgenrbuslib
- C++ class splits
librtcltools/RtclProxyBase -> RtclCmdBase + RtclProxyBase
- trunk (2013-01-06: svn rev 18(oc) 472(wfjm); untagged w11a_V0.561) +++++++++
- Summary
- Added simple simulation model of Cypress FX2 and test benches for
functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys
- New features
- new test benches
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/tb/tb_tst_rlink_cuff_ic_n2
- new systems
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/sys_tst_rlink_cuff_ic_n3
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/sys_tst_rlink_cuff_ic_atlys
- Bug fixes
- tools/fx2/src: FX2 firmware now properly re-initializes hardware registers
and will work on Nexys3 and Atlys boards with default Digilent EPROM
- rtl/bplib/fx2lib: read pipeline logic in FX2 controller corrected
- trunk (2013-01-02: svn rev 17(oc) 467(wfjm); untagged w11a_V0.56) ++++++++++
- Summary
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !!
- New reference system
The development and test system was upgraded from Kubuntu 10.04 to 12.04.
The version of several key tools and libraries changed:
linux kernel 3.2.0 (was 2.6.32)
gcc/g++ 4.6.3 (was 4.4.3)
boost 1.46.1 (was 1.40)
libusb 1.0.9 (was 1.0.6)
perl 5.14.2 (was 5.10.1)
tcl 8.5.11 (was 8.4.19)
xilinx ise 13.3 (was 13.1)
--> see INSTALL.txt, INSTALL_ghdl.txt and INSTALL_urjtag.txt
- New features
- added firmware for Cypress FX2 controller
- tools/fx2
- bin - pre-build firmware images in .ihx file format
- src - C and asm sources
- sys - udev rules for usb interfaces on fpga eval boards
- new modules
- rtl/bplib/fx2lib
- fx2_2fifoctl_ic - Cypress EZ-USB FX2 controller (2 fifo; int clk)
- fx2_3fifoctl_ic - Cypress EZ-USB FX2 controller (3 fifo; int clk)
- new systems
- rtl/sys_gen/tst_fx2loop/nexys2/ic/sys_tst_fx2loop_ic_n2
- rtl/sys_gen/tst_fx2loop/nexys2/ic3/sys_tst_fx2loop_ic3_n2
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/sys_tst_rlink_cuff_ic_n2
- tools/bin
- xilinx_sdf_ghdl_filter: tool to patch ISE sdf files for usage with ghdl
- Changes
- documentation
- added a 'system requirements' section in INSTALL.txt
- added INSTALL_ghdl.txt and INSTALL_urjtag.txt covering ghdl and urjtag
- added README_USB-VID-PID.txt
- organizational changes
- added TCLINC,RETRO_FX2_VID,RETRO_FX2_PID environment variables
- functional changes
- tools/bin
- vbomconv - file name substitution handling redone; many vboms updated
- retired modules
- vlib/rlink/tb/
- tbcore_rlink_dcm - obsolete, use tbcore_rlink
- trunk (2011-12-23: svn rev 16(oc) 442(wfjm); untagged w11a_V0.55) +++++++++
- Summary
- added xon/xoff (software flow control) support to serport library
- added test systems for serport verification
- use new serport stack in sys_w11a_* and sys_tst_rlink_* systems
- New features
- new modules
- vlib/serport
- serport_xonrx - xon/xoff logic rx path
- serport_xontx - xon/xoff logic tx path
- serport_1clock - serial port module (uart, fifo, flow control)
- vlib/rlink
- rlink_core8 - rlink core8 with 8bit interface
- rlink_sp1c - rlink_core8 + serport_1clock combo
- new unit tests
- bplib/s3board/tb/tb_s3_sram_memctl (for s3board sram controller
- bplib/nxcramlib/tb/tb_nx_cram_memctl_as (for nexys2,3 cram controller)
- new systems
- sys_gen/tst_serloop/nexys2/sys_tst_serloop1_n2
- sys_gen/tst_serloop/nexys3/sys_tst_serloop1_n3
- sys_gen/tst_serloop/s3board/sys_tst_serloop1_s3
- sys_gen/tst_rlink/s3board/sys_tst_rlink_s3
- Changes
- retired modules
- vlib/rlink
- rlink_rlb2rl - obsolete, now all in rlink_core8
- rlink_base - use now new rlink_core8
- rlink_serport - obsolete, now all in rlink_sp1c
- rlink_base_serport - use now new rlink_sp1c
- trunk (2011-12-04: svn rev 15(oc) 436(wfjm); untagged w11a_V0.54) +++++++++
- Summary
- added support for nexys3 board for w11a
- New features
- new systems
- sys_gen/w11a/nexys3/sys_w11a_n3
- sys_gen/w11a/nexys3/sys_tst_rlink_n3
- Changes
- module renames:
bplib/nexys2/n2_cram_dummy -> bplib/nxcramlib/nx_cram_dummy
bplib/nexys2/n2_cram_memctl_as -> bplib/nxcramlib/nx_cram_memctl_as
- Bug fixes
- tools/src/lib*: backend libraries compile now on 64 bit systems
- trunk (2011-11-20: svn rev 14(oc) 428(wfjm); untagged w11a_V0.532) +++++++++
- Summary
- generalized the 'human I/O' interface for s3board,nexys2/3 and atlys
- added test design for the 'human I/O' interface
- no functional change of w11a CPU core or any existing test systems
- Changes
- functional changes
- use now 'a6' polynomial of Koopman et al for crc8 in rlink
- with one exception all vhdl sources use now numeric_std
- module renames:
vlib/xlib/dcm_sp_sfs_gsim -> vlib/xlib/dcm_sfs_gsim
vlib/xlib/dcm_sp_sfs_unisim -> vlib/xlib/dcm_sfs_unisim_s3e
vlib/xlib/tb/tb_dcm_sp_sfs -> vlib/xlib/tb/tb_dcm_sfs
- New features
- new modules
- rtl/sys_gen/tst_snhumanio
- sub-tree with test design for 'human I/O' interface modules
- atlys, nexys2, and s3board directories contain the systems
for the respective Digilent boards
- trunk (2011-09-11: svn rev 12(oc) 409(wfjm); untagged w11a_V0.531) +++++++++
- Summary
- Many small changes to prepare upcoming support for
- Spartan-6 boards (nexys3 and atlys)
- usage of Cypress FX2 USB interface on nexys2/3 and atlys boards
- no functional change of w11a CPU core or any test systems
- Changes
- use boost libraries instead of custom coding:
- boost/function and /bind for callbacks, retire RmethDscBase and RmethDsc
- boost/foreach for some iterator loops
Note: boost 1.35 and gcc 4.3 or newer is required, see INSTALL.txt
- module renames:
bplib/s3board/s3_rs232_iob_int -> bplib/bpgen/bp_rs232_2line_iob
bplib/s3board/s3_rs232_iob_ext -> bplib/bpgen/bp_rs232_4line_iob
bplib/s3board/s3_dispdrv -> bplib/bpgen/sn_4x7segctl
bplib/s3board/s3_humanio -> bplib/bpgen/sn_humanio
bplib/s3board/s3_humanio_rbus -> bplib/bpgen/sn_humanio_rbus
- other renames:
tools/bin/impact_wrapper -> tools/bin/config_wrapper
- reorganize Makefile includes and xflow option files
rtl/vlib/Makefile.ghdl -> rtl/make/generic_ghdl.mk
rtl/vlib/Makefile.isim -> rtl/make/generic_isim.mk
rtl/vlib/Makefile.xflow -> rtl/make/generic_xflow.mk
rtl/vlib/xst_vhdl.opt -> rtl/make/syn_s3_speed.opt
rtl/vlib/balanced.opt -> rtl/make/imp_s3_speed.opt
- trunk (2011-04-17: svn rev 11(oc) 376(wfjm); untagged w11a_V0.53) ++++++++++
- Summary
- Introduce C++ and Tcl based backend server. A set of C++ classes provide
the basic rlink communication primitives. Additional glue classes provide
a Tcl binding. This first phase contains the basic functionality needed
to control simple test benches.
- add an 'rlink exerciser' (tst_rlink) and a top level design for a Nexys2
board (sys_tst_rlink_n2) and a test suite implemented in Tcl.
- Note: No functional changes in w11a core and I/O system at this point!
The w11a demonstrator systems are still operated with the old
backend code (pi_rri).
- New features
- new directory trees for
- C++ sources of backend (plus make and doxygen documentation support)
- tools/dox - Doxygen documentation configuration
- tools/make - make includes
- tools/src/librlink - basic rlink interface
- tools/src/librlinktpp - C++ to tcl binding for rlink interface
- tools/src/librtools - general support classes and methods
- tools/src/librtcltools - support classes to implement Tcl bindings
- tools/src/librutiltpp - Tcl support commands implemented in C++
- VHDL sources of an 'rlink exerciser'
- rtl/sys_gen/tst_rlink - top level designs for an rlink tester
- rtl/sys_gen/tst_rlink/nexys2 - rlink tester system for Nexsy2 board
- Tcl sources of 'rlink exerciser'
- tools/tcl/rlink - defs and proc's for basic rlink functions
- tools/tcl/rutil - general support procs
- tools/tcl/rbtest - defs and proc's for rbd_tester
- tools/tcl/rbbram - defs and proc's for rbd_bram
- tools/tcl/rbmoni - defs and proc's for rbd_rbmon
- tools/tcl/rbs3hio - defs and proc's for s3_humanio_rbus
- tools/tcl/tst_rlink - defs and proc's for tst_rlink
- new modules
- rtl/vlib/rbus
- rbd_bram - rbus bram test target
- rbd_eyemon - eye monitor for serport's
- rbd_rbmon - rbus monitor
- rbd_tester - rbus tester
- rbd_timer - usec precision timer
- rtl/vlib/memlib
- additional wrappers for distributed and block memories added
- tools/bin
- ti_rri: Tcl driver for rlink tests and servers (will replace pi_rri)
- trunk (2011-01-02: svn rev 9(oc) 352(wfjm); untagged w11a_V0.52) +++++++++++
- Summary
- Introduce rbus protocol V3
- reorganize rbus and rlink modules, many renames
- New features
- vlib/rbus
- added several rbus devices useful for debugging
- rbd_tester: test target, used for example in test benches
- Changes
- module renames:
- the rri (remote-register-interface) components were re-organized and
cleanly separated into rbus and rlink components:
rri/rb_sres_or_* -> rbus/rb_sres_or_*
rri/rri_core -> rlink/rlink_core
rri/rri_base_serport -> rlink/rlink_base_serport
rri/rrilib -> rbus/rblib
-> rlink/rlinklib
rri/rri_serport -> rlink/rlink_serport
rri/tb/rritb_sres_or_mon -> rbus/rb_sres_or_mon
- the rri test bench monitors were reorganized and renamed
rri/tb/rritb_cpmon -> rlink/rlink_mon
rri/tb/rritb_cpmon_sb -> rlink/rlink_mon_sb
rri/tb/rritb_rbmon -> rbus/rb_mon
rri/tb/rritb_rbmon_sb -> rbus/rb_mon_sb
- the rri low level test bench were also renamed
rri/tb/tb_rri -> rlink/tb/tb_rlink
rri/tb/tb_rri_core -> rlink/tb/tb_rlink_direct
rri/tb/tb_rri_serport -> rlink/tb/tb_rlink_serport
- the base modules for rlink+cext based test benches were renamed
rri/tb/rritb_core_cm -> rlink/tb/tbcore_rlink_dcm
rri/tb/rritb_core -> rlink/tb/tbcore_rlink
rri/tb/vhpi_rriext -> rlink/tb/rlink_cext_vhpi
rri/tb/cext_rriext.c -> rlink/tb/rlink_cext.c
- other rri/rbus related renames
bplib/s3board/s3_humanio_rri -> s3_humanio_rbus
w11a/pdp11_core_rri -> pdp11_core_rbus
- other renames
w11a/tb/tb_pdp11_core -> tb_pdp11core
- signal renames:
- rlink interface (defined in rlink/rlinklib.vhd):
- rename rlink port signals:
CP_* -> RL_*
- rename status bit names to better reflect their usage in v3:
ccrc -> cerr - indicates cmd crc error or other cmd level abort
dcrc -> derr - indicates data crc error or other data level abort
ioto -> rbnak - indicates rbus abort, either no ack or timeout
ioerr -> rberr - indicates that rbus err flag was set
- migrate to rbus protocol version 3
- in rb_mreq use now aval,re,we instead of req,we
- basic rbus transaction now takes 2 cycles, one for address select, one
for data exchange. Same concept and reasoning behind as in ibus V2.
- vlib/rlink/rlink_core
- cerr and derr state flags now set on command or data crc errors as well
as on eop/nak aborts when command or wblk data is received.
- has now 'monitor port', RL_MONI.
- RL_FLUSH port removed, the flush logic is now in rlink_serport
- restructured rlink modules
- rlink_core is the rlink protocol engine with a 9 bit wide interface
- rlink_rlb2rl (new) is an adapter to a byte wide interface
- rlink_base (new) combines rlink_core and rlink_rlb2rl
- rlink_serport (re-written) is an adapter to a serial interface
- rlink_base_serport (renamed) combines rlink_base and rlink_serport
- trunk (2010-11-28: svn rev 8(oc) 341(wfjm); untagged w11a_V0.51) +++++++++++
- Summary
- Introduce ibus protocol V2
- Nexys2 systems use DCM
- sys_w11a_n2 now runs with 58 MHz
- New features
- ibus
- added ib_sres_or_mon to check for miss-behaving ibus devices
- added ib_sel to encapsulate address select logic
- nexys2 systems
- now DCM derived system clock supported
- sys_gen/w11a/nexys2
- sys_w11a_n2 now runs with 58 MHz clksys
- Changes
- module renames:
- in future 'box' is used for large autonomous blocks, therefore use
the term unit for purely sequential logic modules:
pdp11_abox -> pdp11_ounit
pdp11_dbox -> pdp11_aunit
pdp11_lbox -> pdp11_lunit
pdp11_mbox -> pdp11_munit
- signal renames:
- renamed RRI_LAM -> RB_LAM in all ibus devices
- renamed CLK -> I_CLK50 in all top level nexys2 and s3board designs
- migrate to ibus protocol version 2
- in ib_mreq use now aval,re,we,rmw instead of req,we,dip
- basic ibus transaction now takes 2 cycles, one for address select, one
for data exchange. This avoids too long logic paths in the ibus logic.
- Bug fixes
- rtl/vlib/Makefile.xflow: use default .opt files under rtl/vlib again.
- w11a_V0.5 (2010-07-23) +++++++++++++++++++++++++++++++++++++++++++++++++++++
Initial release with
- w11a CPU core
- basic set of peripherals: kw11l, dl11, lp11, pc11, rk11/rk05
- just for fun: iist (not fully implemented and tested yet)
- two complete system configurations with
- for a Digilent S3BOARD rtl/sys_gen/w11a/s3board/sys_w11a_s3
- for a Digilent Nexys2 rtl/sys_gen/w11a/nexys2/sys_w11a_n2

606
doc/README.txt
View File

@@ -1,12 +1,11 @@
$Id: README.txt 559 2014-06-06 21:26:47Z mueller $
$Id: README.txt 579 2014-08-08 20:39:46Z mueller $
Release notes for w11a
Table of content:
1. Documentation
2. Files
3. Change Log
2. Change Log
1. Documentation -------------------------------------------------------------
@@ -15,75 +14,50 @@ Release notes for w11a
* README.txt: release notes
* INSTALL.txt: installation and building test benches and systems
* FILES.txt: short description of the directory layout, what is where ?
* w11a_tb_guide.txt: running test benches
* w11a_os_guide.txt: booting operating systems
* w11a_known_issues.txt: known differences, limitations and issues
2. Files ---------------------------------------------------------------------
2. Change Log ----------------------------------------------------------------
doc Documentation
doc/man man pages for retro11 commands
rtl VHDL sources
rtl/bplib - board and component support libs
rtl/bplib/atlys - for Digilent Atlys board
rtl/bplib/fx2lib - for Cypress FX2 USB interface controller
rtl/bplib/issi - for ISSI parts
rtl/bplib/micron - for Micron parts
rtl/bplib/nexys2 - for Digilent Nexsy2 board
rtl/bplib/nexys3 - for Digilent Nexsy3 board
rtl/bplib/nxcramlib - for CRAM part used in Nexys2/3
rtl/bplib/s3board - for Digilent S3BOARD
rtl/ibus - ibus devices (UNIBUS peripherals)
rtl/sys_gen - top level designs
rtl/sys_gen/tst_fx2loop - top level designs for Cypress FX2 tester
nexys2,nexys3 - systems for Nexsy2,Nexsy3
rtl/sys_gen/tst_rlink - top level designs for an rlink tester
nexys2,nexys3,s3board - systems for Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/tst_rlink_cuff - top level designs for rlink over FX2 tester
nexys2,nexys3,atlys - systems for Atlys,Nexsy2,Nexsy3
rtl/sys_gen/tst_serloop - top level designs for serport loop tester
nexys2,nexys3,s3board - systems for Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/tst_snhumanio - top level designs for human I/O tester
atlys,nexys2,nexys3,s3board - systems for Atlys,Nexsy2,Nexsy3,S3BOARD
rtl/sys_gen/w11a - top level designs for w11a SoC
nexys2,nexys3,s3board - w11a systems for Nexsy2,Nexsy3,S3BOARD
rtl/vlib - VHDL component libs
rtl/vlib/comlib - communication
rtl/vlib/genlib - general
rtl/vlib/memlib - memory
rtl/vlib/rbus - rri: rbus
rtl/vlib/rlink - rri: rlink
rtl/vlib/serport - serial port (UART)
rtl/vlib/simlib - simulation helper lib
rtl/vlib/xlib - Xilinx specific components
rtl/w11a - w11a core
tools helper programs
tools/asm-11 - pdp-11 assembler code
tools/asm-11/tests - test bench for asm-11
tools/asm-11/tests-err - test bench for asm-11 (error check part)
tools/bin - scripts and binaries
tools/dox - Doxygen documentation configuration
tools/make - make includes
tools/fx2 - Firmware for Cypress FX2 USB Interface
tools/fx2/bin - pre-build firmware images in .ihx format
tools/fx2/src - C and asm sources
tools/fx2/sys - udev rules for USB on fpga eval boards
tools/oskit - setup files for Operation System kits
tools/oskit/... - several PDP-11 system kits available
tools/src - C++ sources for rlink backend software
tools/src/librlink - basic rlink interface
tools/src/librlinktpp - C++ to tcl binding for rlink interface
tools/src/librtcltools - support classes to implement Tcl bindings
tools/src/librtools - general support classes and methods
tools/src/librutiltpp - Tcl support commands implemented in C++
tools/src/librw11 - w11 over rlink interface
tools/src/librwxxtpp - C++ to tcl binding for w11 over rlink iface
tools/tbench - w11 CPU test bench
tools/tcl - Tcl scripts
- trunk (2014-08-08: svn rev 25(oc) 579(wfjm); tagged w11a_V0.61) ++++++++++
3. Change Log ----------------------------------------------------------------
- Summary
- The div instruction gave wrong results in some corner cases when either
divisor or quotient were the largest negative integer (100000 or -32768).
This is corrected now, for details see ECO-026-div.txt
- some minor updates and fixes to support scripts
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt
- w11a_V0.50 -> w11a_V0.60 cummulative summary of key changes
- New features
- the Makefile's for in all rtl building block directories allow now to
configure the target board for a test synthesis via the XTW_BOARD
environment variable or XTW_BOARD=<board name> make option.
- Changes
- tools/bin/asm-11 - add call and return opcodes
- tools/bin/create_disk - add RM02,RM05,RP04,RP07 support
- tools/bin/tbw - use xtwi to start ISim models
- tools/bin/ticonv_pdpcp - add --tout and --cmax; support .sdef
- tools/dox/*.Doxyfile - use now doxygen 1.8.7
- tools/src/librw11
- Rw11CntlRK11 - add statistics
- Bug fixes
- rtl/w11a - div bug ECO-026
- pdp11_munit - port changes; fix divide logic
- pdp11_sequencer - s_opg_div_sr: check for late div_quit
- pdp11_dpath - port changes for pdp11_munit
- tools/bin/create_disk - repair --boot option (was inaccessible)
- tools/bin/ti_w11 - split args now into ti_w11 opts and cmds
- tools/src/librwxxtpp
- RtclRw11Cpu - redo estatdef logic; avoid LastExpect()
- tools/dox/make_doxy - create directories, fix 'to view use' text
- w11a_V0.6 (2014-06-06) +++++++++++++++++++++++++++++++++++++++++++++++++++++
cummulative summary of key changes from w11a_V0.5 to w11a_V0.60
- revised ibus protocol V2 (in w11a_V0.51)
- revised rbus protocol V3 (in w11a_V0.52)
- backend server rewritten in C++ and Tcl (in w11a_V0.53 and w11a_V0.562)
@@ -95,507 +69,7 @@ Release notes for w11a
- many documentation improvements
- development status upgraded to beta (from alpha)
- trunk (2014-06-06: svn rev 23(oc) 559+(wfjm); tagged w11a_V0.60) +++++++++
- Summary
- many documentation updates; no functional changes
- New features
- Tarballs with ready to use bit files and and all logfiles from the tool
chain can be downloaded from
http://www.retro11.de/data/oc_w11/bitkits/
This area is organized in folders for different releases. The tarball
file names contain information about release, Xlinix tool, and design.
- Changes
- documentation updates
- URL of oskits changed, they are now unter
http://www.retro11.de/data/oc_w11/oskits
- trunk (2014-05-29: svn rev 22(oc) 556(wfjm); untagged w11a_V0.581) ++++++++
- Summary
- new reference system
- switched from ISE 13.3 to 14.7.
- map/par behaviour changed, unfortunately unfavorably for w11a.
On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can
be achieved now.
- new man pages (in doc/man/man1/)
- support for Spartan-6 CMTs in PLL and DCM mode
- New features
- new modules
- rtl/vlib/xlib
- s6_cmt_sfs_unisim - Spartan-6 CMT for simple frequency synthesis
- s6_cmt_sfs_gsim - dito, simple ghdl simulation model
- tools/src/librutiltpp
- RtclSignalAction - Tcl signal handler
- RtclSystem - Tcl Unix system interface
- new files
- tools/bin/create_disk - creates a disk container file
- tools/bin/xtwi - Xilinx Tool Wrapper script for ISE
- tools/tcl/rw11/defs.tcl - w11a definitions
- Changes
- rtl/make
- imp_*.opt - use -fastpaths, -u, -tsi for trce
- imp_s6_speed.opt - adopt for ISE 14.x
- generic_xflow.mk - use xtwi; trce tsi file; use -C for cpp
- generic_isim.mk - use xtwi
- generic_xflow_cpld.mk - use xtwi
- rtl/sys_gen/*/nexys3
- .../sys_*.vhd - pll support, use clksys_vcodivide ect
- rtl/sys_gen/w11a/nexys3
- sys_conf.vhd - use 72 MHz, no closure in ISE 14.x for 80
- rtl/bplib/nexys(2|3)
- nexys(2|3)_time_fx2_ic.ucf - add VALID for hold time check
- tools/src/librwxxtpp
- RtclRw11Cpu - cp command options modified
- tools/bin
- vbomconv - add --viv_vhdl (for Vivado)
- tools/tcl/rw11
- util.tcl - move definitions to defs.tcl
- Bug fixes
- tools/src/librtools/RlogFile - fix date print (month was off by one)
- tools/tcl/rw11/asm.tcl - asmwait checks now pc if stop: defined
- Other updates
- INSTALL_ghdl.txt - text reflects current situation on ghdl packages
- trunk (2013-05-12: svn rev 21(oc) 518+(wfjm); untagged w11a_V0.58) ++++++++
- Summary
- C++ and Tcl based backend server now fully functional, supports with
DL11, RK11, LP11 and PC11 all devices available in w11a designs
- the old perl based backend server (pi_rri) is obsolete and removed
- operating system kits reorganized
- New features
- new directory trees for
- tools/oskit - operating system kits
- new modules
- tools/src/librw11
- Rw11*LP11 - classes for LP11 printer handling
- Rw11*PC11 - classes for PC11 paper tape handling
- Rw11*Stream* - classes for Virtual stream handling
- tools/src/librwxxtpp
- RtclRw11*LP11 - tcl iface for LP11 printer handling
- RtclRw11*PC11 - tcl iface for PC11 paper tape handling
- RtclRw11*Stream* - tcl iface for Virtual Stream handling
- Changes
- renames
- the w11 backend quick starter now named ti_w11 and under tools/bin
(was rtl/sys_gen/w11a/tb/torri)
- all operating system image related material now under
tools/oskit (was under rtl/sys_gen/w11a/tb)
- Bug fixes
- rtl/ibus/ibdr_lp11 - err flag logic fixed, was cleared in ibus racc read
- rtl/ibus/ibdr_pc11 - rbuf logic fixed. Was broken since ibus V2 update
in V0.51! Went untested because pc11 rarely used.
- trunk (2013-04-27: svn rev 20(oc) 511(wfjm); untagged w11a_V0.57) +++++++++
- Summary
- new C++ and Tcl based backend server supports now RK11 handling
- w11a systems operate with rlink over USB on nexsy2 and nexsy3 boards.
See w11a_os_guide.txt for details
- New features
- new modules
- rtl/bplib/fx2rlink - new vhdl lib with rlink over fx2 modules
- ioleds_sp1c_fx2 - io activity leds for rlink_sp1c_fx2
- rlink_sp1c_fx2 - rlink over serport + fx2 combo
- tools/src/librw11
- Rw11*RK11 - classes for RK11 disk handling
- Rw11*Disk* - classes for Virtual disk handling
- tools/src/librwxxtpp
- RtclRw11*RK11 - tcl iface for RK11 disk handling
- RtclRw11*Disk* - tcl iface for Virtual disk handling
- new files
- rtl/sys_gen/w11a/tb/torri - quick starter for new backend
- Changes
- tcl module renames:
tools/tcl/rw11a -> tools/tcl/rw11
- Bug fixes
- tools/src/ReventLoop: poll list update logic in DoPoll() corrected
- trunk (2013-04-13: svn rev 19(oc) 505(wfjm); untagged w11a_V0.562) +++++++++
- Summary
- V0.53 introduced a new C++ and Tcl based backend server, but only the
very basic rlink handling layer. This step release add now many support
classes for interfacing to w11 system designs, and the associated Tcl
bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler.
Can be used stand-alone to generate 'absolute loader' format files,
but also integrates tightly into the Tcl environment and is used as
building block in the creation of CPU test benches.
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs
See section 9. in INSTALL.txt for details.
- New features
- new directory trees for
- tools/asm-11 - asm-11 code
- tools/asm-11/tests - test bench for asm-11
- tools/asm-11/tests-err - test bench for asm-11 (error check part)
- tools/src/librw11 - w11 over rlink interface
- tools/src/librwxxtpp - C++ to tcl binding for w11 over rlink iface
- tools/tbench - w11 CPU test bench
- new modules
- tools/bin
- asm-11 - simple, Macro-11 syntax subset compatible, assembler
- asm-11_expect - expect checker for asm-11 test bench
- tools/dox
- *.Doxyfile - new descriptors c++,tcl,vhdl docs
- make_dox - driver script to generate c++,tcl,vhdl doxygen docs
- Changes
- vhdl module renames:
vlib/serport -> vlib/serportlib
- vhdl module splits:
bplib/bpgen/bpgenlib -> bpgenlib + bpgenrbuslib
- C++ class splits
librtcltools/RtclProxyBase -> RtclCmdBase + RtclProxyBase
- trunk (2013-01-06: svn rev 18(oc) 472(wfjm); untagged w11a_V0.561) +++++++++
- Summary
- Added simple simulation model of Cypress FX2 and test benches for
functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys
- New features
- new test benches
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/tb/tb_tst_rlink_cuff_ic_n2
- new systems
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/sys_tst_rlink_cuff_ic_n3
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/sys_tst_rlink_cuff_ic_atlys
- Bug fixes
- tools/fx2/src: FX2 firmware now properly re-initializes hardware registers
and will work on Nexys3 and Atlys boards with default Digilent EPROM
- rtl/bplib/fx2lib: read pipeline logic in FX2 controller corrected
- trunk (2013-01-02: svn rev 17(oc) 467(wfjm); untagged w11a_V0.56) ++++++++++
- Summary
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !!
- New reference system
The development and test system was upgraded from Kubuntu 10.04 to 12.04.
The version of several key tools and libraries changed:
linux kernel 3.2.0 (was 2.6.32)
gcc/g++ 4.6.3 (was 4.4.3)
boost 1.46.1 (was 1.40)
libusb 1.0.9 (was 1.0.6)
perl 5.14.2 (was 5.10.1)
tcl 8.5.11 (was 8.4.19)
xilinx ise 13.3 (was 13.1)
--> see INSTALL.txt, INSTALL_ghdl.txt and INSTALL_urjtag.txt
- New features
- added firmware for Cypress FX2 controller
- tools/fx2
- bin - pre-build firmware images in .ihx file format
- src - C and asm sources
- sys - udev rules for usb interfaces on fpga eval boards
- new modules
- rtl/bplib/fx2lib
- fx2_2fifoctl_ic - Cypress EZ-USB FX2 controller (2 fifo; int clk)
- fx2_3fifoctl_ic - Cypress EZ-USB FX2 controller (3 fifo; int clk)
- new systems
- rtl/sys_gen/tst_fx2loop/nexys2/ic/sys_tst_fx2loop_ic_n2
- rtl/sys_gen/tst_fx2loop/nexys2/ic3/sys_tst_fx2loop_ic3_n2
- rtl/sys_gen/tst_rlink_cuff/nexys2/ic/sys_tst_rlink_cuff_ic_n2
- tools/bin
- xilinx_sdf_ghdl_filter: tool to patch ISE sdf files for usage with ghdl
- Changes
- documentation
- added a 'system requirements' section in INSTALL.txt
- added INSTALL_ghdl.txt and INSTALL_urjtag.txt covering ghdl and urjtag
- added README_USB-VID-PID.txt
- organizational changes
- added TCLINC,RETRO_FX2_VID,RETRO_FX2_PID environment variables
- functional changes
- tools/bin
- vbomconv - file name substitution handling redone; many vboms updated
- retired modules
- vlib/rlink/tb/
- tbcore_rlink_dcm - obsolete, use tbcore_rlink
- trunk (2011-12-23: svn rev 16(oc) 442(wfjm); untagged w11a_V0.55) +++++++++
- Summary
- added xon/xoff (software flow control) support to serport library
- added test systems for serport verification
- use new serport stack in sys_w11a_* and sys_tst_rlink_* systems
- New features
- new modules
- vlib/serport
- serport_xonrx - xon/xoff logic rx path
- serport_xontx - xon/xoff logic tx path
- serport_1clock - serial port module (uart, fifo, flow control)
- vlib/rlink
- rlink_core8 - rlink core8 with 8bit interface
- rlink_sp1c - rlink_core8 + serport_1clock combo
- new unit tests
- bplib/s3board/tb/tb_s3_sram_memctl (for s3board sram controller
- bplib/nxcramlib/tb/tb_nx_cram_memctl_as (for nexys2,3 cram controller)
- new systems
- sys_gen/tst_serloop/nexys2/sys_tst_serloop1_n2
- sys_gen/tst_serloop/nexys3/sys_tst_serloop1_n3
- sys_gen/tst_serloop/s3board/sys_tst_serloop1_s3
- sys_gen/tst_rlink/s3board/sys_tst_rlink_s3
- Changes
- retired modules
- vlib/rlink
- rlink_rlb2rl - obsolete, now all in rlink_core8
- rlink_base - use now new rlink_core8
- rlink_serport - obsolete, now all in rlink_sp1c
- rlink_base_serport - use now new rlink_sp1c
- trunk (2011-12-04: svn rev 15(oc) 436(wfjm); untagged w11a_V0.54) +++++++++
- Summary
- added support for nexys3 board for w11a
- New features
- new systems
- sys_gen/w11a/nexys3/sys_w11a_n3
- sys_gen/w11a/nexys3/sys_tst_rlink_n3
- Changes
- module renames:
bplib/nexys2/n2_cram_dummy -> bplib/nxcramlib/nx_cram_dummy
bplib/nexys2/n2_cram_memctl_as -> bplib/nxcramlib/nx_cram_memctl_as
- Bug fixes
- tools/src/lib*: backend libraries compile now on 64 bit systems
- trunk (2011-11-20: svn rev 14(oc) 428(wfjm); untagged w11a_V0.532) +++++++++
- Summary
- generalized the 'human I/O' interface for s3board,nexys2/3 and atlys
- added test design for the 'human I/O' interface
- no functional change of w11a CPU core or any existing test systems
- Changes
- functional changes
- use now 'a6' polynomial of Koopman et al for crc8 in rlink
- with one exception all vhdl sources use now numeric_std
- module renames:
vlib/xlib/dcm_sp_sfs_gsim -> vlib/xlib/dcm_sfs_gsim
vlib/xlib/dcm_sp_sfs_unisim -> vlib/xlib/dcm_sfs_unisim_s3e
vlib/xlib/tb/tb_dcm_sp_sfs -> vlib/xlib/tb/tb_dcm_sfs
- New features
- new modules
- rtl/sys_gen/tst_snhumanio
- sub-tree with test design for 'human I/O' interface modules
- atlys, nexys2, and s3board directories contain the systems
for the respective Digilent boards
- trunk (2011-09-11: svn rev 12(oc) 409(wfjm); untagged w11a_V0.531) +++++++++
- Summary
- Many small changes to prepare upcoming support for
- Spartan-6 boards (nexys3 and atlys)
- usage of Cypress FX2 USB interface on nexys2/3 and atlys boards
- no functional change of w11a CPU core or any test systems
- Changes
- use boost libraries instead of custom coding:
- boost/function and /bind for callbacks, retire RmethDscBase and RmethDsc
- boost/foreach for some iterator loops
Note: boost 1.35 and gcc 4.3 or newer is required, see INSTALL.txt
- module renames:
bplib/s3board/s3_rs232_iob_int -> bplib/bpgen/bp_rs232_2line_iob
bplib/s3board/s3_rs232_iob_ext -> bplib/bpgen/bp_rs232_4line_iob
bplib/s3board/s3_dispdrv -> bplib/bpgen/sn_4x7segctl
bplib/s3board/s3_humanio -> bplib/bpgen/sn_humanio
bplib/s3board/s3_humanio_rbus -> bplib/bpgen/sn_humanio_rbus
- other renames:
tools/bin/impact_wrapper -> tools/bin/config_wrapper
- reorganize Makefile includes and xflow option files
rtl/vlib/Makefile.ghdl -> rtl/make/generic_ghdl.mk
rtl/vlib/Makefile.isim -> rtl/make/generic_isim.mk
rtl/vlib/Makefile.xflow -> rtl/make/generic_xflow.mk
rtl/vlib/xst_vhdl.opt -> rtl/make/syn_s3_speed.opt
rtl/vlib/balanced.opt -> rtl/make/imp_s3_speed.opt
- trunk (2011-04-17: svn rev 11(oc) 376(wfjm); untagged w11a_V0.53) ++++++++++
- Summary
- Introduce C++ and Tcl based backend server. A set of C++ classes provide
the basic rlink communication primitives. Additional glue classes provide
a Tcl binding. This first phase contains the basic functionality needed
to control simple test benches.
- add an 'rlink exerciser' (tst_rlink) and a top level design for a Nexys2
board (sys_tst_rlink_n2) and a test suite implemented in Tcl.
- Note: No functional changes in w11a core and I/O system at this point!
The w11a demonstrator systems are still operated with the old
backend code (pi_rri).
- New features
- new directory trees for
- C++ sources of backend (plus make and doxygen documentation support)
- tools/dox - Doxygen documentation configuration
- tools/make - make includes
- tools/src/librlink - basic rlink interface
- tools/src/librlinktpp - C++ to tcl binding for rlink interface
- tools/src/librtools - general support classes and methods
- tools/src/librtcltools - support classes to implement Tcl bindings
- tools/src/librutiltpp - Tcl support commands implemented in C++
- VHDL sources of an 'rlink exerciser'
- rtl/sys_gen/tst_rlink - top level designs for an rlink tester
- rtl/sys_gen/tst_rlink/nexys2 - rlink tester system for Nexsy2 board
- Tcl sources of 'rlink exerciser'
- tools/tcl/rlink - defs and proc's for basic rlink functions
- tools/tcl/rutil - general support procs
- tools/tcl/rbtest - defs and proc's for rbd_tester
- tools/tcl/rbbram - defs and proc's for rbd_bram
- tools/tcl/rbmoni - defs and proc's for rbd_rbmon
- tools/tcl/rbs3hio - defs and proc's for s3_humanio_rbus
- tools/tcl/tst_rlink - defs and proc's for tst_rlink
- new modules
- rtl/vlib/rbus
- rbd_bram - rbus bram test target
- rbd_eyemon - eye monitor for serport's
- rbd_rbmon - rbus monitor
- rbd_tester - rbus tester
- rbd_timer - usec precision timer
- rtl/vlib/memlib
- additional wrappers for distributed and block memories added
- tools/bin
- ti_rri: Tcl driver for rlink tests and servers (will replace pi_rri)
- trunk (2011-01-02: svn rev 9(oc) 352(wfjm); untagged w11a_V0.52) +++++++++++
- Summary
- Introduce rbus protocol V3
- reorganize rbus and rlink modules, many renames
- New features
- vlib/rbus
- added several rbus devices useful for debugging
- rbd_tester: test target, used for example in test benches
- Changes
- module renames:
- the rri (remote-register-interface) components were re-organized and
cleanly separated into rbus and rlink components:
rri/rb_sres_or_* -> rbus/rb_sres_or_*
rri/rri_core -> rlink/rlink_core
rri/rri_base_serport -> rlink/rlink_base_serport
rri/rrilib -> rbus/rblib
-> rlink/rlinklib
rri/rri_serport -> rlink/rlink_serport
rri/tb/rritb_sres_or_mon -> rbus/rb_sres_or_mon
- the rri test bench monitors were reorganized and renamed
rri/tb/rritb_cpmon -> rlink/rlink_mon
rri/tb/rritb_cpmon_sb -> rlink/rlink_mon_sb
rri/tb/rritb_rbmon -> rbus/rb_mon
rri/tb/rritb_rbmon_sb -> rbus/rb_mon_sb
- the rri low level test bench were also renamed
rri/tb/tb_rri -> rlink/tb/tb_rlink
rri/tb/tb_rri_core -> rlink/tb/tb_rlink_direct
rri/tb/tb_rri_serport -> rlink/tb/tb_rlink_serport
- the base modules for rlink+cext based test benches were renamed
rri/tb/rritb_core_cm -> rlink/tb/tbcore_rlink_dcm
rri/tb/rritb_core -> rlink/tb/tbcore_rlink
rri/tb/vhpi_rriext -> rlink/tb/rlink_cext_vhpi
rri/tb/cext_rriext.c -> rlink/tb/rlink_cext.c
- other rri/rbus related renames
bplib/s3board/s3_humanio_rri -> s3_humanio_rbus
w11a/pdp11_core_rri -> pdp11_core_rbus
- other renames
w11a/tb/tb_pdp11_core -> tb_pdp11core
- signal renames:
- rlink interface (defined in rlink/rlinklib.vhd):
- rename rlink port signals:
CP_* -> RL_*
- rename status bit names to better reflect their usage in v3:
ccrc -> cerr - indicates cmd crc error or other cmd level abort
dcrc -> derr - indicates data crc error or other data level abort
ioto -> rbnak - indicates rbus abort, either no ack or timeout
ioerr -> rberr - indicates that rbus err flag was set
- migrate to rbus protocol version 3
- in rb_mreq use now aval,re,we instead of req,we
- basic rbus transaction now takes 2 cycles, one for address select, one
for data exchange. Same concept and reasoning behind as in ibus V2.
- vlib/rlink/rlink_core
- cerr and derr state flags now set on command or data crc errors as well
as on eop/nak aborts when command or wblk data is received.
- has now 'monitor port', RL_MONI.
- RL_FLUSH port removed, the flush logic is now in rlink_serport
- restructured rlink modules
- rlink_core is the rlink protocol engine with a 9 bit wide interface
- rlink_rlb2rl (new) is an adapter to a byte wide interface
- rlink_base (new) combines rlink_core and rlink_rlb2rl
- rlink_serport (re-written) is an adapter to a serial interface
- rlink_base_serport (renamed) combines rlink_base and rlink_serport
- trunk (2010-11-28: svn rev 8(oc) 341(wfjm); untagged w11a_V0.51) +++++++++++
- Summary
- Introduce ibus protocol V2
- Nexys2 systems use DCM
- sys_w11a_n2 now runs with 58 MHz
- New features
- ibus
- added ib_sres_or_mon to check for miss-behaving ibus devices
- added ib_sel to encapsulate address select logic
- nexys2 systems
- now DCM derived system clock supported
- sys_gen/w11a/nexys2
- sys_w11a_n2 now runs with 58 MHz clksys
- Changes
- module renames:
- in future 'box' is used for large autonomous blocks, therefore use
the term unit for purely sequential logic modules:
pdp11_abox -> pdp11_ounit
pdp11_dbox -> pdp11_aunit
pdp11_lbox -> pdp11_lunit
pdp11_mbox -> pdp11_munit
- signal renames:
- renamed RRI_LAM -> RB_LAM in all ibus devices
- renamed CLK -> I_CLK50 in all top level nexys2 and s3board designs
- migrate to ibus protocol version 2
- in ib_mreq use now aval,re,we,rmw instead of req,we,dip
- basic ibus transaction now takes 2 cycles, one for address select, one
for data exchange. This avoids too long logic paths in the ibus logic.
- Bug fixes
- rtl/vlib/Makefile.xflow: use default .opt files under rtl/vlib again.
for details see README-w11a_V.50-w11a_V0.60.txt
- w11a_V0.5 (2010-07-23) +++++++++++++++++++++++++++++++++++++++++++++++++++++

4
doc/man/man1/config_wrapper.1
View File

@@ -31,9 +31,9 @@ The \fICOMMAND\fP argument controls the action:
.RS 3
.PD 0
.IP \fBiconfigf\fP 10
.IP \fBiconfig\fP 10
configure using \fBimpact\fP with \fI.bit\fP file \fIFILE\fP
.IP \fBjconfigf\fP
.IP \fBjconfig\fP
configure using \fBjtag\fP(1) with \fI.svf\fP file \fIFILE\fP
.IP \fBbit2svf\fP
create a \fI.svf\fP file from the \fI.bit\fP file \fIFILE\fP

4
doc/man/man1/ti_w11.1
View File

@@ -1,5 +1,5 @@
.\" -*- nroff -*-
.\" $Id: ti_w11.1 550 2014-02-03 08:16:57Z mueller $
.\" $Id: ti_w11.1 563 2014-06-22 15:49:09Z mueller $
.\"
.\" Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
.\"
@@ -70,7 +70,7 @@ is connected via USB. \fBti_rri\fP(1) will be started and the given
boot script executed.
.IP "\fBti_w11 -n3 -e $RETROBASE/tools/asm-11/w11/sys/dl11/simple_out.mac\fR"
Will start the \fItb_w11a_n3 test\fP bench in \fBghdl\fP(1), on the fly
Will start the \fItb_w11a_n3\fP test bench in \fBghdl\fP(1), on the fly
compile the \fIsimple_out.mac\fP test program with \fBasm-11\fP(1), load
and execute it. This little test code just produces
.EX

6
doc/w11a_known_issues.txt
View File

@@ -1,14 +1,14 @@
# $Id: w11a_known_issues.txt 516 2013-05-05 21:24:52Z mueller $
# $Id: w11a_known_issues.txt 570 2014-07-20 19:05:11Z mueller $
Summary of known issues for w11a CPU and systems
Table of content:
1. Known differences between w11a and KB-11C (11/70)
1. Known differences between w11a and KB11-C (11/70)
2. Known limitations
3. Known bugs
1. Known differences between w11a and KB-11C (11/70) ----------------------
1. Known differences between w11a and KB11-C (11/70) ----------------------
- the SPL instruction in the 11/70 always fetched the next instruction
regardless of pending device or even console interrupts. This is known

8
doc/w11a_os_guide.txt
View File

@@ -1,4 +1,4 @@
# $Id: w11a_os_guide.txt 547 2013-12-29 13:10:07Z mueller $
# $Id: w11a_os_guide.txt 563 2014-06-22 15:49:09Z mueller $
Guide to run operating system images on w11a systems
@@ -162,12 +162,14 @@ Guide to run operating system images on w11a systems
Legal and license issues:
Unfortunately there is no general hobbyist license for DEC operating
systems for PDP-11 computers. The 'Mentec license' commonly understood
systems for PDP-11 computers. The 'Mentec license' is commonly understood
to cover the some older versions of DEC operating systems, for example
- RT-11 V5.3 or prior
- RSX-11M V4.3 or prior
- RSX-11M PLUS V3.0 or prior
on software simulators, most notably on the 'simh' suite.
on a simulator. It is commonly assumed that the license terms cover the
usage of the PDP11 simulator from the 'simh' suite. Usage of the e11
simulator is not covered according to the author of e11.
HOWEVER: THIS LICENSE DOES NOT COVER THE USAGE OF THESE HISTORIC DEC
OPERATING SYSTEMS ON ANY 'REAL HARDWARE' IMPLEMENTATION OF A

28
doc/w11a_tb_guide.txt
View File

@@ -1,4 +1,4 @@
# $Id: w11a_tb_guide.txt 547 2013-12-29 13:10:07Z mueller $
# $Id: w11a_tb_guide.txt 578 2014-08-05 21:28:19Z mueller $
Guide to running w11a test benches
@@ -68,7 +68,6 @@ Guide to running w11a test benches
-> 1269955.0 ns 63488: DONE
-> real 0m01.178s user 0m01.172s sys 0m00.020s
- serport receiver/transmitter test
make tb_serport_uart_rxtx
time tbw tb_serport_uart_rxtx |\
@@ -101,7 +100,6 @@ Guide to running w11a test benches
-> 24695.0 ns 1225: DONE
-> real 0m0.133s user 0m0.104s sys 0m0.008s
time tbw tb_rlink_sp1c tb_rlink_stim.dat |\
tee tb_rlink_sp1c_dsim.log | egrep "(FAIL|DONE)"
-> 551935.0 ns 27587: DONE
@@ -113,15 +111,15 @@ Guide to running w11a test benches
make tb_pdp11core
time tbw tb_pdp11core |\
tee tb_pdp11core_dsim.log | egrep "(FAIL|DONE)"
-> 1220255.0 ns 61003: DONE
-> 1220255.0 ns 61073: DONE
-> real 0m10.736s user 0m10.713s sys 0m00.060s
- w11a core test (using post-synthesis model)
make ghdl_tmp_clean tb_pdp11core_ssim
make ghdl_tmp_clean && make tb_pdp11core_ssim
time tbw tb_pdp11core_ssim |\
tee tb_pdp11core_ssim.log | egrep "(FAIL|DONE)"
-> 1220255.0 ns 61003: DONE
-> 1220255.0 ns 61073: DONE
-> real 1m09.738s user 1m09.588s sys 0m00.096s
- s3board sram controller test
@@ -133,7 +131,6 @@ Guide to running w11a test benches
-> 5015.0 ns 241: DONE
-> real 0m00.113s user 0m00.068s sys 0m00.016s
- nexys2/nexys3 cram controller test
cd $RETROBASE/rtl/bplib/nxcramlib/tb
@@ -143,7 +140,6 @@ Guide to running w11a test benches
-> 24272.5 ns 1204: DONE
-> real 0m00.343s user 0m00.248s sys 0m00.100s
3. System tests benches ---------------------------------------------------
The system tests allow to verify to verify a full system design.
@@ -252,8 +248,8 @@ Guide to running w11a test benches
"rw11::setup_cpu" \
"rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
tee tb_w11a_s3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
-> 10225140.0 ns 511247: DONE
-> real 0m52.105s user 0m51.871s sys 0m0.376s
-> 7328980.0 ns 366439: DONE
-> real 0m45.225s user 0m43.631s sys 0m0.400s
- sys_w11a_n2 test bench
@@ -263,8 +259,8 @@ Guide to running w11a test benches
"rw11::setup_cpu" \
"rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
tee tb_w11a_n2_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
-> 10278380.0 ns 513908: DONE
-> real 1m2.951s user 1m2.628s sys 0m0.532s
-> 7372840.0 ns 368631: DONE
-> real 0m55.536s user 0m52.967s sys 0m0.520s
- sys_w11a_n3 test bench
@@ -274,8 +270,8 @@ Guide to running w11a test benches
"rw11::setup_cpu" \
"rw11::run_pdpcp ../../../../w11a/tb/tb_pdp11core_stim.dat" |\
tee tb_w11a_n3_stim2_dsim.log | egrep "(-[EFW]:|FAIL|PEND|DONE)"
-> 5167410.0 ns 516720: DONE
-> real 1m5.322s user 1m5.072s sys 0m0.500s
-> 5121571.1 ns 368738: DONE
-> real 0m54.908s user 0m51.831s sys 0m0.512s
A new, modular w11a test bench is under construction. So far it is very
incomplete. This very preliminary version can be executed with
@@ -287,6 +283,6 @@ Guide to running w11a test benches
time ti_rri --pack=rw11 --run="tbw tb_w11a_n2" --fifo --logl=3 -- \
"rw11::setup_cpu" "rw11::tbench @w11a_all.dat" | \
tee w11a_tbench_dsim.log | egrep "(-[EFW]:|FAIL|PASS|DONE)"
-> 904180.0 ns 45198: DONE
-> real 0m5.539s user 0m5.748s sys 0m0.204s
-> 5019660.0 ns 250972: DONE
-> real 0m32.501s user 0m31.082s sys 0m0.500s

8
rtl/bplib/bpgen/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p definition
# 2007-09-16 83 1.0 Initial version
@@ -9,7 +10,10 @@
VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
include $(RETROBASE)/rtl/make/xflow_default_s3board.mk
ifndef XTW_BOARD
XTW_BOARD=s3board
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/bplib/fx2lib/Makefile
View File

@@ -1,14 +1,18 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2010-05-23 293 1.0 Initial version (cloned..)
#
VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
ifndef XTW_BOARD
XTW_BOARD=nexys2
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/bplib/fx2rlink/Makefile
View File

@@ -1,13 +1,17 @@
# $Id: Makefile 525 2013-07-06 12:19:39Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.0.1 make reference board configurable via XTW_BOARD
# 2013-04-20 509 1.0 Initial version (cloned..)
#
VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
ifndef XTW_BOARD
XTW_BOARD=nexys2
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/bplib/nexys2/Makefile
View File

@@ -1,14 +1,18 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2010-05-23 293 1.0 Initial version (cloned..)
#
VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
ifndef XTW_BOARD
XTW_BOARD=nexys2
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/bplib/nexys2/tb/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.2.2 make reference board configurable via XTW_BOARD
# 2013-01-01 467 1.2.1 add tb_nexys2_fusp_cuff_dummy
# 2011-11-26 433 1.2 remove tb_n2_cram_memctl_as (moved to nxcramlib)
# 2011-08-13 405 1.1 use includes from rtl/make
@@ -13,7 +14,10 @@ EXE_all = tb_nexys2_dummy
EXE_all += tb_nexys2_fusp_dummy
EXE_all += tb_nexys2_fusp_cuff_dummy
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
ifndef XTW_BOARD
XTW_BOARD=nexys2
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

8
rtl/bplib/nexys3/tb/Makefile
View File

@@ -1,13 +1,17 @@
# $Id: Makefile 509 2013-04-21 20:46:20Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.0.1 make reference board configurable via XTW_BOARD
# 2011-11-26 432 1.0 Initial version
#
EXE_all = tb_nexys3_fusp_dummy
EXE_all += tb_nexys3_fusp_cuff_dummy
#
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

8
rtl/bplib/nxcramlib/Makefile
View File

@@ -1,13 +1,17 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.0.1 make reference board configurable via XTW_BOARD
# 2011-11-26 433 1.0 Initial version (cloned..)
#
VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
ifndef XTW_BOARD
XTW_BOARD=nexys2
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

6
rtl/bplib/nxcramlib/nx_cram_memctl_as.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: nx_cram_memctl_as.vhd 433 2011-11-27 22:04:39Z mueller $
-- $Id: nx_cram_memctl_as.vhd 563 2014-06-22 15:49:09Z mueller $
--
-- Copyright 2010-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -44,7 +44,7 @@
-- Notes:
-- 1. READ1DELAY of 2 is needed even though the timing of the memory suggests
-- that 1 cycle is enough (T_apa is 20 ns, so 40 ns round trip is ok). A
-- short READ1 delay works in sim, but not on fpga where the data od the
-- short READ1 delay works in sim, but not on fpga where the data of the
-- ADDR(0)=0 cycle is re-read (see notes_tst_sram_n2.txt).
-- tb_n2_cram_memctl_as_ISim_tsim works with full sdf even when T_apa is
-- 40ns or 50 ns, only T_apa 60 ns fails !
@@ -55,7 +55,7 @@
-- low-Z delay by the IOB and internal memory delays. No clash.
-- 3. There is a hidden 'bus-turn-around' cycle for a read->write change.
-- MEM_OE goes 1->0 on s_rdget1->s_wrinit and the memory will go high-z with
-- some dekal. FPGA_OE goes 0->1 in the next cycle at s_wrinit->s_wrwait0.
-- some delay. FPGA_OE goes 0->1 in the next cycle at s_wrinit->s_wrwait0.
-- Again no clash due to the 1 cycle delay.
--
-- Nominal timings:

8
rtl/bplib/nxcramlib/tb/Makefile
View File

@@ -1,12 +1,16 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.0.1 make reference board configurable via XTW_BOARD
# 2011-11-26 433 1.0 Initial version (cloned)
#
EXE_all = tb_nx_cram_memctl_as
#
include $(RETROBASE)/rtl/make/xflow_default_nexys2.mk
ifndef XTW_BOARD
XTW_BOARD=nexys2
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

8
rtl/bplib/s3board/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p definition
# 2007-09-16 83 1.0 Initial version
@@ -9,7 +10,10 @@
VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
include $(RETROBASE)/rtl/make/xflow_default_s3board.mk
ifndef XTW_BOARD
XTW_BOARD=s3board
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/bplib/s3board/tb/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.3.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.3 use includes from rtl/make
# 2010-05-16 291 1.2.2 rename tb_memctl_s3sram->tb_s3_sram_memctl
# 2010-05-01 286 1.2.1 add tb_s3board_usp_dummy
@@ -13,7 +14,10 @@ EXE_all = tb_s3board_dummy
EXE_all += tb_s3board_fusp_dummy
EXE_all += tb_s3_sram_memctl
#
include $(RETROBASE)/rtl/make/xflow_default_s3board.mk
ifndef XTW_BOARD
XTW_BOARD=s3board
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

8
rtl/ibus/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2008-08-22 161 1.0 Initial version
#
@@ -9,7 +10,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/ibus/ibdlib.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: ibdlib.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: ibdlib.vhd 561 2014-06-09 17:22:50Z mueller $
--
-- Copyright 2008-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2008-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,10 @@
-- Description: Definitions for ibus devices
--
-- Dependencies: -
-- Tool versions: xst 8.2, 9.1, 9.2, 12.1, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
-- Revision History:
-- Date Rev Version Comment
-- 2014-06-08 561 1.2 fix rl11 declaration
-- 2011-11-18 427 1.1.2 now numeric_std clean
-- 2010-10-23 335 1.1.1 rename RRI_LAM->RB_LAM;
-- 2010-06-11 303 1.1 use IB_MREQ.racc instead of RRI_REQ
@@ -127,6 +128,7 @@ component ibdr_rl11 is -- ibus dev(rem): RL11
-- fixed address: 174400
port (
CLK : in slbit; -- clock
CE_MSEC : in slbit; -- msec pulse
BRESET : in slbit; -- ibus reset
RB_LAM : out slbit; -- remote attention
IB_MREQ : in ib_mreq_type; -- ibus request

4
rtl/ibus/ibdr_dl11.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: ibdr_dl11.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: ibdr_dl11.vhd 569 2014-07-13 14:36:32Z mueller $
--
-- Copyright 2008-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -36,7 +36,7 @@
-- 2008-08-22 161 1.0.6 use iblib; add EI_ACK_* to proc_next sens. list
-- 2008-05-09 144 1.0.5 use intreq flop, use EI_ACK
-- 2008-03-22 128 1.0.4 rename xdone -> xval (no functional change)
-- 2008-01-27 115 1.0.3 bugfix: set ilam when rbuf read by cpu;
-- 2008-01-27 115 1.0.3 BUGFIX: set ilam when rbuf read by cpu;
-- add xdone and rrdy bits to rri xbuf read
-- 2008-01-20 113 1.0.2 fix maint mode logic (proper double buffer now)
-- 2008-01-20 112 1.0.1 use BRESET

1
rtl/ibus/ibdr_maxisys.vbom
View File

@@ -5,6 +5,7 @@ ibdlib.vhd
# components
ibd_iist.vbom
ibd_kw11l.vbom
## ibdr_rl11.vbom
ibdr_rk11.vbom
ibdr_dl11.vbom
ibdr_pc11.vbom

26
rtl/ibus/ibdr_maxisys.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: ibdr_maxisys.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: ibdr_maxisys.vhd 565 2014-06-28 12:54:08Z mueller $
--
-- Copyright 2009-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2009-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -17,6 +17,7 @@
--
-- Dependencies: ibd_iist
-- ibd_kw11l
-- ibdr_rl11
-- ibdr_rk11
-- ibdr_dl11
-- ibdr_pc11
@@ -27,15 +28,19 @@
-- ib_intmap
-- Test bench: -
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 12.1, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-06-08 561 14.7 131013 xc6slx16-2 380 748 18 266 s 7.1 +RL11
-- 2014-06-08 560 14.7 131013 xc6slx16-2 311 615 8 216 s 7.1
-- 2010-10-17 333 12.1 M53d xc3s1000-4 312 1058 16 617 s 10.3
-- 2010-10-17 314 12.1 M53d xc3s1000-4 300 1094 16 626 s 10.4
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-06-27 565 1.2.1 temporarily hide RL11
-- 2014-06-08 561 1.2 add rl11
-- 2011-11-18 427 1.1.2 now numeric_std clean
-- 2010-10-23 335 1.1.1 rename RRI_LAM->RB_LAM;
-- 2010-06-11 303 1.1 use IB_MREQ.racc instead of RRI_REQ
@@ -232,6 +237,21 @@ begin
EI_ACK => EI_ACK_KW11L
);
-- RL11: if true generate
-- begin
-- I0 : ibdr_rl11
-- port map (
-- CLK => CLK,
-- CE_MSEC => CE_MSEC,
-- BRESET => BRESET,
-- RB_LAM => RB_LAM_RL11,
-- IB_MREQ => IB_MREQ,
-- IB_SRES => IB_SRES_RL11,
-- EI_REQ => EI_REQ_RL11,
-- EI_ACK => EI_ACK_RL11
-- );
-- end generate RL11;
RK11: if true generate
begin
I0 : ibdr_rk11

5
rtl/ibus/ibdr_rk11.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: ibdr_rk11.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: ibdr_rk11.vhd 561 2014-06-09 17:22:50Z mueller $
--
-- Copyright 2008-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -18,10 +18,11 @@
-- Dependencies: ram_1swar_gen
-- Test bench: -
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 12.1, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-06-08 561 14.7 131013 xc6slx16-2 44 139 9 60 s 5.6
-- 2010-10-17 333 12.1 M53d xc3s1000-4 46 248 16 137 s 7.2
-- 2009-06-01 221 10.1.03 K39 xc3s1000-4 46 249 16 148 s 7.1
-- 2008-01-06 111 8.2.03 I34 xc3s1000-4 36 189 16 111 s 6.0

7
rtl/make/generic_ghdl.mk
View File

@@ -1,7 +1,8 @@
# $Id: generic_ghdl.mk 477 2013-01-27 14:07:10Z mueller $
# $Id: generic_ghdl.mk 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-26 575 1.3.2 use XTWI_PATH now (ise/vivado switch done later)
# 2013-01-27 477 1.3.1 use dontincdep.mk to suppress .dep include on clean
# 2011-08-13 405 1.3 renamed, moved to rtl/make;
# 2007-11-04 95 1.2.2 fix find statement in ghdl_tmp_clean
@@ -11,8 +12,8 @@
# 2007-06-10 52 1.0 Initial version
#
GHDLIEEE = --ieee=synopsys
GHDLUNISIM = -P$(XILINX)/ghdl/unisim
GHDLSIMPRIM = -P$(XILINX)/ghdl/simprim
GHDLUNISIM = -P$(XTWI_PATH)/ISE_DS/ISE/ghdl/unisim
GHDLSIMPRIM = -P$(XTWI_PATH)/ISE_DS/ISE/ghdl/simprim
GHDL = ghdl
COMPILE.vhd = $(GHDL) -a $(GHDLIEEE)
LINK.vhd = $(GHDL) -e $(GHDLIEEE)

2
rtl/sys_gen/tst_rlink/nexys2/tb/tb_tst_rlink_n2.vbom
View File

@@ -1,7 +1,7 @@
# configure tb_nexsy2_fusp with sys_tst_rlink_n2 target;
# use vhdl configure file (tb_tst_rlink_n2.vhd) to allow
# that all configurations will co-exist in work library
${nexys2_aif := ../sys_tst_rlink_n2.vbom}
${nexys2_fusp_aif := ../sys_tst_rlink_n2.vbom}
sys_conf = sys_conf_sim.vhd
../../../../bplib/nexys2/tb/tb_nexys2_fusp.vbom
tb_tst_rlink_n2.vhd

2
rtl/sys_gen/tst_rlink/nexys2/tb/tb_tst_rlink_n2_ssim.vbom
View File

@@ -1,6 +1,6 @@
# configure for _*sim case
# Note: this tb uses sys_tst_rlink_n2.vbom in local directory
# (not in .. as usual) to allow a tb specific configure !!!
nexys2_aif = sys_tst_rlink_n2_ssim.vhd
nexys2_fusp_aif = sys_tst_rlink_n2_ssim.vhd
tb_tst_rlink_n2.vbom
@top:tb_tst_rlink_n2

2
rtl/sys_gen/tst_rlink_cuff/nexys2/ic/tb/tb_tst_rlink_cuff_ic_n2_ssim.vbom
View File

@@ -1,6 +1,6 @@
# configure for _*sim case
# Note: this tb uses sys_tst_rlink_n2.vbom in local directory
# (not in .. as usual) to allow a tb specific configure !!!
nexys2_aif = sys_tst_rlink_cuff_ic_n2_ssim.vhd
nexys2_fusp_cuff_aif = sys_tst_rlink_cuff_ic_n2_ssim.vhd
tb_tst_rlink_cuff_ic_n2.vbom
@top:tb_tst_rlink_cuff_ic_n2

6
rtl/sys_gen/w11a/nexys2/sys_w11a_n2.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_w11a_n2.vhd 509 2013-04-21 20:46:20Z mueller $
-- $Id: sys_w11a_n2.vhd 561 2014-06-09 17:22:50Z mueller $
--
-- Copyright 2010-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -37,10 +37,12 @@
-- Test bench: tb/tb_sys_w11a_n2
--
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 10.1, 11.4, 12.1, 13.1; ghdl 0.26-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.26-0.31
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-06-08 561 14.7 131013 xc3s1200e-4 1626 4821 360 3052 ok: +RL11
-- 2014-06-01 558 14.7 131013 xc3s1200e-4 1561 4597 334 2901 ok:
-- 2013-04-20 509 13.3 O76d xc3s1200e-4 1541 4598 334 2889 ok: now + FX2 !
-- 2011-12-18 440 13.1 O40d xc3s1200e-4 1450 4439 270 2740 ok: LP+PC+DL+II
-- 2011-11-18 427 13.1 O40d xc3s1200e-4 1433 4374 242 2680 ok: LP+PC+DL+II

2
rtl/sys_gen/w11a/nexys2/tb/tb_w11a_n2_ssim.vbom
View File

@@ -1,6 +1,6 @@
# configure for _*sim case
# Note: this tb uses sys_w11a_n2.vbom in local directory
# (not in .. as usual) to allow a tb specific configure !!!
nexys2_fusp_aif = sys_w11a_n2_ssim.vhd
nexys2_fusp_cuff_aif = sys_w11a_n2_ssim.vhd
tb_w11a_n2.vbom
@top:tb_w11a_n2

6
rtl/sys_gen/w11a/nexys3/sys_w11a_n3.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_w11a_n3.vhd 538 2013-10-06 17:21:25Z mueller $
-- $Id: sys_w11a_n3.vhd 561 2014-06-09 17:22:50Z mueller $
--
-- Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -37,10 +37,12 @@
-- Test bench: tb/tb_sys_w11a_n3
--
-- Target Devices: generic
-- Tool versions: xst 13.1, 14.6; ghdl 0.29
-- Tool versions: xst 13.1-14.7; ghdl 0.29-0.31
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-06-08 561 14.7 131013 xc6slx16-2 1531 3500 142 1165 ok: +RL11
-- 2014-05-29 556 14.7 131013 xc6slx16-2 1459 3342 128 1154 ok:
-- 2013-04-21 509 13.3 O76d xc6slx16-2 1516 3274 140 1184 ok: now + FX2 !
-- 2011-12-18 440 13.1 O40d xc6slx16-2 1441 3161 96 1084 ok: LP+PC+DL+II
-- 2011-11-20 430 13.1 O40d xc6slx16-2 1412 3206 84 1063 ok: LP+PC+DL+II

2
rtl/sys_gen/w11a/nexys3/tb/tb_w11a_n3_ssim.vbom
View File

@@ -1,6 +1,6 @@
# configure for _*sim case
# Note: this tb uses sys_w11a_n3.vbom in local directory
# (not in .. as usual) to allow a tb specific configure !!!
nexys3_fusp_aif = sys_w11a_n3_ssim.vhd
nexys3_fusp_cuff_aif = sys_w11a_n3_ssim.vhd
tb_w11a_n3.vbom
@top:tb_w11a_n3

6
rtl/sys_gen/w11a/s3board/sys_w11a_s3.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: sys_w11a_s3.vhd 476 2013-01-26 22:23:53Z mueller $
-- $Id: sys_w11a_s3.vhd 561 2014-06-09 17:22:50Z mueller $
--
-- Copyright 2007-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -35,10 +35,12 @@
-- Test bench: tb/tb_sys_w11a_s3
--
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 10.1, 11.4, 12.1, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-06-08 561 14.7 131013 xc3s1000-4 1374 4580 286 2776 OK: +RL11
-- 2014-06-01 558 14.7 131013 xc3s1000-4 1301 4306 270 2614 OK:
-- 2011-12-21 442 13.1 O40d xc3s1000-4 1301 4307 270 2613 OK: LP+PC+DL+II
-- 2011-11-19 427 13.1 O40d xc3s1000-4 1322 4298 242 2616 OK: LP+PC+DL+II
-- 2010-12-30 351 12.1 M53d xc3s1000-4 1316 4291 242 2609 OK: LP+PC+DL+II

8
rtl/vlib/comlib/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.2.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.2 use includes from rtl/make
# 2007-07-06 64 1.1 use Makefile.xflow
# 2007-06-03 45 1.0 Initial version
@@ -10,7 +11,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/vlib/genlib/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.2.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.2 use includes from rtl/make
# 2007-12-09 100 1.1.1 drop ISE_p definition
# 2007-06-03 47 1.1 use Makefile.xflow
@@ -11,7 +12,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/vlib/memlib/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p definition
# 2007-06-03 45 1.0 Initial version
@@ -10,7 +11,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/vlib/rbus/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p definition
# 2007-07-06 64 1.0 Initial version
@@ -10,7 +11,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/vlib/rlink/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p definition
# 2007-07-06 64 1.0 Initial version
@@ -10,7 +11,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD)
#
.PHONY : all clean
#

8
rtl/vlib/rlink/tb/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.4.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.4 use includes from rtl/make
# 2010-12-05 343 1.3 rri->rlink renames
# 2009-11-21 252 1.2 add ISim support
@@ -14,7 +15,10 @@ EXE_all = tb_rlink_direct
EXE_all += tb_rlink_sp1c
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

17
rtl/vlib/rlink/tb/rlink_cext.c
View File

@@ -1,6 +1,6 @@
/* $Id: rlink_cext.c 366 2011-03-05 14:55:15Z mueller $
/* $Id: rlink_cext.c 575 2014-07-27 20:55:41Z mueller $
*
* Copyright 2007-2010 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
* Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
*
* This program is free software; you may redistribute and/or modify it under
* the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,8 @@
*
* Revision History:
* Date Rev Vers Comment
* 2014-07-27 575 1.3.2 add ssize_t -> int casts to avoid warnings
* add fflush(stdout) after standart open/close msgs
* 2011-03-05 366 1.3.1 add RLINK_CEXT_TRACE=2 trace level
* 2010-12-29 351 1.3 rename cext_rriext -> rlink_cext; rename functions
* cext_* -> rlink_cext_* and fifo file names
@@ -80,7 +82,7 @@ static void rlink_cext_doread()
ssize_t nbyte;
nbyte = read(fd_rx, buf, 1);
if (io_trace > 1) {
printf("rlink_cext-I: read rc=%d", nbyte);
printf("rlink_cext-I: read rc=%d", (int)nbyte);
if (nbyte < 0) printf(" errno=%d %s", errno, strerror(errno));
printf("\n");
}
@@ -123,12 +125,16 @@ int rlink_cext_getbyte(int clk)
return -2;
}
printf("rlink_cext-I: connected to rlink_cext_fifo_rx\n");
fflush(stdout);
fd_tx = open("rlink_cext_fifo_tx", O_WRONLY);
if (fd_tx <= 0) {
perror("rlink_cext-E: failed to open rlink_cext_fifo_tx");
return -2;
}
printf("rlink_cext-I: connected to rlink_cext_fifo_tx\n");
fflush(stdout);
nidle = 0;
ncesc = 0;
nside = -1;
@@ -154,6 +160,7 @@ int rlink_cext_getbyte(int clk)
if (qr_eof != 0) { /* EOF seen */
if (ncesc >= 2) { /* two+ CESC seen ? */
printf("rlink_cext-I: seen EOF, wait for reconnect\n");
fflush(stdout);
close(fd_rx);
close(fd_tx);
fd_rx = -1;
@@ -163,7 +170,9 @@ int rlink_cext_getbyte(int clk)
}
printf("rlink_cext-I: seen EOF, schedule clock stop and exit\n");
fflush(stdout);
return -1; /* signal EOF seen */
} else if (qr_err == EAGAIN) { /* nothing read, return idle */
if (nidle < 8 || (nidle%1024)==0) {
irc = sched_yield();
@@ -223,7 +232,7 @@ int rlink_cext_putbyte(int dat)
buf[0] = (unsigned char) dat;
nbyte = write(fd_tx, buf, 1);
if (io_trace > 1) {
printf("rlink_cext-I: write rc=%d", nbyte);
printf("rlink_cext-I: write rc=%d", (int)nbyte);
if (nbyte < 0) printf(" errno=%d %s", errno, strerror(errno));
printf("\n");
}

8
rtl/vlib/serport/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p definition
# 2007-07-03 45 1.0 Initial version
@@ -10,7 +11,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/vlib/serport/tb/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.3.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.3 use includes from rtl/make
# 2009-11-21 252 1.2 add ISim support
# 2007-11-26 98 1.1 use make includes
@@ -12,7 +13,10 @@ EXE_all += tb_serport_uart_rxtx
EXE_all += tb_serport_autobaud
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

8
rtl/vlib/xlib/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version omment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-08 100 1.0 Initial version
#
@@ -9,7 +10,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

8
rtl/w11a/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.1.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.1 use includes from rtl/make
# 2007-12-09 100 1.0.1 drop ISE_p def
# 2007-07-08 65 1.0 Initial version
@@ -10,7 +11,10 @@ VBOM_all = $(wildcard *.vbom)
NGC_all = $(VBOM_all:.vbom=.ngc)
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all clean
#

29
rtl/w11a/pdp11.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: pdp11.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: pdp11.vhd 569 2014-07-13 14:36:32Z mueller $
--
-- Copyright 2006-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -16,9 +16,12 @@
-- Description: Definitions for pdp11 components
--
-- Dependencies: -
-- Tool versions: xst 8.2, 9.1, 9.2, 11.4, 12.1, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-07-12 569 1.4.9 dpath_stat_type: merge div_zero+div_ovfl to div_quit
-- dpath_cntl_type: add munit_s_div_sr
-- 2011-11-18 427 1.4.8 now numeric_std clean
-- 2010-12-30 351 1.4.7 rename pdp11_core_rri->pdp11_core_rbus; use rblib
-- 2010-10-23 335 1.4.6 rename RRI_LAM->RB_LAM;
@@ -162,6 +165,7 @@ package pdp11 is
munit_s_div : slbit; -- munit s_opg_div state
munit_s_div_cn : slbit; -- munit s_opg_div_cn state
munit_s_div_cr : slbit; -- munit s_opg_div_cr state
munit_s_div_sr : slbit; -- munit s_opg_div_sr state
munit_s_ash : slbit; -- munit s_opg_ash state
munit_s_ash_cn : slbit; -- munit s_opg_ash_cn state
munit_s_ashc : slbit; -- munit s_opg_ashc state
@@ -180,7 +184,7 @@ package pdp11 is
"00",'0',"000000000","00",'0', -- ounit
"00","00","00",'0',"000",'0', -- aunit
"0000",'0', -- lunit
"00",'0','0','0','0','0','0','0', -- munit
"00",'0','0','0','0','0','0','0','0',-- munit
'0',"000","000","00",'0' -- rest
);
@@ -211,10 +215,9 @@ package pdp11 is
type dpath_stat_type is record -- data path status
ccout_z : slbit; -- current effective Z cc flag
shc_tc : slbit; -- last shc cycle (shc==0)
div_cr : slbit; -- division: reminder correction needed
div_cr : slbit; -- division: remainder correction needed
div_cq : slbit; -- division: quotient correction needed
div_zero : slbit; -- division: divident or divisor zero
div_ovfl : slbit; -- division: overflow
div_quit : slbit; -- division: abort (0/ or /0 or V=1)
end record dpath_stat_type;
constant dpath_stat_init : dpath_stat_type := (others=>'0');
@@ -790,18 +793,18 @@ component pdp11_munit is -- mul/div unit for data (munit)
DTMP : in slv16; -- 'tmp' data in
GPR_DSRC : in slv16; -- 'src' data from GPR
FUNC : in slv2; -- function
S_DIV : in slbit; -- s_opg_div state
S_DIV_CN : in slbit; -- s_opg_div_cn state
S_DIV_CR : in slbit; -- s_opg_div_cr state
S_DIV : in slbit; -- s_opg_div state (load dd_low)
S_DIV_CN : in slbit; -- s_opg_div_cn state (1st..16th cycle)
S_DIV_CR : in slbit; -- s_opg_div_cr state (remainder corr.)
S_DIV_SR : in slbit; -- s_opg_div_sr state (store remainder)
S_ASH : in slbit; -- s_opg_ash state
S_ASH_CN : in slbit; -- s_opg_ash_cn state
S_ASHC : in slbit; -- s_opg_ashc state
S_ASHC_CN : in slbit; -- s_opg_ashc_cn state
SHC_TC : out slbit; -- last shc cycle (shc==0)
DIV_CR : out slbit; -- division: reminder correction needed
DIV_CR : out slbit; -- division: remainder correction needed
DIV_CQ : out slbit; -- division: quotient correction needed
DIV_ZERO : out slbit; -- division: divident or divisor zero
DIV_OVFL : out slbit; -- division: overflow
DIV_QUIT : out slbit; -- division: abort (0/ or /0 or V=1)
DOUT : out slv16; -- data output
DOUTE : out slv16; -- data output extra
CCOUT : out slv4 -- condition codes out

12
rtl/w11a/pdp11_dpath.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: pdp11_dpath.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: pdp11_dpath.vhd 569 2014-07-13 14:36:32Z mueller $
--
-- Copyright 2006-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -24,9 +24,11 @@
--
-- Test bench: tb/tb_pdp11_core (implicit)
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-07-12 569 1.2.3 use DIV_QUIT and S_DIV_SR for pdp11_munit
-- 2011-11-18 427 1.2.2 now numeric_std clean
-- 2010-09-18 300 1.2.1 rename (adlm)box->(oalm)unit
-- 2010-06-13 305 1.2 rename CPDIN -> CP_DIN; add CP_DOUT out port;
@@ -190,6 +192,7 @@ begin
S_DIV => CNTL.munit_s_div,
S_DIV_CN => CNTL.munit_s_div_cn,
S_DIV_CR => CNTL.munit_s_div_cr,
S_DIV_SR => CNTL.munit_s_div_sr,
S_ASH => CNTL.munit_s_ash,
S_ASH_CN => CNTL.munit_s_ash_cn,
S_ASHC => CNTL.munit_s_ashc,
@@ -197,8 +200,7 @@ begin
SHC_TC => STAT.shc_tc,
DIV_CR => STAT.div_cr,
DIV_CQ => STAT.div_cq,
DIV_ZERO => STAT.div_zero,
DIV_OVFL => STAT.div_ovfl,
DIV_QUIT => STAT.div_quit,
DOUT => MUNIT_DOUT,
DOUTE => DRESE,
CCOUT => MUNIT_CCOUT

140
rtl/w11a/pdp11_munit.vhd
View File

@@ -1,6 +1,6 @@
-- $Id: pdp11_munit.vhd 427 2011-11-19 21:04:11Z mueller $
-- $Id: pdp11_munit.vhd 577 2014-08-03 20:49:42Z mueller $
--
-- Copyright 2006-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
-- This program is free software; you may redistribute and/or modify it under
-- the terms of the GNU General Public License as published by the Free
@@ -18,9 +18,20 @@
-- Dependencies: -
-- Test bench: tb/tb_pdp11_core (implicit)
-- Target Devices: generic
-- Tool versions: xst 8.2, 9.1, 9.2, 13.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; ghdl 0.18-0.31
--
-- Synthesized (xst):
-- Date Rev ise Target flop lutl lutm slic t peri
-- 2014-07-12 569 14.7 131013 xc6slx16-2 30 154 0 46 s 6.8
-- 2014-07-11 568 14.7 131013 xc6slx16-2 28 123 0 47 s 5.6
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-08-05 578 1.2.3 fix proc_div sensitivity list
-- 2014-08-03 577 1.2.2 use DTMP_POS rather signed(Q)>0 (xst bug for S-3)
-- 2014-07-26 575 1.2.1 fix proc_omux sensitivity list
-- 2014-07-12 569 1.2 merge DIV_ZERO+DIV_OVFL to DIV_QUIT; add S_DIV_SR
-- BUGFIX: fix divide logic, dr+q max neg issues
-- 2011-11-18 427 1.1.1 now numeric_std clean
-- 2010-09-18 300 1.1 renamed from mbox
-- 2007-06-14 56 1.0.1 Use slvtypes.all
@@ -44,18 +55,18 @@ entity pdp11_munit is -- mul/div unit for data (munit)
DTMP : in slv16; -- 'tmp' data in
GPR_DSRC : in slv16; -- 'src' data from GPR
FUNC : in slv2; -- function
S_DIV : in slbit; -- s_opg_div state
S_DIV_CN : in slbit; -- s_opg_div_cn state
S_DIV_CR : in slbit; -- s_opg_div_cr state
S_DIV : in slbit; -- s_opg_div state (load dd_low)
S_DIV_CN : in slbit; -- s_opg_div_cn state (1st..16th cycle)
S_DIV_CR : in slbit; -- s_opg_div_cr state (remainder corr.)
S_DIV_SR : in slbit; -- s_opg_div_sr state (store remainder)
S_ASH : in slbit; -- s_opg_ash state
S_ASH_CN : in slbit; -- s_opg_ash_cn state
S_ASHC : in slbit; -- s_opg_ashc state
S_ASHC_CN : in slbit; -- s_opg_ashc_cn state
SHC_TC : out slbit; -- last shc cycle (shc==0)
DIV_CR : out slbit; -- division: reminder correction needed
DIV_CR : out slbit; -- division: remainder correction needed
DIV_CQ : out slbit; -- division: quotient correction needed
DIV_ZERO : out slbit; -- division: divident or divisor zero
DIV_OVFL : out slbit; -- division: overflow
DIV_QUIT : out slbit; -- division: abort (0/ or /0 or V=1)
DOUT : out slv16; -- data output
DOUTE : out slv16; -- data output extra
CCOUT : out slv4 -- condition codes out
@@ -66,6 +77,8 @@ architecture syn of pdp11_munit is
signal R_DD_L : slv16 := (others=>'0'); -- divident, low order part
signal R_DDO_LT : slbit := '0'; -- original sign bit of divident
signal R_MAXFIX : slbit := '0'; -- maxfix flag for division
signal R_QO_LT : slbit := '0'; -- expected q sign for division
signal R_DIV_V : slbit := '0'; -- V flag for division
signal R_SHC : slv6 := (others=>'0'); -- shift counter for div and ash/c
signal R_C1 : slbit := '0'; -- first cycle indicator
@@ -75,6 +88,8 @@ architecture syn of pdp11_munit is
signal NEXT_DD_L : slv16 := (others=>'0');
signal NEXT_DDO_LT : slbit := '0';
signal NEXT_MAXFIX : slbit := '0';
signal NEXT_QO_LT : slbit := '0';
signal NEXT_DIV_V : slbit := '0';
signal NEXT_SHC : slv6 := (others=>'0');
signal NEXT_C1 : slbit := '0';
@@ -85,9 +100,11 @@ architecture syn of pdp11_munit is
signal SHC_TC_L : slbit := '0';
signal DDST_ZERO : slbit := '0';
signal DDST_NMAX : slbit := '0';
signal DSRC_ZERO : slbit := '0';
signal DSRC_ONES : slbit := '0';
signal DTMP_ZERO : slbit := '0';
signal DTMP_POS : slbit := '0';
signal DOUT_DIV : slv16 := (others=>'0');
signal DOUTE_DIV : slv16 := (others=>'0');
@@ -103,6 +120,8 @@ begin
if rising_edge(CLK) then
R_DD_L <= NEXT_DD_L;
R_DDO_LT <= NEXT_DDO_LT;
R_MAXFIX <= NEXT_MAXFIX;
R_QO_LT <= NEXT_QO_LT;
R_DIV_V <= NEXT_DIV_V;
R_SHC <= NEXT_SHC;
R_C1 <= NEXT_C1;
@@ -116,13 +135,18 @@ begin
begin
DDST_ZERO <= '0';
DDST_NMAX <= '0';
DSRC_ZERO <= '0';
DSRC_ONES <= '0';
DTMP_ZERO <= '0';
DTMP_POS <= '0';
if unsigned(DDST) = 0 then
DDST_ZERO <= '1';
end if;
if DDST = "1000000000000000" then
DDST_NMAX <= '1';
end if;
if unsigned(DSRC) = 0 then
DSRC_ZERO <= '1';
end if;
@@ -132,6 +156,9 @@ begin
if unsigned(DTMP) = 0 then
DTMP_ZERO <= '1';
end if;
if signed(DTMP) > 0 then
DTMP_POS <= '1';
end if;
end process proc_comm;
@@ -168,13 +195,17 @@ begin
end process proc_shc;
proc_div: process (DDST, DSRC, DTMP, GPR_DSRC, DR, DD_H, Q,
R_DD_L, R_DDO_LT, R_DIV_V, R_SHC, R_C1,
S_DIV, S_DIV_CN, S_DIV_CR,
DDST_ZERO, DSRC_ZERO, DTMP_ZERO)
R_DD_L, R_DDO_LT, R_MAXFIX, R_QO_LT, R_DIV_V, R_SHC, R_C1,
S_DIV, S_DIV_CN, S_DIV_CR, S_DIV_SR,
DDST_ZERO, DDST_NMAX, DSRC_ZERO, DTMP_ZERO, DTMP_POS)
variable div_zero : slbit := '0';
variable div_ovfl : slbit := '0';
variable shftdd : slbit := '0';
variable subadd : slbit := '0';
variable dd_le : slbit := '0';
variable dd_ge : slbit := '0';
variable dd_gt : slbit := '0';
variable qbit : slbit := '0';
@@ -188,10 +219,12 @@ begin
NEXT_DD_L <= R_DD_L;
NEXT_DDO_LT <= R_DDO_LT;
NEXT_MAXFIX <= R_MAXFIX;
NEXT_QO_LT <= R_QO_LT;
NEXT_DIV_V <= R_DIV_V;
DIV_ZERO <= '0';
DIV_OVFL <= '0';
div_zero := '0';
div_ovfl := '0';
qbit_1 := not (DR(15) xor DD_H(15)); -- !(dr<0 ^ dd_h<0)
@@ -204,8 +237,6 @@ begin
if R_C1 = '1' then
subadd := qbit_1;
DIV_ZERO <= DDST_ZERO or
(DSRC_ZERO and DTMP_ZERO); -- note: DTMP here still dd_low !
else
subadd := Q(0);
end if;
@@ -216,6 +247,16 @@ begin
dd_h_new := slv(signed(dd_h_old) - signed(DR));
end if;
dd_le := '0';
if signed(dd_h_new) <= 0 then
dd_le := '1'; -- set if dd_new_h <= 0
end if;
dd_ge := '0';
if signed(dd_h_new) >= -1 then
dd_ge := '1'; -- set if dd_new_h >= -1
end if;
dd_gt := '0';
if dd_h_new(15) = '0' and
(unsigned(dd_h_new(14 downto 0))/=0 or
@@ -227,19 +268,59 @@ begin
if R_DDO_LT = '0' then
qbit_n := DR(15) xor not dd_h_new(15); -- b_dr_lt ^ !b_dd_lt
else
qbit_n := DR(15) xor dd_gt; -- b_dr_lt ^ b_dd_gt
if R_MAXFIX = '0' then
qbit_n := DR(15) xor dd_gt; -- b_dr_lt ^ b_dd_gt
else
qbit_n := dd_h_new(15); -- b_dd_lt
end if;
end if;
if S_DIV = '1' then
NEXT_DDO_LT <= DD_H(15);
NEXT_DD_L <= GPR_DSRC;
NEXT_DD_L <= GPR_DSRC;
NEXT_MAXFIX <= '0';
if DDST_NMAX = '1' and GPR_DSRC = "0000000000000000" then
NEXT_MAXFIX <= '1'; -- b_dr_nmax && (ddi_l == 0)
end if;
NEXT_QO_LT <= DD_H(15) xor DR(15); -- b_di_lt ^ b_dr_lt
end if;
if R_C1 = '1' then
NEXT_DIV_V <= (DD_H(15) xor DD_H(14)) or
(DD_H(15) xor (DR(15) xor qbit_n));
DIV_OVFL <= (DD_H(15) xor DD_H(14)) or --??? cleanup
(DD_H(15) xor (DR(15) xor qbit_n)); --??? cleanup
div_zero := DDST_ZERO or
(DSRC_ZERO and DTMP_ZERO); -- note: DTMP here still dd_low !
if DDST_NMAX='0' and (DD_H(15) xor DD_H(14)) = '1' then
div_ovfl := '1'; -- !b_dr_nmax && (b_di_31 != b_di_30)
end if;
if R_DDO_LT = '0' then -- if (!b_di_lt)
if R_QO_LT = '0' then -- if (!b_qo_lt)
if dd_h_new(15) = '0' then -- if (!b_dd_lt)
div_ovfl := '1';
end if;
else -- else
if dd_le = '0' then -- if (!b_dd_le)
div_ovfl := '1';
end if;
end if;
else
if R_QO_LT = '0' then -- if (!b_qo_lt)
if dd_gt = '0' then -- if (!b_dd_gt)
div_ovfl := '1';
end if;
else -- else
if dd_ge = '0' then -- if (!b_dd_ge)
div_ovfl := '1';
end if;
end if;
end if;
NEXT_DIV_V <= div_ovfl;
elsif S_DIV_SR = '1' then
if R_QO_LT='1' and DTMP_POS='1' then
div_ovfl := '1';
end if;
NEXT_DIV_V <= div_ovfl;
end if;
if S_DIV_CN = '1' then
@@ -252,9 +333,12 @@ begin
qbit := qbit_1;
end if;
DIV_CR <= not (R_DDO_LT xor
(DR(15) xor Q(0))); --!(b_ddo_lt ^ (b_dr_lt ^ b_qbit));
DIV_CQ <= R_DDO_LT xor DR(15); -- b_ddo_lt ^ b_dr_lt;
DIV_QUIT <= div_zero or div_ovfl;
DIV_CR <= R_MAXFIX or -- b_maxfix | (!(b_ddo_lt ^ (b_dr_lt ^ b_qbit)))
(not (R_DDO_LT xor (DR(15) xor Q(0))));
DIV_CQ <= R_MAXFIX or -- b_maxfix | (b_ddo_lt ^ b_dr_lt)
(R_DDO_LT xor DR(15));
DOUT_DIV <= dd_h_new;
DOUTE_DIV <= Q(14 downto 0) & qbit;
@@ -293,7 +377,7 @@ begin
end process proc_ash;
proc_omux: process (DSRC, DDST, DTMP, FUNC,
R_ASH_V, R_ASH_C, R_SHC, R_DIV_V,
R_ASH_V, R_ASH_C, R_SHC, R_DIV_V, R_QO_LT,
DOUT_DIV, DOUTE_DIV,
DSRC_ZERO, DSRC_ONES, DTMP_ZERO, DDST_ZERO)
@@ -366,7 +450,7 @@ begin
CCOUT(3) <= '0'; -- N=0 if div/0
CCOUT(2) <= '1'; -- Z=1 if div/0
elsif R_DIV_V = '1' then
CCOUT(3) <= DSRC(15) xor DDST(15); -- N (from unchanged reg)
CCOUT(3) <= R_QO_LT; -- N (send expected sign)
CCOUT(2) <= '0'; -- Z (from unchanged reg) ??? veri
else
CCOUT(3) <= DTMP(15); -- N (from Q (DTMP))

30
rtl/w11a/pdp11_sequencer.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: pdp11_sequencer.vhd 556 2014-05-29 19:01:39Z mueller $
-- $Id: pdp11_sequencer.vhd 569 2014-07-13 14:36:32Z mueller $
--
-- Copyright 2006-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -18,10 +18,13 @@
-- Dependencies: ib_sel
-- Test bench: tb/tb_pdp11_core (implicit)
-- Target Devices: generic
-- Tool versions: xst 8.2-14.7; viv 2014.1; ghdl 0.18-0.29
-- Tool versions: xst 8.2-14.7; viv 2014.1; ghdl 0.18-0.31
--
-- Revision History:
-- Date Rev Version Comment
-- 2014-07-12 569 1.5.1 rename s_opg_div_zero -> s_opg_div_quit;
-- use DP_STAT.div_quit; set munit_s_div_sr;
-- BUGFIX: s_opg_div_sr: check for late div_quit
-- 2014-04-20 554 1.5 now vivado compatible (add dummy assigns in procs)
-- 2011-11-18 427 1.4.2 now numeric_std clean
-- 2010-10-23 335 1.4.1 use ib_sel
@@ -181,7 +184,7 @@ architecture syn of pdp11_sequencer is
s_opg_div_cr,
s_opg_div_sq,
s_opg_div_sr,
s_opg_div_zero,
s_opg_div_quit,
s_opg_ash,
s_opg_ash_cn,
s_opg_ashc,
@@ -1708,8 +1711,8 @@ begin
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
ndpcntl.dtmp_sel := c_dpath_dtmp_drese; -- DTMP = DRESE
nstate := s_opg_div_cn;
if DP_STAT.div_zero='1' or DP_STAT.div_ovfl='1' then
nstate := s_opg_div_zero;
if DP_STAT.div_quit = '1' then
nstate := s_opg_div_quit;
else
ndpcntl.dsrc_we := '1'; -- update DSRC
ndpcntl.dtmp_we := '1'; -- update DTMP
@@ -1718,14 +1721,14 @@ begin
nstate := s_opg_div_cr;
end if;
when s_opg_div_cr => -- DIV (reminder correction)
when s_opg_div_cr => -- DIV (remainder correction)
ndpcntl.munit_s_div_cr := '1';
ndpcntl.dres_sel := R_IDSTAT.res_sel; -- DRES = choice of idec
ndpcntl.dsrc_sel := c_dpath_dsrc_res; -- DSRC = DRES
ndpcntl.dsrc_we := DP_STAT.div_cr; -- update DSRC
nstate := s_opg_div_sq;
when s_opg_div_sq => -- DIV (store quotient)
when s_opg_div_sq => -- DIV (correct and store quotient)
ndpcntl.ounit_asel := c_ounit_asel_dtmp; -- OUNIT A=DTMP
ndpcntl.ounit_const := "00000000"&DP_STAT.div_cq;-- OUNIT const = Q corr.
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (q cor)
@@ -1736,16 +1739,21 @@ begin
ndpcntl.dtmp_we := '1'; -- update DTMP (Q)
nstate := s_opg_div_sr;
when s_opg_div_sr => -- DIV (store reminder)
when s_opg_div_sr => -- DIV (store remainder)
ndpcntl.munit_s_div_sr := '1';
ndpcntl.ounit_asel := c_ounit_asel_dsrc; -- OUNIT A=DSRC
ndpcntl.ounit_bsel := c_ounit_bsel_const; -- OUNIT B=const (0)
ndpcntl.dres_sel := c_dpath_res_ounit; -- DRES = OUNIT
ndpcntl.gpr_adst := SRCREG(2 downto 1) & "1";-- write odd reg !
ndpcntl.gpr_we := '1';
ndpcntl.psr_ccwe := '1';
do_fork_next(nstate, nstatus, nmmumoni);
when s_opg_div_zero => -- DIV (/0 or 0/ abort)
if DP_STAT.div_quit = '1' then
nstate := s_opg_div_quit;
else
do_fork_next(nstate, nstatus, nmmumoni);
end if;
when s_opg_div_quit => -- DIV (0/ or /0 or V=1 aborts)
ndpcntl.psr_ccwe := '1';
do_fork_next(nstate, nstatus, nmmumoni);

11
rtl/w11a/tb/Makefile
View File

@@ -1,7 +1,8 @@
# $Id: Makefile 477 2013-01-27 14:07:10Z mueller $
# $Id: Makefile 575 2014-07-27 20:55:41Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 545 1.4.1 make reference board configurable via XTW_BOARD
# 2011-08-13 405 1.4 use includes from rtl/make
# 2010-12-30 351 1.3 retire tb_rripdp_pdp11core tb_rriext_pdp11core
# 2009-11-22 252 1.2 add ISim support
@@ -11,8 +12,12 @@
#
EXE_all = tb_pdp11core
#
# reference board for test synthesis is Spartan-6 based Nexys3
include $(RETROBASE)/rtl/make/xflow_default_nexys3.mk
# default reference board for test synthesis is Spartan-6 based Nexys3
ifndef XTW_BOARD
XTW_BOARD=nexys3
endif
include $(RETROBASE)/rtl/make/xflow_default_$(XTW_BOARD).mk
#
.PHONY : all all_ssim all_tsim clean
#

28
rtl/w11a/tb/tb_pdp11core_stim.dat
View File

@@ -1,7 +1,9 @@
# $Id: tb_pdp11core_stim.dat 351 2010-12-30 21:50:54Z mueller $
# $Id: tb_pdp11core_stim.dat 569 2014-07-13 14:36:32Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-13 569 2.3 after ECO-026: correct test 31.1 wrong V=1 cases
# correct test 37.2: 2 V=1 cases have regs now updated
# 2010-06-20 308 2.2.1 add wibrb, ribr, wibr based tests
# 2010-06-13 305 2.2 adopt to new rri address and function semantics
# 2009-11-22 252 2.1.14 change SSR0 expects, adapt to ECO-021.
@@ -3099,9 +3101,9 @@ brm 63
d=000004 -- ! mem(11016) div 000000,000000,021706 -> n0z1v1c0
d=000000 -- ! mem(11020) 0/9158 -> 0,0
d=000000 -- ! mem(11022)
d=000012 -- ! mem(11024) div 177777,100000,000001->n1z0v1c0 [[s:10]]
d=177777 -- ! mem(11026) -32768/1 -> overflow [[s:100000]]
d=100000 -- ! mem(11030) [[s:000000]]
d=000010 -- ! mem(11024) div 177777,100000,000001->n1z0v1c0
d=100000 -- ! mem(11026) -32768/1 -> -32768,0
d=000000 -- ! mem(11030)
d=000002 -- ! mem(11032) div 177777,100000,177777 -> n0z0v1c0 ?? 2
d=177777 -- ! mem(11034) -32768/-1 -> overflow
d=100000 -- ! mem(11036)
@@ -3114,9 +3116,9 @@ brm 63
d=000010 -- ! mem(11054) div 140000,100001,077777 -> n1z0v0c0
d=100001 -- ! mem(11056) -1073709055/32767 -> -32767,-32766
d=100002 -- ! mem(11060)
d=000012 -- ! mem(11062) div 140000,100000,077777->n1z0v1c0 [[s:10]]
d=140000 -- ! mem(11064) -1073709056/32767 -> overflow [[s:100000]]
d=100000 -- ! mem(11066) [[s:000000]]
d=000010 -- ! mem(11062) div 140000,100000,077777->n1z0v1c0
d=100000 -- ! mem(11064) -1073709056/32767 -> -32768,0
d=000000 -- ! mem(11066)
d=000002 -- ! mem(11070) div 040000,000000,077777 -> n0z0v1c0
d=040000 -- ! mem(11072) 1073741824/32767 -> overflow
d=000000 -- ! mem(11074)
@@ -3874,7 +3876,7 @@ bwm 51
177777 -- 177777,177777,177777, 0, 1, 0#
177777 --
177777 --
000000 -- 0,177777,177777,12, 0,177777#
000000 -- 0,177777,177777,12, 0,177777# w11a:12,000001,000000
177777 --
177777 --
177777 -- 177777, 0,177777, 2,177777, 0#
@@ -3901,7 +3903,7 @@ bwm 51
000000 -- 0,177777, 1, 2, 0,177777#
177777 --
000001 --
177777 -- 177777, 45716, 1,12,177777, 45716#
177777 -- 177777, 45716, 1,12,177777, 45716# w11a:12,045716,000000
045716 --
000001 --
000000 -- 0, 2,177770, 4, 0, 2#
@@ -3939,9 +3941,9 @@ brm 51
d=000000 --!177777,177777,177777, 0, 1, 0#
d=000001 --!
d=000000 --!
d=000012 --! 0,177777,177777,12, 0,177777#
d=000012 --! 0,177777,177777,12, 0,177777# w11a:12,000001,000000
d=000001 --!
d=000000 --!
d=177777 --!
d=000002 --!177777, 0,177777, 2,177777, 0#
d=177777 --!
d=000000 --!
@@ -3966,9 +3968,9 @@ brm 51
d=000002 --! 0,177777, 1, 2, 0,177777#
d=000000 --!
d=177777 --!
d=000012 --!177777, 45716, 1,12,177777, 45716#
d=177777 --!
d=000012 --!177777, 45716, 1,12,177777, 45716# w11a:12,045716,000000
d=045716 --!
d=000000 --!
d=000004 --! 0, 2,177770, 4, 0, 2#
d=000000 --!
d=000002 --!

7
tools/asm-11/tests/test_0120_op_rg.mac
View File

@@ -1,4 +1,4 @@
; $Id: test_0120_op_rg.mac 501 2013-03-30 13:53:39Z mueller $
; $Id: test_0120_op_rg.mac 575 2014-07-27 20:55:41Z mueller $
;
; test opcodes with 1 1/2 operands
;
@@ -9,7 +9,6 @@ a: .word 0
pa: .word a
sub: rts pc ;;!! 001004: 000207
jsr pc,sub ;;!! 001006: 004767 177772
xor r1,a ;;!! 074167 177762
@@ -19,4 +18,8 @@ sub: rts pc ;;!! 001004: 000207
ash #12,r3 ;;!! 072327 000012
ashc @#a,r4 ;;!! 073437 001000
; test call + return aliases too
sub1: return ;;!! 000207
call sub1 ;;!! 004767 177772
.end

7
tools/bin/asm-11
View File

@@ -1,7 +1,7 @@
#!/usr/bin/perl -w
# $Id: asm-11 547 2013-12-29 13:10:07Z mueller $
# $Id: asm-11 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -14,6 +14,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-26 575 1.0.3 add 'call' and 'return' to pst (as in macro-11)
# 2013-04-07 503 1.0.2 list dot for .even,.dot,.blkb,.blkw
# 2013-04-01 502 1.0.1 BUGFIX: -2(r0),@-2(r0) was broken, parser fixed
# add -lsm (lsmem format) output; add implicit .word
@@ -127,6 +128,7 @@ my %pst = (
'mfpt' => {typ=>'op', val=>0000007, fmt=>'-' },
'jmp' => {typ=>'op', val=>0000100, fmt=>'g' },
'rts' => {typ=>'op', val=>0000200, fmt=>'r' },
'return' => {typ=>'op', val=>0000207, fmt=>'-' }, # alias for rts pc
'spl' => {typ=>'op', val=>0000230, fmt=>'n3' },
'nop' => {typ=>'op', val=>0000240, fmt=>'-' },
'clc' => {typ=>'op', val=>0000241, fmt=>'-' },
@@ -148,6 +150,7 @@ my %pst = (
'bgt' => {typ=>'op', val=>0003000, fmt=>'s8' },
'ble' => {typ=>'op', val=>0003400, fmt=>'s8' },
'jsr' => {typ=>'op', val=>0004000, fmt=>'rg' },
'call' => {typ=>'op', val=>0004700, fmt=>'g' }, # alias for jsr pc,<dst>
'clr' => {typ=>'op', val=>0005000, fmt=>'g' },
'com' => {typ=>'op', val=>0005100, fmt=>'g' },
'inc' => {typ=>'op', val=>0005200, fmt=>'g' },

19
tools/bin/create_disk
View File

@@ -1,7 +1,7 @@
#!/usr/bin/perl -w
# $Id: create_disk 522 2013-05-24 17:50:29Z mueller $
# $Id: create_disk 562 2014-06-15 17:23:18Z mueller $
#
# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -14,6 +14,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-06-14 562 1.1 BUGFIX: repair --boot; add RM02,RM05,RP04,RP07
# 2013-05-20 521 1.0 First draft
#
@@ -32,7 +33,7 @@ GetOptions(\%opts, "help", "typ=s", "ini=s", "bad", "boot"
sub do_inipatt;
sub do_badtable;
sub do_noboot;
sub do_boot;
sub print_help;
# disk type table
@@ -40,7 +41,11 @@ my %disktype = (
RK05 => {cyl=> 203, hd=> 2, sec=> 12, bps=> 512, bad=>0},
RL01 => {cyl=> 256, hd=> 2, sec=> 40, bps=> 256, bad=>1},
RL02 => {cyl=> 512, hd=> 2, sec=> 40, bps=> 256, bad=>1},
RP06 => {cyl=> 815, hd=> 19, sec=> 22, bps=> 512, bad=>1}
RM02 => {cyl=> 823, hd=> 5, sec=> 32, bps=> 512, bad=>1},
RM05 => {cyl=> 823, hd=> 19, sec=> 32, bps=> 512, bad=>1},
RP04 => {cyl=> 411, hd=> 19, sec=> 22, bps=> 512, bad=>1},
RP06 => {cyl=> 815, hd=> 19, sec=> 22, bps=> 512, bad=>1},
RP07 => {cyl=> 630, hd=> 32, sec=> 50, bps=> 512, bad=>1}
);
autoflush STDOUT 1 if (-p STDOUT); # autoflush if output into pipe
@@ -101,7 +106,7 @@ do_inipatt if $opts{ini};
do_badtable if $opts{bad};
# write dummy boot block
do_noboot if $opts{noboot};
do_boot if $opts{boot};
#-------------------------------------------------------------------------------
@@ -183,7 +188,7 @@ sub do_badtable {
#-------------------------------------------------------------------------------
sub do_noboot {
sub do_boot {
my @dat;
push @dat, 0012700, 0000100; # start: mov #text, r0
@@ -219,7 +224,7 @@ sub do_noboot {
$buf .= "\r\n";
# NOTE: the text above almost fills the first 512 bytes !!
# don't any more text, all has been said anyway !!
# don't add more text, all has been said anyway !!
$rc = $fh->seek(0100, SEEK_SET);
if (not $rc) {die "seek failed: $!";}

7
tools/bin/tbw
View File

@@ -1,7 +1,7 @@
#!/usr/bin/perl -w
# $Id: tbw 420 2011-11-06 21:25:54Z mueller $
# $Id: tbw 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2007-2011 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -14,6 +14,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.2.4 use xtwi to start ISim models
# 2011-11-06 420 1.2.3 fix tbw.dat parsing (allow / in file names)
# 2010-05-23 294 1.2.2 handle tb_code's in non-local directories
# 2010-04-18 279 1.2.1 add -help and more text to print_usage()
@@ -236,7 +237,7 @@ foreach my $dsc (@file_dsc) {
#
if ($is_isim_run) { # handle for isim 'run all'
my $cmd = $tb_code . " " . join " ",@ARGV;
my $cmd = "xtwi" . " " . $tb_code . " " . join " ",@ARGV;
open (ISIM_RUN, "| $cmd")
or die "failed to open process pipe to isim: $!";
print ISIM_RUN "run all\n";

40
tools/bin/ti_w11
View File

@@ -1,8 +1,9 @@
#!/usr/bin/perl -w
# $Id: ti_w11 516 2013-05-05 21:24:52Z mueller $
# $Id: ti_w11 570 2014-07-20 19:05:11Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-07-13 570 1.2 bugfix: split options args into ti_rri opts and cmds
# 2013-05-05 516 1.1 renamed to ti_w11
# 2013-04-26 510 1.0 Initial version (derived from dorri)
#
@@ -104,6 +105,28 @@ while (scalar(@ARGV)) {
}
}
#
# process remaining arguments, separate ti_rri options and commands
#
# handle options (all starting with -)
my @tiopts;
while (scalar(@ARGV)) {
last unless $ARGV[0] =~ m{^--};
push @tiopts, shift @ARGV;
}
# handle comands
my @ticmds;
while (scalar(@ARGV)) {
my $curarg = shift @ARGV;
if ($curarg =~ m{^@(.*)$} && ! -r $1) {
print STDERR "ti_w11-E: file '$1' not found\n";
exit 1;
}
push @ticmds,$curarg;
}
#
# check that either -s3/n2/n3 or -t or -u given
# setup pi_rri options for either case
@@ -129,6 +152,7 @@ if ($opt_io eq 'f') {
push @arglist, '--logl=2';
push @arglist, '--int' unless $opt_b;
push @arglist, '--pack=rw11';
push @arglist, @tiopts; # add options from ARGV
push @arglist, '--';
#
@@ -144,7 +168,6 @@ if ($opt_io eq 'f') {
push @arglist, 'rlc oob -sbdata 8 0x2';
push @arglist, 'rlc oob -sbdata 16 0x4';
}
}
#
@@ -167,18 +190,7 @@ if (defined $val_e) {
push @arglist, 'cpu0 cp -stapc 0200';
}
#
# all remaining commands
#
while (scalar(@ARGV)) {
my $curarg = shift @ARGV;
if ($curarg =~ m{^@(.*)$} && ! -r $1) {
print STDERR "ti_w11-E: file '$1' not found\n";
exit 1;
}
push @arglist,$curarg;
}
push @arglist, @ticmds; # add commands from ARGV
#
# find ti_rri executable

124
tools/bin/ticonv_pdpcp
View File

@@ -1,7 +1,7 @@
#!/usr/bin/perl -w
# $Id: ticonv_pdpcp 521 2013-05-20 22:16:45Z mueller $
# $Id: ticonv_pdpcp 576 2014-08-02 12:24:28Z mueller $
#
# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -14,6 +14,8 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-31 576 1.1 add -cmax option (default = 3); support .sdef
# 2014-07-26 575 1.0.4 add --tout option (sets wtcpu timeout)
# 2013-05-19 521 1.0.3 use -be subopt of -wibrb
# 2013-04-12 504 1.0.2 renamed from pi2ti_pdpcp; fix [rm]wi handling
# use wtcpu command; use wibrbbe command;
@@ -28,7 +30,14 @@ use Getopt::Long;
my %opts = ();
GetOptions(\%opts ) || exit 1;
GetOptions(\%opts, "tout=f", "cmax=i"
)
or die "bad options";
sub cmdlist_do;
sub add_edata;
my @cmdlist;
if (scalar(@ARGV) != 2) {
print STDERR "%ticonv_pdpcp-E: usage: ticonv_pdpcp <cpucmd> <filename>\n";
@@ -37,6 +46,12 @@ if (scalar(@ARGV) != 2) {
my $cpu = $ARGV[0];
my $fnam = $ARGV[1];
my $tout = $opts{tout} || 10.;
my $cmax = $opts{cmax} || 6;
my $ref_sdef = 0x00; # by default check for 'hard' errors
my $msk_sdef = 0xf0; # ignore the status bits + attn flag
open IFILE, $fnam or die "failed to open '$fnam'";
while (<IFILE>) {
@@ -56,6 +71,7 @@ while (<IFILE>) {
# C... comments -> write to rlc log --------------------------------
if ($cmd =~ /^C(.*)/) {
cmdlist_do();
my $msg = $1;
$msg =~ s/"/'/g;
$msg =~ s/\[/\{/g;
@@ -63,76 +79,86 @@ while (<IFILE>) {
print "rlc log \"C $msg\"\n";
# .tocmd,.tostp,.togo,.cerr,.merr -> ignore, like pi_rri -----------
} elsif ($cmd =~ /^\.(tocmd|tostp|togo|[cm]err)\s+(\d*)/) {
} elsif ($cmd =~ /^\.(tocmd|tostp|togo|[cm]err)\s+(\d*)$/) {
print "# $cmd currently ignored\n";
# .mode mode -> accept only 'pdpcp', quit otherwise ----------------
} elsif ($cmd =~ /^\.mode\s+(.*)/) {
} elsif ($cmd =~ /^\.mode\s+(.*)$/) {
if ($1 ne "pdpcp") {
print "# FAIL: $cmd not supported\n";
exit 1;
}
# .sdef s=ref[,msk] ------------------------------------------------
} elsif ($cmd =~ /^\.sdef\s+s=([01]+),?([01]*)$/) {
cmdlist_do();
$ref_sdef = oct("0b$1");
$msk_sdef = oct("0b$2");
# .rlmon,.rbmon ----------------------------------------------------
} elsif ($cmd =~ /^\.(r[lb]mon)\s+(\d)/) {
} elsif ($cmd =~ /^\.(r[lb]mon)\s+(\d)$/) {
cmdlist_do();
print "rlc oob -$1 $2\n";
# .scntl -----------------------------------------------------------
} elsif ($cmd =~ /^\.scntl\s+(\d+)\s+(\d)/) {
} elsif ($cmd =~ /^\.scntl\s+(\d+)\s+(\d)$/) {
cmdlist_do();
print "rlc oob -sbcntl $1 $2\n";
# .anena (0|1) -> rlc exec -init -----------------------------------
} elsif ($cmd =~ /^\.anena\s+(\d)/) {
} elsif ($cmd =~ /^\.anena\s+(\d)$/) {
cmdlist_do();
my $dat = $1 ? '[regbld rlink::INIT anena]' : '0';
print "rlc exec -init 0xff $dat\n";
print "rlc exec -attn\n";
# .reset -----------------------------------------------------------
} elsif ($cmd =~ /^\.reset/) {
} elsif ($cmd =~ /^\.reset$/) {
cmdlist_do();
print "rlc exec -init 0 1\n";
# (write) data type commands: wrx,wps,wal,wah,wm,wmi,stapc ---
# Note: 'stapc' must be decoeded before 'sta' !!
# Note: 'stapc' must be decoded before 'sta' !!
# Note: 'wibrb' must be handled separately
# Note: 'wmi' must be matched before 'wm'
} elsif ($cmd =~ /^(wr[0-7]|wps|wal|wah|wmi|wm|stapc)\s+([0-7]+)/) {
print "$cpu cp -$1 0$2\n";
} elsif ($cmd =~ /^(wr[0-7]|wps|wal|wah|wmi|wm|stapc)\s+([0-7]+)$/) {
push @cmdlist, "-$1 0$2";
# (write) data type commands: wibrb ---
} elsif ($cmd =~ /^(wibrb)\s+([0-7]+)/) {
my $base = oct($2);
my $be = $base & 0x3;
if ($be == 0) {
print "$cpu cp -wibrb 0$2\n";
push @cmdlist, "-wibrb 0$2";
} else {
printf "$cpu cp -wibrb 0%6.6o -be %o\n", $base&0177700, $be;
push @cmdlist, sprintf "-wibrb 0%6.6o -be %o", $base&0177700, $be;
}
# (read) [d=data] type commands: rrx,rps,rm,rmi --------------------
# Note: 'rmi' must be matched before 'rm'
} elsif ($cmd =~ /^(rr[0-7]|rps|rmi|rm)/) {
print "$cpu cp -$1 ";
push @cmdlist, "-$1 ";
add_edata($');
print "\n";
# bwm n ------------------------------------------------------------
} elsif ($cmd =~ /^bwm\s+(\d+)/) {
} elsif ($cmd =~ /^bwm\s+(\d+)$/) {
my $nw = $1;
print "$cpu cp -bwm {";
push @cmdlist, "-bwm {";
for (my $i=0; $i<$nw;) {
my $dat = <IFILE>;
$dat =~ s/--.*//;
$dat =~ s/\s*//g;
next if $dat =~ m/^#/;
print " 0$dat";
$cmdlist[-1] .= " 0$dat";
$i++;
}
print "}\n";
$cmdlist[-1] .= "}";
cmdlist_do();
# brm n ------------------------------------------------------------
} elsif ($cmd =~ /^brm\s+(\d+)/) {
} elsif ($cmd =~ /^brm\s+(\d+)$/) {
my $nw = $1;
print "$cpu cp -brm $1";
push @cmdlist, "-brm $1";
my @data;
my @mask;
my $domask;
@@ -153,44 +179,43 @@ while (<IFILE>) {
}
$i++;
}
print " -edata {", join(" ",@data), "} ";
print " {", join(" ",@mask), "} " if $domask;
print "\n";
$cmdlist[-1] .= " -edata {" . join(" ",@data) . "}";
$cmdlist[-1] .= " {" . join(" ",@mask) . "}" if $domask;
cmdlist_do();
# wibr off data ---------------------------------------------------
} elsif ($cmd =~ /^(wibr)\s+([0-7]+)\s+([0-7]+)/) {
print "$cpu cp -$1 0$2 0$3";
print "\n";
} elsif ($cmd =~ /^(wibr)\s+([0-7]+)\s+([0-7]+)$/) {
push @cmdlist, "-$1 0$2 0$3";
# ribr off [d=data] ------------------------------------------------
} elsif ($cmd =~ /^(ribr)\s+([0-7]+)/) {
print "$cpu cp -$1 0$2";
push @cmdlist, "-$1 0$2";
add_edata($');
print "\n";
# simple action commands: sta,sto,cont,step,rst --------------------
} elsif ($cmd =~ /^(sta|sto|cont|step|rst)/) {
} elsif ($cmd =~ /^(sta|sto|cont|step|rst)$/) {
my %cmdmap = (sta => 'start',
sto => 'stop',
cont => 'continue',
step => 'step',
rst => 'reset');
printf "$cpu cp -%s", $cmdmap{$1};
print "\n";
push @cmdlist, sprintf "-%s", $cmdmap{$1};
# wtgo -> wtcpu ----------------------------------------------------
} elsif ($cmd =~ /^(wtgo)/) {
print "$cpu wtcpu 10.";
} elsif ($cmd =~ /^(wtgo)$/) {
cmdlist_do();
print "$cpu wtcpu $tout";
print "\n";
# wtlam apat -------------------------------------------------------
# Note: apat currently ignored !!
} elsif ($cmd =~ /^(wtlam)/) {
print "$cpu wtcpu 10.";
cmdlist_do();
print "$cpu wtcpu $tout";
print "\n";
# currently unimplemented commands ... -----------------------------
} elsif ($cmd =~ /^(\.wait|\.sdef)/) {
} elsif ($cmd =~ /^(\.wait)/) {
print "## TODO... $cmd\n";
} else {
@@ -198,12 +223,35 @@ while (<IFILE>) {
exit 1;
}
cmdlist_do() if scalar(@cmdlist) >= $cmax;
}
cmdlist_do();
exit 0;
#-------------------------------------------------------------------------------
sub add_edata {
my ($crest) = @_;
$crest =~ s/\s+//;
if ($crest =~ m/d=([0-7]+)/) {
print " -edata 0$1";
$cmdlist[-1] .= " -edata 0$1";
}
}
#-------------------------------------------------------------------------------
sub cmdlist_do {
return unless scalar(@cmdlist);
# printf "$cpu cp \\\n";
printf "$cpu cp -estatdef 0x%2.2x 0x%2.2x \\\n", $ref_sdef, $msk_sdef;
while (scalar(@cmdlist)) {
print " ";
print shift @cmdlist;
print " \\\n" if scalar(@cmdlist);
}
print "\n";
@cmdlist = ();
return;
}

13
tools/bin/vbomconv
View File

@@ -1,7 +1,7 @@
#!/usr/bin/perl -w
# $Id: vbomconv 558 2014-06-01 22:20:51Z mueller $
# $Id: vbomconv 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2007-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2007-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -14,6 +14,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-26 575 1.10.1 use XTWI_PATH now (ise/vivado switch done later)
# 2013-10-20 543 1.10 add --viv_vhdl
# 2012-02-05 456 1.9.4 redo filename substitution (= and :); add --get_top
# 2012-01-02 448 1.9.3 use in ghdl_m -fexplicit also when simprim used
@@ -220,8 +221,8 @@ if (exists $opts{ghdl_a} || exists $opts{ghdl_a_cmd}) {
foreach (@file_list) {
my $file = $_;
my $cmd = "ghdl -a";
$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;
$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;
$cmd .= ' -P$XTWI_PATH/ISE_DS/ISE/ghdl/unisim' if $has_unisim;
$cmd .= ' -P$XTWI_PATH/ISE_DS/ISE/ghdl/simprim' if $has_simprim;
$cmd .= " --ieee=synopsys";
$cmd .= " $file";
print "$cmd\n";
@@ -305,8 +306,8 @@ if (exists $opts{ghdl_m} || exists $opts{ghdl_m_cmd} ) {
$cmd .= " -o $stem";
# -fexplicit needed for ISE 13.1,13.3
$cmd .= ' -fexplicit' if $has_unisim or $has_simprim;
$cmd .= ' -P$XILINX/ghdl/unisim' if $has_unisim;
$cmd .= ' -P$XILINX/ghdl/simprim' if $has_simprim;
$cmd .= ' -P$XTWI_PATH/ISE_DS/ISE/ghdl/unisim' if $has_unisim;
$cmd .= ' -P$XTWI_PATH/ISE_DS/ISE/ghdl/simprim' if $has_simprim;
$cmd .= " --ieee=synopsys";
$cmd .= " --no-vital-checks" if $is_ssim or $is_fsim or $is_tsim;

18
tools/dox/make_doxy
View File

@@ -1,8 +1,9 @@
#!/bin/sh
# $Id: make_doxy 523 2013-05-26 21:54:55Z mueller $
# $Id: make_doxy 563 2014-06-22 15:49:09Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2014-06-18 563 1.0.1 BUGFIX: create directories, fix 'to view use' text
# 2013-02-05 482 1.0 Initial version
#
if [ -z "$RETROBASE" ]
@@ -23,10 +24,11 @@ then
exit 1
fi
#
if [ ! -d "$RETRODOXY/w11" ]
then
mkdir $RETRODOXY/w11
fi
if [ ! -d "$RETRODOXY/w11" ]; then mkdir $RETRODOXY/w11; fi
#
if [ ! -d "$RETRODOXY/w11/cpp" ]; then mkdir $RETRODOXY/w11/cpp; fi
if [ ! -d "$RETRODOXY/w11/tcl" ]; then mkdir $RETRODOXY/w11/tcl; fi
if [ ! -d "$RETRODOXY/w11/vhd" ]; then mkdir $RETRODOXY/w11/vhd; fi
#
doxygen w11_cpp.Doxyfile 2>&1 | tee w11_cpp.dox_log
doxygen w11_tcl.Doxyfile 2>&1 | tee w11_tcl.dox_log
@@ -35,6 +37,6 @@ doxygen w11_vhd_all.Doxyfile 2>&1 | tee w11_vhd_all.dox_log
#
echo ""
echo "to view use"
echo " firefox $RETRODOXY/doxy/w11/cpp/html/index.html &"
echo " firefox $RETRODOXY/doxy/w11/tcl/html/index.html &"
echo " firefox $RETRODOXY/doxy/w11/vhd/html/index.html &"
echo " firefox $RETRODOXY/w11/cpp/html/index.html &"
echo " firefox $RETRODOXY/w11/tcl/html/index.html &"
echo " firefox $RETRODOXY/w11/vhd/html/index.html &"

51
tools/dox/w11_cpp.Doxyfile
View File

@@ -1,15 +1,16 @@
# Doxyfile 1.8.3.1
# Doxyfile 1.8.7
#---------------------------------------------------------------------------
# Project related configuration options
#---------------------------------------------------------------------------
DOXYFILE_ENCODING = UTF-8
PROJECT_NAME = w11 - cpp
PROJECT_NUMBER = 0.60
PROJECT_NAME = "w11 - cpp"
PROJECT_NUMBER = 0.61
PROJECT_BRIEF = "Backend server for Rlink and w11"
PROJECT_LOGO =
OUTPUT_DIRECTORY = $(RETRODOXY)/doxy/w11/cpp
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/cpp
CREATE_SUBDIRS = NO
ALLOW_UNICODE_NAMES = NO
OUTPUT_LANGUAGE = English
BRIEF_MEMBER_DESC = YES
REPEAT_BRIEF = YES
@@ -44,7 +45,6 @@ SUBGROUPING = YES
INLINE_GROUPED_CLASSES = NO
INLINE_SIMPLE_STRUCTS = NO
TYPEDEF_HIDES_STRUCT = NO
SYMBOL_CACHE_SIZE = 0
LOOKUP_CACHE_SIZE = 0
#---------------------------------------------------------------------------
# Build related configuration options
@@ -64,6 +64,7 @@ INTERNAL_DOCS = NO
CASE_SENSE_NAMES = YES
HIDE_SCOPE_NAMES = NO
SHOW_INCLUDE_FILES = YES
SHOW_GROUPED_MEMB_INC = NO
FORCE_LOCAL_INCLUDES = NO
INLINE_INFO = YES
SORT_MEMBER_DOCS = NO
@@ -85,7 +86,7 @@ FILE_VERSION_FILTER =
LAYOUT_FILE =
CITE_BIB_FILES =
#---------------------------------------------------------------------------
# configuration options related to warning and progress messages
# Configuration options related to warning and progress messages
#---------------------------------------------------------------------------
QUIET = NO
WARNINGS = YES
@@ -95,7 +96,7 @@ WARN_NO_PARAMDOC = NO
WARN_FORMAT = "$file:$line: $text"
WARN_LOGFILE =
#---------------------------------------------------------------------------
# configuration options related to the input files
# Configuration options related to the input files
#---------------------------------------------------------------------------
INPUT = $(RETROBASE)/tools/src \
$(RETROBASE)/tools/dox/cpp_extra
@@ -121,7 +122,7 @@ FILTER_SOURCE_FILES = NO
FILTER_SOURCE_PATTERNS =
USE_MDFILE_AS_MAINPAGE =
#---------------------------------------------------------------------------
# configuration options related to source browsing
# Configuration options related to source browsing
#---------------------------------------------------------------------------
SOURCE_BROWSER = YES
INLINE_SOURCES = NO
@@ -129,16 +130,17 @@ STRIP_CODE_COMMENTS = YES
REFERENCED_BY_RELATION = YES
REFERENCES_RELATION = YES
REFERENCES_LINK_SOURCE = YES
SOURCE_TOOLTIPS = YES
USE_HTAGS = NO
VERBATIM_HEADERS = YES
#---------------------------------------------------------------------------
# configuration options related to the alphabetical class index
# Configuration options related to the alphabetical class index
#---------------------------------------------------------------------------
ALPHABETICAL_INDEX = YES
COLS_IN_ALPHA_INDEX = 5
IGNORE_PREFIX =
#---------------------------------------------------------------------------
# configuration options related to the HTML output
# Configuration options related to the HTML output
#---------------------------------------------------------------------------
GENERATE_HTML = YES
HTML_OUTPUT = html
@@ -187,6 +189,7 @@ USE_MATHJAX = NO
MATHJAX_FORMAT = HTML-CSS
MATHJAX_RELPATH = http://www.mathjax.org/mathjax/latest
MATHJAX_EXTENSIONS =
MATHJAX_CODEFILE =
SEARCHENGINE = YES
SERVER_BASED_SEARCH = NO
EXTERNAL_SEARCH = NO
@@ -195,7 +198,7 @@ SEARCHDATA_FILE = searchdata.xml
EXTERNAL_SEARCH_ID =
EXTRA_SEARCH_MAPPINGS =
#---------------------------------------------------------------------------
# configuration options related to the LaTeX output
# Configuration options related to the LaTeX output
#---------------------------------------------------------------------------
GENERATE_LATEX = NO
LATEX_OUTPUT = latex
@@ -206,6 +209,7 @@ PAPER_TYPE = a4
EXTRA_PACKAGES =
LATEX_HEADER =
LATEX_FOOTER =
LATEX_EXTRA_FILES =
PDF_HYPERLINKS = YES
USE_PDFLATEX = YES
LATEX_BATCHMODE = NO
@@ -213,7 +217,7 @@ LATEX_HIDE_INDICES = NO
LATEX_SOURCE_CODE = NO
LATEX_BIB_STYLE = plain
#---------------------------------------------------------------------------
# configuration options related to the RTF output
# Configuration options related to the RTF output
#---------------------------------------------------------------------------
GENERATE_RTF = NO
RTF_OUTPUT = rtf
@@ -222,26 +226,30 @@ RTF_HYPERLINKS = NO
RTF_STYLESHEET_FILE =
RTF_EXTENSIONS_FILE =
#---------------------------------------------------------------------------
# configuration options related to the man page output
# Configuration options related to the man page output
#---------------------------------------------------------------------------
GENERATE_MAN = NO
MAN_OUTPUT = man
MAN_EXTENSION = .3
MAN_SUBDIR =
MAN_LINKS = NO
#---------------------------------------------------------------------------
# configuration options related to the XML output
# Configuration options related to the XML output
#---------------------------------------------------------------------------
GENERATE_XML = NO
XML_OUTPUT = xml
XML_SCHEMA =
XML_DTD =
XML_PROGRAMLISTING = YES
#---------------------------------------------------------------------------
# configuration options for the AutoGen Definitions output
# Configuration options related to the DOCBOOK output
#---------------------------------------------------------------------------
GENERATE_DOCBOOK = NO
DOCBOOK_OUTPUT = docbook
#---------------------------------------------------------------------------
# Configuration options for the AutoGen Definitions output
#---------------------------------------------------------------------------
GENERATE_AUTOGEN_DEF = NO
#---------------------------------------------------------------------------
# configuration options related to the Perl module output
# Configuration options related to the Perl module output
#---------------------------------------------------------------------------
GENERATE_PERLMOD = NO
PERLMOD_LATEX = NO
@@ -260,18 +268,20 @@ PREDEFINED =
EXPAND_AS_DEFINED =
SKIP_FUNCTION_MACROS = YES
#---------------------------------------------------------------------------
# Configuration::additions related to external references
# Configuration options related to external references
#---------------------------------------------------------------------------
TAGFILES =
TAGFILES =
GENERATE_TAGFILE = $(RETRODOXY)/w11/cpp/cpp.tag
ALLEXTERNALS = NO
EXTERNAL_GROUPS = YES
EXTERNAL_PAGES = YES
PERL_PATH = /usr/bin/perl
#---------------------------------------------------------------------------
# Configuration options related to the dot tool
#---------------------------------------------------------------------------
CLASS_DIAGRAMS = YES
MSCGEN_PATH =
DIA_PATH =
HIDE_UNDOC_RELATIONS = YES
HAVE_DOT = YES
DOT_NUM_THREADS = 0
@@ -295,6 +305,7 @@ INTERACTIVE_SVG = YES
DOT_PATH =
DOTFILE_DIRS =
MSCFILE_DIRS =
DIAFILE_DIRS =
DOT_GRAPH_MAX_NODES = 50
MAX_DOT_GRAPH_DEPTH = 0
DOT_TRANSPARENT = NO

53
tools/dox/w11_tcl.Doxyfile
View File

@@ -1,15 +1,16 @@
# Doxyfile 1.8.3.1
# Doxyfile 1.8.7
#---------------------------------------------------------------------------
# Project related configuration options
#---------------------------------------------------------------------------
DOXYFILE_ENCODING = UTF-8
PROJECT_NAME = w11 - tcl
PROJECT_NUMBER = 0.60
PROJECT_NAME = "w11 - tcl"
PROJECT_NUMBER = 0.61
PROJECT_BRIEF = "Backend server for Rlink and w11"
PROJECT_LOGO =
OUTPUT_DIRECTORY = $(RETRODOXY)/doxy/w11/tcl
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/tcl
CREATE_SUBDIRS = NO
ALLOW_UNICODE_NAMES = NO
OUTPUT_LANGUAGE = English
BRIEF_MEMBER_DESC = YES
REPEAT_BRIEF = YES
@@ -32,7 +33,7 @@ OPTIMIZE_OUTPUT_FOR_C = NO
OPTIMIZE_OUTPUT_JAVA = NO
OPTIMIZE_FOR_FORTRAN = NO
OPTIMIZE_OUTPUT_VHDL = NO
EXTENSION_MAPPING =
EXTENSION_MAPPING =
MARKDOWN_SUPPORT = YES
AUTOLINK_SUPPORT = YES
BUILTIN_STL_SUPPORT = YES
@@ -44,7 +45,6 @@ SUBGROUPING = YES
INLINE_GROUPED_CLASSES = NO
INLINE_SIMPLE_STRUCTS = NO
TYPEDEF_HIDES_STRUCT = NO
SYMBOL_CACHE_SIZE = 0
LOOKUP_CACHE_SIZE = 0
#---------------------------------------------------------------------------
# Build related configuration options
@@ -64,6 +64,7 @@ INTERNAL_DOCS = NO
CASE_SENSE_NAMES = YES
HIDE_SCOPE_NAMES = NO
SHOW_INCLUDE_FILES = YES
SHOW_GROUPED_MEMB_INC = NO
FORCE_LOCAL_INCLUDES = NO
INLINE_INFO = YES
SORT_MEMBER_DOCS = NO
@@ -85,7 +86,7 @@ FILE_VERSION_FILTER =
LAYOUT_FILE =
CITE_BIB_FILES =
#---------------------------------------------------------------------------
# configuration options related to warning and progress messages
# Configuration options related to warning and progress messages
#---------------------------------------------------------------------------
QUIET = NO
WARNINGS = YES
@@ -95,14 +96,14 @@ WARN_NO_PARAMDOC = NO
WARN_FORMAT = "$file:$line: $text"
WARN_LOGFILE =
#---------------------------------------------------------------------------
# configuration options related to the input files
# Configuration options related to the input files
#---------------------------------------------------------------------------
INPUT = $(RETROBASE)/tools/tcl
INPUT_ENCODING = UTF-8
FILE_PATTERNS = *.tcl \
*.dox
RECURSIVE = YES
EXCLUDE =
EXCLUDE =
EXCLUDE_SYMLINKS = NO
EXCLUDE_PATTERNS = */.svn* \
*/tests/* \
@@ -118,7 +119,7 @@ FILTER_SOURCE_FILES = NO
FILTER_SOURCE_PATTERNS =
USE_MDFILE_AS_MAINPAGE =
#---------------------------------------------------------------------------
# configuration options related to source browsing
# Configuration options related to source browsing
#---------------------------------------------------------------------------
SOURCE_BROWSER = YES
INLINE_SOURCES = NO
@@ -126,16 +127,17 @@ STRIP_CODE_COMMENTS = YES
REFERENCED_BY_RELATION = YES
REFERENCES_RELATION = YES
REFERENCES_LINK_SOURCE = YES
SOURCE_TOOLTIPS = YES
USE_HTAGS = NO
VERBATIM_HEADERS = YES
#---------------------------------------------------------------------------
# configuration options related to the alphabetical class index
# Configuration options related to the alphabetical class index
#---------------------------------------------------------------------------
ALPHABETICAL_INDEX = YES
COLS_IN_ALPHA_INDEX = 5
IGNORE_PREFIX =
#---------------------------------------------------------------------------
# configuration options related to the HTML output
# Configuration options related to the HTML output
#---------------------------------------------------------------------------
GENERATE_HTML = YES
HTML_OUTPUT = html
@@ -184,6 +186,7 @@ USE_MATHJAX = NO
MATHJAX_FORMAT = HTML-CSS
MATHJAX_RELPATH = http://www.mathjax.org/mathjax/latest
MATHJAX_EXTENSIONS =
MATHJAX_CODEFILE =
SEARCHENGINE = YES
SERVER_BASED_SEARCH = NO
EXTERNAL_SEARCH = NO
@@ -192,7 +195,7 @@ SEARCHDATA_FILE = searchdata.xml
EXTERNAL_SEARCH_ID =
EXTRA_SEARCH_MAPPINGS =
#---------------------------------------------------------------------------
# configuration options related to the LaTeX output
# Configuration options related to the LaTeX output
#---------------------------------------------------------------------------
GENERATE_LATEX = NO
LATEX_OUTPUT = latex
@@ -203,6 +206,7 @@ PAPER_TYPE = a4
EXTRA_PACKAGES =
LATEX_HEADER =
LATEX_FOOTER =
LATEX_EXTRA_FILES =
PDF_HYPERLINKS = YES
USE_PDFLATEX = YES
LATEX_BATCHMODE = NO
@@ -210,7 +214,7 @@ LATEX_HIDE_INDICES = NO
LATEX_SOURCE_CODE = NO
LATEX_BIB_STYLE = plain
#---------------------------------------------------------------------------
# configuration options related to the RTF output
# Configuration options related to the RTF output
#---------------------------------------------------------------------------
GENERATE_RTF = NO
RTF_OUTPUT = rtf
@@ -219,26 +223,30 @@ RTF_HYPERLINKS = NO
RTF_STYLESHEET_FILE =
RTF_EXTENSIONS_FILE =
#---------------------------------------------------------------------------
# configuration options related to the man page output
# Configuration options related to the man page output
#---------------------------------------------------------------------------
GENERATE_MAN = NO
MAN_OUTPUT = man
MAN_EXTENSION = .3
MAN_SUBDIR =
MAN_LINKS = NO
#---------------------------------------------------------------------------
# configuration options related to the XML output
# Configuration options related to the XML output
#---------------------------------------------------------------------------
GENERATE_XML = NO
XML_OUTPUT = xml
XML_SCHEMA =
XML_DTD =
XML_PROGRAMLISTING = YES
#---------------------------------------------------------------------------
# configuration options for the AutoGen Definitions output
# Configuration options related to the DOCBOOK output
#---------------------------------------------------------------------------
GENERATE_DOCBOOK = NO
DOCBOOK_OUTPUT = docbook
#---------------------------------------------------------------------------
# Configuration options for the AutoGen Definitions output
#---------------------------------------------------------------------------
GENERATE_AUTOGEN_DEF = NO
#---------------------------------------------------------------------------
# configuration options related to the Perl module output
# Configuration options related to the Perl module output
#---------------------------------------------------------------------------
GENERATE_PERLMOD = NO
PERLMOD_LATEX = NO
@@ -257,18 +265,20 @@ PREDEFINED =
EXPAND_AS_DEFINED =
SKIP_FUNCTION_MACROS = YES
#---------------------------------------------------------------------------
# Configuration::additions related to external references
# Configuration options related to external references
#---------------------------------------------------------------------------
TAGFILES =
GENERATE_TAGFILE = $(RETRODOXY)/w11/tcl/tcl.tag
ALLEXTERNALS = NO
EXTERNAL_GROUPS = YES
EXTERNAL_PAGES = YES
PERL_PATH = /usr/bin/perl
#---------------------------------------------------------------------------
# Configuration options related to the dot tool
#---------------------------------------------------------------------------
CLASS_DIAGRAMS = YES
MSCGEN_PATH =
DIA_PATH =
HIDE_UNDOC_RELATIONS = YES
HAVE_DOT = YES
DOT_NUM_THREADS = 0
@@ -292,6 +302,7 @@ INTERACTIVE_SVG = YES
DOT_PATH =
DOTFILE_DIRS =
MSCFILE_DIRS =
DIAFILE_DIRS =
DOT_GRAPH_MAX_NODES = 50
MAX_DOT_GRAPH_DEPTH = 0
DOT_TRANSPARENT = NO

51
tools/dox/w11_vhd_all.Doxyfile
View File

@@ -1,15 +1,16 @@
# Doxyfile 1.8.3.1
# Doxyfile 1.8.7
#---------------------------------------------------------------------------
# Project related configuration options
#---------------------------------------------------------------------------
DOXYFILE_ENCODING = UTF-8
PROJECT_NAME = w11 - vhd
PROJECT_NUMBER = 0.60
PROJECT_NAME = "w11 - vhd"
PROJECT_NUMBER = 0.61
PROJECT_BRIEF = "W11 CPU core and support modules"
PROJECT_LOGO =
OUTPUT_DIRECTORY = $(RETRODOXY)/doxy/w11/vhd
OUTPUT_DIRECTORY = $(RETRODOXY)/w11/vhd
CREATE_SUBDIRS = NO
ALLOW_UNICODE_NAMES = NO
OUTPUT_LANGUAGE = English
BRIEF_MEMBER_DESC = YES
REPEAT_BRIEF = YES
@@ -32,7 +33,7 @@ OPTIMIZE_OUTPUT_FOR_C = NO
OPTIMIZE_OUTPUT_JAVA = NO
OPTIMIZE_FOR_FORTRAN = NO
OPTIMIZE_OUTPUT_VHDL = YES
EXTENSION_MAPPING =
EXTENSION_MAPPING =
MARKDOWN_SUPPORT = YES
AUTOLINK_SUPPORT = YES
BUILTIN_STL_SUPPORT = YES
@@ -44,7 +45,6 @@ SUBGROUPING = YES
INLINE_GROUPED_CLASSES = NO
INLINE_SIMPLE_STRUCTS = NO
TYPEDEF_HIDES_STRUCT = NO
SYMBOL_CACHE_SIZE = 0
LOOKUP_CACHE_SIZE = 0
#---------------------------------------------------------------------------
# Build related configuration options
@@ -64,6 +64,7 @@ INTERNAL_DOCS = NO
CASE_SENSE_NAMES = YES
HIDE_SCOPE_NAMES = YES
SHOW_INCLUDE_FILES = YES
SHOW_GROUPED_MEMB_INC = NO
FORCE_LOCAL_INCLUDES = NO
INLINE_INFO = YES
SORT_MEMBER_DOCS = NO
@@ -85,7 +86,7 @@ FILE_VERSION_FILTER =
LAYOUT_FILE =
CITE_BIB_FILES =
#---------------------------------------------------------------------------
# configuration options related to warning and progress messages
# Configuration options related to warning and progress messages
#---------------------------------------------------------------------------
QUIET = NO
WARNINGS = YES
@@ -95,7 +96,7 @@ WARN_NO_PARAMDOC = NO
WARN_FORMAT = "$file:$line: $text"
WARN_LOGFILE =
#---------------------------------------------------------------------------
# configuration options related to the input files
# Configuration options related to the input files
#---------------------------------------------------------------------------
INPUT = $(RETROBASE)/rtl
INPUT_ENCODING = UTF-8
@@ -120,7 +121,7 @@ FILTER_SOURCE_FILES = NO
FILTER_SOURCE_PATTERNS =
USE_MDFILE_AS_MAINPAGE =
#---------------------------------------------------------------------------
# configuration options related to source browsing
# Configuration options related to source browsing
#---------------------------------------------------------------------------
SOURCE_BROWSER = YES
INLINE_SOURCES = NO
@@ -128,16 +129,17 @@ STRIP_CODE_COMMENTS = YES
REFERENCED_BY_RELATION = YES
REFERENCES_RELATION = YES
REFERENCES_LINK_SOURCE = YES
SOURCE_TOOLTIPS = YES
USE_HTAGS = NO
VERBATIM_HEADERS = YES
#---------------------------------------------------------------------------
# configuration options related to the alphabetical class index
# Configuration options related to the alphabetical class index
#---------------------------------------------------------------------------
ALPHABETICAL_INDEX = YES
COLS_IN_ALPHA_INDEX = 5
IGNORE_PREFIX =
#---------------------------------------------------------------------------
# configuration options related to the HTML output
# Configuration options related to the HTML output
#---------------------------------------------------------------------------
GENERATE_HTML = YES
HTML_OUTPUT = html
@@ -186,6 +188,7 @@ USE_MATHJAX = NO
MATHJAX_FORMAT = HTML-CSS
MATHJAX_RELPATH = http://www.mathjax.org/mathjax/latest
MATHJAX_EXTENSIONS =
MATHJAX_CODEFILE =
SEARCHENGINE = YES
SERVER_BASED_SEARCH = NO
EXTERNAL_SEARCH = NO
@@ -194,7 +197,7 @@ SEARCHDATA_FILE = searchdata.xml
EXTERNAL_SEARCH_ID =
EXTRA_SEARCH_MAPPINGS =
#---------------------------------------------------------------------------
# configuration options related to the LaTeX output
# Configuration options related to the LaTeX output
#---------------------------------------------------------------------------
GENERATE_LATEX = NO
LATEX_OUTPUT = latex
@@ -205,6 +208,7 @@ PAPER_TYPE = a4
EXTRA_PACKAGES =
LATEX_HEADER =
LATEX_FOOTER =
LATEX_EXTRA_FILES =
PDF_HYPERLINKS = YES
USE_PDFLATEX = YES
LATEX_BATCHMODE = NO
@@ -212,7 +216,7 @@ LATEX_HIDE_INDICES = NO
LATEX_SOURCE_CODE = NO
LATEX_BIB_STYLE = plain
#---------------------------------------------------------------------------
# configuration options related to the RTF output
# Configuration options related to the RTF output
#---------------------------------------------------------------------------
GENERATE_RTF = NO
RTF_OUTPUT = rtf
@@ -221,26 +225,30 @@ RTF_HYPERLINKS = NO
RTF_STYLESHEET_FILE =
RTF_EXTENSIONS_FILE =
#---------------------------------------------------------------------------
# configuration options related to the man page output
# Configuration options related to the man page output
#---------------------------------------------------------------------------
GENERATE_MAN = NO
MAN_OUTPUT = man
MAN_EXTENSION = .3
MAN_SUBDIR =
MAN_LINKS = NO
#---------------------------------------------------------------------------
# configuration options related to the XML output
# Configuration options related to the XML output
#---------------------------------------------------------------------------
GENERATE_XML = NO
XML_OUTPUT = xml
XML_SCHEMA =
XML_DTD =
XML_PROGRAMLISTING = YES
#---------------------------------------------------------------------------
# configuration options for the AutoGen Definitions output
# Configuration options related to the DOCBOOK output
#---------------------------------------------------------------------------
GENERATE_DOCBOOK = NO
DOCBOOK_OUTPUT = docbook
#---------------------------------------------------------------------------
# Configuration options for the AutoGen Definitions output
#---------------------------------------------------------------------------
GENERATE_AUTOGEN_DEF = NO
#---------------------------------------------------------------------------
# configuration options related to the Perl module output
# Configuration options related to the Perl module output
#---------------------------------------------------------------------------
GENERATE_PERLMOD = NO
PERLMOD_LATEX = NO
@@ -259,18 +267,20 @@ PREDEFINED =
EXPAND_AS_DEFINED =
SKIP_FUNCTION_MACROS = YES
#---------------------------------------------------------------------------
# Configuration::additions related to external references
# Configuration options related to external references
#---------------------------------------------------------------------------
TAGFILES =
GENERATE_TAGFILE = $(RETRODOXY)/w11/vhd/vhd.tag
ALLEXTERNALS = NO
EXTERNAL_GROUPS = YES
EXTERNAL_PAGES = YES
PERL_PATH = /usr/bin/perl
#---------------------------------------------------------------------------
# Configuration options related to the dot tool
#---------------------------------------------------------------------------
CLASS_DIAGRAMS = YES
MSCGEN_PATH =
DIA_PATH =
HIDE_UNDOC_RELATIONS = YES
HAVE_DOT = YES
DOT_NUM_THREADS = 0
@@ -294,6 +304,7 @@ INTERACTIVE_SVG = YES
DOT_PATH =
DOTFILE_DIRS =
MSCFILE_DIRS =
DIAFILE_DIRS =
DOT_GRAPH_MAX_NODES = 50
MAX_DOT_GRAPH_DEPTH = 0
DOT_TRANSPARENT = NO

6
tools/make/generic_cpp.mk
View File

@@ -1,4 +1,4 @@
# $Id: generic_cpp.mk 434 2011-12-02 19:17:38Z mueller $
# $Id: generic_cpp.mk 576 2014-08-02 12:24:28Z mueller $
#
# Revision History:
# Date Rev Version Comment
@@ -14,8 +14,6 @@
# -fPIC position independent code
# -Wall all warnings
#
# -g request debugging info
#
ifdef CCCOMMAND
CC = $(CCCOMMAND)
endif
@@ -32,8 +30,6 @@ CFLAGS = -Wall -fPIC $(CCOPTFLAGS) $(INCLFLAGS)
# -fPIC position independent code
# -Wall all warnings
#
# -g request debugging info
#
ifdef CXXCOMMAND
CXX = $(CXXCOMMAND)
endif

21
tools/src/librlink/RlinkCommandList.cpp
View File

@@ -1,6 +1,6 @@
// $Id: RlinkCommandList.cpp 495 2013-03-06 17:13:48Z mueller $
// $Id: RlinkCommandList.cpp 576 2014-08-02 12:24:28Z mueller $
//
// Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-08-02 576 1.1 rename LastExpect->SetLastExpect
// 2013-05-06 495 1.0.3 add RlinkContext to Print() args
// 2013-02-03 481 1.0.2 use Rexception
// 2011-04-25 380 1.0.1 use boost/foreach
@@ -22,7 +23,7 @@
/*!
\file
\version $Id: RlinkCommandList.cpp 495 2013-03-06 17:13:48Z mueller $
\version $Id: RlinkCommandList.cpp 576 2014-08-02 12:24:28Z mueller $
\brief Implemenation of class RlinkCommandList.
*/
@@ -199,22 +200,24 @@ size_t RlinkCommandList::AddInit(uint16_t addr, uint16_t data)
void RlinkCommandList::LastVolatile()
{
if (fList.size() == 0)
size_t ncmd = fList.size();
if (ncmd == 0)
throw Rexception("RlinkCommandList::LastVolatile()",
"Bad state: list empty");
fList[fList.size()-1]->SetFlagBit(RlinkCommand::kFlagVol);
fList[ncmd-1]->SetFlagBit(RlinkCommand::kFlagVol);
return;
}
//------------------------------------------+-----------------------------------
//! FIXME_docs
void RlinkCommandList::LastExpect(RlinkCommandExpect* exp)
void RlinkCommandList::SetLastExpect(RlinkCommandExpect* pexp)
{
if (fList.size() == 0)
throw Rexception("RlinkCommandList::LastExpect()",
size_t ncmd = fList.size();
if (ncmd == 0)
throw Rexception("RlinkCommandList::SetLastExpect()",
"Bad state: list empty");
fList[fList.size()-1]->SetExpect(exp);
fList[ncmd-1]->SetExpect(pexp);
return;
}

11
tools/src/librlink/RlinkCommandList.hpp
View File

@@ -1,6 +1,6 @@
// $Id: RlinkCommandList.hpp 495 2013-03-06 17:13:48Z mueller $
// $Id: RlinkCommandList.hpp 576 2014-08-02 12:24:28Z mueller $
//
// Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-08-02 576 1.1 rename LastExpect->SetLastExpect
// 2013-05-06 495 1.0.1 add RlinkContext to Print() args; drop oper<<()
// 2011-03-05 366 1.0 Initial version
// 2011-01-09 354 0.1 First draft
@@ -21,7 +22,7 @@
/*!
\file
\version $Id: RlinkCommandList.hpp 495 2013-03-06 17:13:48Z mueller $
\version $Id: RlinkCommandList.hpp 576 2014-08-02 12:24:28Z mueller $
\brief Declaration of class RlinkCommandList.
*/
@@ -60,8 +61,8 @@ namespace Retro {
size_t AddAttn();
size_t AddInit(uint16_t addr, uint16_t data);
void LastVolatile();
void LastExpect(RlinkCommandExpect* exp);
void LastVolatile(); // deprecated !!
void SetLastExpect(RlinkCommandExpect* exp);
void Clear();
size_t Size() const;

9
tools/src/librlink/RlinkConnect.cpp
View File

@@ -1,6 +1,6 @@
// $Id: RlinkConnect.cpp 521 2013-05-20 22:16:45Z mueller $
// $Id: RlinkConnect.cpp 575 2014-07-27 20:55:41Z mueller $
//
// Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-07-27 575 1.3.3 ExecPart(): increase packet tout from 5 to 15 sec
// 2013-04-21 509 1.3.2 add SndAttn() method
// 2013-03-01 493 1.3.1 add Server(Active..|SignalAttn)() methods
// 2013-02-23 492 1.3 use scoped_ptr for Port; Close allways allowed
@@ -28,7 +29,7 @@
/*!
\file
\version $Id: RlinkConnect.cpp 521 2013-05-20 22:16:45Z mueller $
\version $Id: RlinkConnect.cpp 575 2014-07-27 20:55:41Z mueller $
\brief Implemenation of RlinkConnect.
*/
@@ -401,7 +402,7 @@ bool RlinkConnect::ExecPart(RlinkCommandList& clist, size_t ibeg, size_t iend,
fRxPkt.Init();
// FIXME_code: parametrize timeout
if (!fRxPkt.RcvPacket(fpPort.get(), nrcvtot, 5.0, emsg)) return false;
if (!fRxPkt.RcvPacket(fpPort.get(), nrcvtot, 15.0, emsg)) return false;
// FIXME_code: handle timeout properly
if (fRxPkt.TestFlag(RlinkPacketBuf::kFlagTout)) {

24
tools/src/librlinktpp/RtclRlinkConnect.cpp
View File

@@ -1,6 +1,6 @@
// $Id: RtclRlinkConnect.cpp 521 2013-05-20 22:16:45Z mueller $
// $Id: RtclRlinkConnect.cpp 576 2014-08-02 12:24:28Z mueller $
//
// Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-08-02 576 1.1.7 bugfix: redo estatdef logic; avoid LastExpect()
// 2013-02-23 492 1.1.6 use RlogFile.Name(); use Context().ErrorCount()
// 2013-02-22 491 1.1.5 use new RlogFile/RlogMsg interfaces
// 2013-02-02 480 1.1.4 allow empty exec commands
@@ -27,7 +28,7 @@
/*!
\file
\version $Id: RtclRlinkConnect.cpp 521 2013-05-20 22:16:45Z mueller $
\version $Id: RtclRlinkConnect.cpp 576 2014-08-02 12:24:28Z mueller $
\brief Implemenation of class RtclRlinkConnect.
*/
@@ -197,7 +198,8 @@ int RtclRlinkConnect::M_exec(RtclArgs& args)
} else if (opt == "-edata") { // -edata data ?mask --------------
if (!ClistNonEmpty(args, clist)) return kERR;
if (clist[lsize-1].Expect()==0) {
clist.LastExpect(new RlinkCommandExpect());
clist[lsize-1].SetExpect(new RlinkCommandExpect(estatdef_val,
estatdef_msk));
}
if (clist[lsize-1].Command() == RlinkCommand::kCmdRblk) {
vector<uint16_t> data;
@@ -222,7 +224,7 @@ int RtclRlinkConnect::M_exec(RtclArgs& args)
if (!args.GetArg("??mask", mask)) return kERR;
if (args.NOptMiss() == 2) mask = 0xff;
if (clist[lsize-1].Expect()==0) {
clist.LastExpect(new RlinkCommandExpect());
clist[lsize-1].SetExpect(new RlinkCommandExpect());
}
clist[lsize-1].Expect()->SetStatus(stat, mask);
@@ -250,14 +252,16 @@ int RtclRlinkConnect::M_exec(RtclArgs& args)
if (!args.GetArg("??varRes", varlist)) return kERR;
}
if (lsize != clist.Size()) { // cmd added to clist (ind=lsize!)
if (estatdef_msk != 0xff) { // estatdef defined
if (clist[lsize].Expect()==0) {
clist.LastExpect(new RlinkCommandExpect());
if (estatdef_msk != 0xff && // estatdef defined
lsize != clist.Size()) { // and cmd added to clist
for (size_t i=lsize; i<clist.Size(); i++) { // loop over new cmds
if (clist[i].Expect()==0) { // if no stat
clist[i].SetExpect(new RlinkCommandExpect(estatdef_val,
estatdef_msk));
}
clist[lsize].Expect()->SetStatus(estatdef_val, estatdef_msk);
}
}
}
int nact = 0;

8
tools/src/librutiltpp/RtclSignalAction.cpp
View File

@@ -1,6 +1,6 @@
// $Id: RtclSignalAction.cpp 521 2013-05-20 22:16:45Z mueller $
// $Id: RtclSignalAction.cpp 577 2014-08-03 20:49:42Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,18 +13,20 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-08-02 577 1.0.1 add include unistd.h (write+pipe dcl)
// 2013-05-17 521 1.0 Initial version
// ---------------------------------------------------------------------------
/*!
\file
\version $Id: RtclSignalAction.cpp 521 2013-05-20 22:16:45Z mueller $
\version $Id: RtclSignalAction.cpp 577 2014-08-03 20:49:42Z mueller $
\brief Implemenation of class RtclSignalAction.
*/
#include <errno.h>
#include <signal.h>
#include <string.h>
#include <unistd.h>
#include <iostream>

4
tools/src/librw11/Makefile
View File

@@ -1,4 +1,4 @@
# $Id: Makefile 529 2013-08-02 17:15:43Z mueller $
# $Id: Makefile 561 2014-06-09 17:22:50Z mueller $
#
# Revision History:
# Date Rev Version Comment
@@ -28,9 +28,9 @@ OBJ_all += Rw11UnitTerm.o
OBJ_all += Rw11UnitDisk.o
OBJ_all += Rw11UnitStream.o
OBJ_all += Rw11CntlDL11.o Rw11UnitDL11.o
OBJ_all += Rw11CntlRK11.o Rw11UnitRK11.o
OBJ_all += Rw11CntlLP11.o Rw11UnitLP11.o
OBJ_all += Rw11CntlPC11.o Rw11UnitPC11.o
OBJ_all += Rw11CntlRK11.o Rw11UnitRK11.o
OBJ_all += Rw11Virt.o
OBJ_all += Rw11VirtTerm.o Rw11VirtTermPty.o Rw11VirtTermTcp.o
OBJ_all += Rw11VirtDisk.o Rw11VirtDiskFile.o

42
tools/src/librw11/Rw11CntlRK11.cpp
View File

@@ -1,8 +1,8 @@
// $Id: Rw11CntlRK11.cpp 515 2013-05-04 17:28:59Z mueller $
// $Id: Rw11CntlRK11.cpp 562 2014-06-15 17:23:18Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Other credits:
// the boot code from the simh project and Copyright Robert M Supnik
// the boot code is from the simh project and Copyright Robert M Supnik
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -15,13 +15,14 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-06-14 562 1.0.1 Add stats
// 2013-04-20 508 1.0 Initial version
// 2013-02-10 485 0.1 First draft
// ---------------------------------------------------------------------------
/*!
\file
\version $Id: Rw11CntlRK11.cpp 515 2013-05-04 17:28:59Z mueller $
\version $Id: Rw11CntlRK11.cpp 562 2014-06-15 17:23:18Z mueller $
\brief Implemenation of Rw11CntlRK11.
*/
@@ -148,6 +149,19 @@ Rw11CntlRK11::Rw11CntlRK11()
for (size_t i=0; i<NUnit(); i++) {
fspUnit[i].reset(new Rw11UnitRK11(this, i));
}
fStats.Define(kStatNFuncCreset , "NFuncCreset" , "func CRESET");
fStats.Define(kStatNFuncWrite , "NFuncWrite" , "func WRITE");
fStats.Define(kStatNFuncRead , "NFuncRead" , "func READ");
fStats.Define(kStatNFuncWchk , "NFuncWchk" , "func WCHK");
fStats.Define(kStatNFuncSeek , "NFuncSeek" , "func SEEK");
fStats.Define(kStatNFuncRchk , "NFuncRchk" , "func RCHK");
fStats.Define(kStatNFuncDreset , "NFuncDreset" , "func DRESET");
fStats.Define(kStatNFuncWlock , "NFuncWlock " , "func WLOCK");
fStats.Define(kStatNRdmaWrite , "NRdmaWrite" , "rdma WRITE");
fStats.Define(kStatNRdmaRead , "NRdmaRead" , "rdma READ");
fStats.Define(kStatNRdmaWchk , "NRdmaWchk" , "rdma WCHK");
fStats.Define(kStatNRdmaRchk , "NRdmaRchk" , "rdma RCHK");
}
//------------------------------------------+-----------------------------------
@@ -171,7 +185,7 @@ void Rw11CntlRK11::Config(const std::string& name, uint16_t base, int lam)
void Rw11CntlRK11::Start()
{
if (fStarted || fLam<0 || !fEnable || !fProbe.Found())
throw Rexception("Rw11CntlDL11::Start",
throw Rexception("Rw11CntlRK11::Start",
"Bad state: started, no lam, not enable, not found");
// setup primary info clist
@@ -224,7 +238,7 @@ bool Rw11CntlRK11::BootCode(size_t unit, std::vector<uint16_t>& code,
uint16_t& aload, uint16_t& astart)
{
uint16_t kBOOT_START = 02000;
uint16_t bootcode[] = { // rk05 boot loader - from simh pdp11_rk.c
uint16_t bootcode[] = { // rk11 boot loader - from simh pdp11_rk.c (v3.9)
0042113, // "KD"
0012706, kBOOT_START, // MOV #boot_start, SP
0012700, uint16_t(unit), // MOV #unit, R0 ; unit number
@@ -242,7 +256,7 @@ bool Rw11CntlRK11::BootCode(size_t unit, std::vector<uint16_t>& code,
0012741, 0000005, // MOV #READ+GO, -(R1) ; read & go
0005002, // CLR R2
0005003, // CLR R3
0012704, uint16_t(kBOOT_START+020), // MOV #START+20, R4
0012704, uint16_t(kBOOT_START+020), // MOV #START+20, R4 ; ?? unclear ??
0005005, // CLR R5
0105711, // TSTB (R1)
0100376, // BPL .-4
@@ -376,11 +390,13 @@ int Rw11CntlRK11::AttnHandler(const RlinkServer::AttnArgs& args)
// now handle the functions
if (fu == kRKCS_CRESET) { // Control reset -----------------
fStats.Inc(kStatNFuncCreset);
cpu.AddWibr(clist, fBase+kRKMR, kRKMR_M_CRESET);
fRd_busy = false;
} else if (fu == kRKCS_WRITE) { // Write -------------------------
// Note: WRITE+FMT is just WRITE
fStats.Inc(kStatNFuncWrite);
if (se >= unit.NSector()) rker |= kRKER_M_NXS;
if (cy >= unit.NCylinder()) rker |= kRKER_M_NXC;
if (unit.WProt()) rker |= kRKER_M_WLO;
@@ -388,18 +404,21 @@ int Rw11CntlRK11::AttnHandler(const RlinkServer::AttnArgs& args)
queue = true;
} else if (fu == kRKCS_READ) { // Read --------------------------
fStats.Inc(kStatNFuncRead);
if (se >= unit.NSector()) rker |= kRKER_M_NXS;
if (cy >= unit.NCylinder()) rker |= kRKER_M_NXC;
if (rkcs & kRKCS_M_IBA) rker |= kRKER_M_DRE; // not yet supported FIXME
queue = true;
} else if (fu == kRKCS_WCHK) { // Write Check -------------------
fStats.Inc(kStatNFuncWchk);
if (se >= unit.NSector()) rker |= kRKER_M_NXS;
if (cy >= unit.NCylinder()) rker |= kRKER_M_NXC;
if (rkcs & kRKCS_M_IBA) rker |= kRKER_M_DRE; // not yet supported FIXME
queue = true;
} else if (fu == kRKCS_SEEK) { // Seek --------------------------
fStats.Inc(kStatNFuncSeek);
if (se >= unit.NSector()) rker |= kRKER_M_NXS;
if (cy >= unit.NCylinder()) rker |= kRKER_M_NXC;
if (rker) {
@@ -417,16 +436,19 @@ int Rw11CntlRK11::AttnHandler(const RlinkServer::AttnArgs& args)
}
} else if (fu == kRKCS_RCHK) { // Read Check --------------------
fStats.Inc(kStatNFuncRchk);
if (se >= unit.NSector()) rker |= kRKER_M_NXS;
if (cy >= unit.NCylinder()) rker |= kRKER_M_NXC;
if (rkcs & kRKCS_M_IBA) rker |= kRKER_M_DRE; // not yet supported FIXME
queue = true;
} else if (fu == kRKCS_DRESET) { // Drive Reset -------------------
fStats.Inc(kStatNFuncDreset);
cpu.AddWibr(clist, fBase+kRKMR, kRKMR_M_FDONE);
cpu.AddWibr(clist, fBase+kRKMR, 1u<<dr); // issue seek done
} else if (fu == kRKCS_WLOCK) { // Write Lock --------------------
fStats.Inc(kStatNFuncWlock);
rkds |= kRKDS_M_WPS; // set RKDS write protect flag
unit.SetRkds(rkds);
unit.SetWProt(true);
@@ -472,6 +494,7 @@ int Rw11CntlRK11::RdmaHandler()
if (fu == kRKCS_WRITE) { // Write -------------------------
// Note: WRITE+FMT is like WRITE
fStats.Inc(kStatNRdmaWrite);
RlinkCommandList clist;
size_t bsize = (fRd_nwrd>256) ? 256 : fRd_nwrd;
cpu.AddRMem(clist, fRd_addr, (uint16_t*) buf, bsize,
@@ -494,6 +517,7 @@ int Rw11CntlRK11::RdmaHandler()
return 1; // requeue
} else if (fu == kRKCS_READ) {
fStats.Inc(kStatNRdmaRead);
if ((fRd_rkcs&kRKCS_M_FMT) == 0) { // Read --------------------------
RerrMsg emsg;
bool rc = unit.VirtRead(fRd_lba, 1, buf, emsg);
@@ -533,6 +557,7 @@ int Rw11CntlRK11::RdmaHandler()
}
} else if (fu == kRKCS_WCHK) { // Write Check -------------------
fStats.Inc(kStatNRdmaWchk);
uint16_t bufmem[256];
RlinkCommandList clist;
size_t bsize = (fRd_nwrd>256) ? 256 : fRd_nwrd;
@@ -565,6 +590,7 @@ int Rw11CntlRK11::RdmaHandler()
} else if (fu == kRKCS_RCHK) { // Read Check --------------------
// Note: no DMA transfer done; done here to keep logic similar to read
fStats.Inc(kStatNRdmaRchk);
size_t bsize = (fRd_nwrd>256) ? 256 : fRd_nwrd;
fRd_nwrd -= bsize;
fRd_addr += 2*bsize;
@@ -573,7 +599,7 @@ int Rw11CntlRK11::RdmaHandler()
return 1; // requeue
} else {
throw Rexception("Rw11CntlDL11::RdmaHandler",
throw Rexception("Rw11CntlRK11::RdmaHandler",
"Bad state: bad function code");
}

24
tools/src/librw11/Rw11CntlRK11.hpp
View File

@@ -1,6 +1,6 @@
// $Id: Rw11CntlRK11.hpp 509 2013-04-21 20:46:20Z mueller $
// $Id: Rw11CntlRK11.hpp 562 2014-06-15 17:23:18Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-06-14 562 1.0.1 Add stats definitions
// 2013-04-20 508 1.0 Initial version
// 2013-02-10 485 0.1 First draft
// ---------------------------------------------------------------------------
@@ -20,7 +21,7 @@
/*!
\file
\version $Id: Rw11CntlRK11.hpp 509 2013-04-21 20:46:20Z mueller $
\version $Id: Rw11CntlRK11.hpp 562 2014-06-15 17:23:18Z mueller $
\brief Declaration of class Rw11CntlRK11.
*/
@@ -126,6 +127,23 @@ namespace Retro {
static const uint16_t kRKMR_M_CRESET= kWBit09;
static const uint16_t kRKMR_M_FDONE = kWBit08;
// statistics counter indices
enum stats {
kStatNFuncCreset = Rw11Cntl::kDimStat,
kStatNFuncWrite,
kStatNFuncRead,
kStatNFuncWchk,
kStatNFuncSeek,
kStatNFuncRchk,
kStatNFuncDreset,
kStatNFuncWlock,
kStatNRdmaWrite,
kStatNRdmaRead,
kStatNRdmaWchk,
kStatNRdmaRchk,
kDimStat
};
protected:
int AttnHandler(const RlinkServer::AttnArgs& args);
int RdmaHandler();

11
tools/src/librw11/Rw11Cpu.cpp
View File

@@ -1,6 +1,6 @@
// $Id: Rw11Cpu.cpp 521 2013-05-20 22:16:45Z mueller $
// $Id: Rw11Cpu.cpp 576 2014-08-02 12:24:28Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-08-02 576 1.0.2 adopt rename of LastExpect->SetLastExpect
// 2013-04-14 506 1.0.1 add AddLalh(),AddRMem(),AddWMem()
// 2013-04-12 504 1.0 Initial version
// 2013-01-27 478 0.1 First draft
@@ -20,7 +21,7 @@
/*!
\file
\version $Id: Rw11Cpu.cpp 521 2013-05-20 22:16:45Z mueller $
\version $Id: Rw11Cpu.cpp 576 2014-08-02 12:24:28Z mueller $
\brief Implemenation of Rw11Cpu.
*/
#include <stdlib.h>
@@ -363,12 +364,12 @@ bool Rw11Cpu::ProbeCntl(Rw11Probe& dsc)
if (dsc.fProbeInt) {
clist.AddWreg(fBase+kCp_addr_al, dsc.fAddr);
iib = clist.AddRreg(fBase+kCp_addr_mem);
clist.LastExpect(new RlinkCommandExpect(0,0xff)); // disable stat checking
clist.SetLastExpect(new RlinkCommandExpect(0,0xff)); // disable stat check
}
if (dsc.fProbeRem) {
AddIbrb(clist, dsc.fAddr);
irb = AddRibr(clist, dsc.fAddr);
clist.LastExpect(new RlinkCommandExpect(0,0xff)); // disable stat checking
clist.SetLastExpect(new RlinkCommandExpect(0,0xff)); // disable stat check
}
Server().Exec(clist);

6
tools/src/librw11/Rw11UnitDisk.cpp
View File

@@ -1,4 +1,4 @@
// $Id: Rw11UnitDisk.cpp 509 2013-04-21 20:46:20Z mueller $
// $Id: Rw11UnitDisk.cpp 561 2014-06-09 17:22:50Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
@@ -19,7 +19,7 @@
/*!
\file
\version $Id: Rw11UnitDisk.cpp 509 2013-04-21 20:46:20Z mueller $
\version $Id: Rw11UnitDisk.cpp 561 2014-06-09 17:22:50Z mueller $
\brief Implemenation of Rw11UnitDisk.
*/
@@ -62,7 +62,7 @@ Rw11UnitDisk::~Rw11UnitDisk()
void Rw11UnitDisk::SetType(const std::string& type)
{
throw Rexception("Rw11UnitDisk::<ctor>",
throw Rexception("Rw11UnitDisk::SetType",
string("Bad args: only type '") + fType + "' supported");
return;
}

6
tools/src/librw11/Rw11UnitTerm.hpp
View File

@@ -1,4 +1,4 @@
// $Id: Rw11UnitTerm.hpp 515 2013-05-04 17:28:59Z mueller $
// $Id: Rw11UnitTerm.hpp 570 2014-07-20 19:05:11Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
@@ -22,7 +22,7 @@
/*!
\file
\version $Id: Rw11UnitTerm.hpp 515 2013-05-04 17:28:59Z mueller $
\version $Id: Rw11UnitTerm.hpp 570 2014-07-20 19:05:11Z mueller $
\brief Declaration of class Rw11UnitTerm.
*/
@@ -79,7 +79,7 @@ namespace Retro {
protected:
bool fTo7bit; //<! discard parity bit on output
bool fToEnpc; //<! escape non-printabls on output
bool fToEnpc; //<! escape non-printables on output
bool fTi7bit; //<! discard parity bit on input
std::deque<uint8_t> fRcvQueue; //<! input queue
std::string fLogFname; //<! log file name

4
tools/src/librwxxtpp/Makefile
View File

@@ -1,4 +1,4 @@
# $Id: Makefile 529 2013-08-02 17:15:43Z mueller $
# $Id: Makefile 561 2014-06-09 17:22:50Z mueller $
#
# Revision History:
# Date Rev Version Comment
@@ -31,9 +31,9 @@ OBJ_all += RtclRw11UnitTerm.o
OBJ_all += RtclRw11UnitDisk.o
OBJ_all += RtclRw11UnitStream.o
OBJ_all += RtclRw11CntlDL11.o RtclRw11UnitDL11.o
OBJ_all += RtclRw11CntlRK11.o RtclRw11UnitRK11.o
OBJ_all += RtclRw11CntlLP11.o RtclRw11UnitLP11.o
OBJ_all += RtclRw11CntlPC11.o RtclRw11UnitPC11.o
OBJ_all += RtclRw11CntlRK11.o RtclRw11UnitRK11.o
#
DEP_all = $(OBJ_all:.o=.dep)
#

14
tools/src/librwxxtpp/RtclRw11CntlFactory.cpp
View File

@@ -1,6 +1,6 @@
// $Id: RtclRw11CntlFactory.cpp 515 2013-05-04 17:28:59Z mueller $
// $Id: RtclRw11CntlFactory.cpp 565 2014-06-28 12:54:08Z mueller $
//
// Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
// This program is free software; you may redistribute and/or modify it under
// the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,8 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-06-27 565 1.1.1 temporarily hide RL11
// 2014-06-08 561 1.1.0 add RL11
// 2013-05-01 513 1.0.1 add LP11
// 2013-03-06 495 1.0 Initial version
// 2013-02-09 489 0.1 First draft
@@ -20,7 +22,7 @@
/*!
\file
\version $Id: RtclRw11CntlFactory.cpp 515 2013-05-04 17:28:59Z mueller $
\version $Id: RtclRw11CntlFactory.cpp 565 2014-06-28 12:54:08Z mueller $
\brief Implemenation of global function RtclRw11CntlFactory.
*/
@@ -30,6 +32,7 @@
#include "RtclRw11CntlDL11.hpp"
#include "RtclRw11CntlRK11.hpp"
//#include "RtclRw11CntlRL11.hpp"
#include "RtclRw11CntlLP11.hpp"
#include "RtclRw11CntlPC11.hpp"
@@ -57,6 +60,11 @@ int RtclRw11CntlFactory(RtclArgs& args, RtclRw11Cpu& cpu)
if(pobj->FactoryCmdConfig(args, cpu) != TCL_OK) return TCL_ERROR;
pobj.release();
// } else if (type == "rl11") { // rl11 --------------------------
// unique_ptr<RtclRw11CntlRL11> pobj(new RtclRw11CntlRL11());
// if(pobj->FactoryCmdConfig(args, cpu) != TCL_OK) return TCL_ERROR;
// pobj.release();
} else if (type == "lp11") { // lp11 --------------------------
unique_ptr<RtclRw11CntlLP11> pobj(new RtclRw11CntlLP11());
if(pobj->FactoryCmdConfig(args, cpu) != TCL_OK) return TCL_ERROR;

23
tools/src/librwxxtpp/RtclRw11Cpu.cpp
View File

@@ -1,4 +1,4 @@
// $Id: RtclRw11Cpu.cpp 552 2014-03-02 23:02:00Z mueller $
// $Id: RtclRw11Cpu.cpp 576 2014-08-02 12:24:28Z mueller $
//
// Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
//
@@ -13,6 +13,7 @@
//
// Revision History:
// Date Rev Version Comment
// 2014-08-02 576 1.0.4 bugfix: redo estatdef logic; avoid LastExpect()
// 2014-03-02 552 1.0.3 M_cp: add -ral and -rah options (addr reg readback)
// 2013-05-19 521 1.0.2 M_cp: merge -wibrb|-wibrbbe again; add -wa
// 2013-04-26 511 1.0.1 add M_show
@@ -22,7 +23,7 @@
/*!
\file
\version $Id: RtclRw11Cpu.cpp 552 2014-03-02 23:02:00Z mueller $
\version $Id: RtclRw11Cpu.cpp 576 2014-08-02 12:24:28Z mueller $
\brief Implemenation of RtclRw11Cpu.
*/
@@ -330,7 +331,8 @@ int RtclRw11Cpu::M_cp(RtclArgs& args)
if (lsize == 0)
return args.Quit("-E: -edata not allowed on empty command list");
if (clist[lsize-1].Expect()==0) {
clist.LastExpect(new RlinkCommandExpect());
clist[lsize-1].SetExpect(new RlinkCommandExpect(estatdef_val,
estatdef_msk));
}
if (clist[lsize-1].Command() == RlinkCommand::kCmdRblk) {
vector<uint16_t> data;
@@ -356,7 +358,7 @@ int RtclRw11Cpu::M_cp(RtclArgs& args)
if (!args.GetArg("??mask", mask)) return kERR;
if (args.NOptMiss() == 2) mask = 0xff;
if (clist[lsize-1].Expect()==0) {
clist.LastExpect(new RlinkCommandExpect());
clist[lsize-1].SetExpect(new RlinkCommandExpect());
}
clist[lsize-1].Expect()->SetStatus(stat, mask);
@@ -371,15 +373,16 @@ int RtclRw11Cpu::M_cp(RtclArgs& args)
}
if (lsize != clist.Size()) { // cmd added to clist (ind=lsize!)
if (estatdef_msk != 0xff) { // estatdef defined
if (clist[lsize].Expect()==0) {
clist.LastExpect(new RlinkCommandExpect());
if (estatdef_msk != 0xff && // estatdef defined
lsize != clist.Size()) { // and cmd added to clist
for (size_t i=lsize; i<clist.Size(); i++) { // loop over new cmds
if (clist[i].Expect()==0) { // if no stat
clist[i].SetExpect(new RlinkCommandExpect(estatdef_val,
estatdef_msk));
}
clist[lsize].Expect()->SetStatus(estatdef_val, estatdef_msk);
}
}
}
if (!args.AllDone()) return kERR;

390
tools/tbench/test_w11a_div.tcl Normal file
View File

@@ -0,0 +1,390 @@
# $Id: test_w11a_div.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-07-20 570 1.0.2 add rw11::div_show_test; test late div quit cases
# 2014-07-12 569 1.0.1 move sxt16/32 to rutil
# 2014-07-11 568 1.0 Initial version
# 2014-06-29 566 0.1 First draft
#
# Test div instruction
#
namespace eval rw11 {
#
# div_simh: calculate expected division result as pdp11 simh does it -------
#
# this pdp11 div emulation adopted from pdp11_cpu.c (git head 2014-06-09)
proc div_simh {ddi dri} {
set src2 $dri
set src $ddi
set qd [expr ($ddi>>16) & 0xffff]; # w11a default for V=1 bailouts
set rd [expr $ddi & 0xffff]; # "
set n [expr {($ddi<0) ^ ($dri<0)}]; # "
set z 0; # "
# quit if divident larger than possible 16 bit signed products
if {$src > 1073774591 || $src < -1073741823} {
return [list $qd $rd $n $z 1 0]
}
# quit if divisor zero
if {$src2 == 0} {
return [list $qd $rd $n $z 1 1]
}
if {$src2 & 0x8000} {
set src2 [expr $src2 | ~ 077777]
}
if {$src & 0x80000000} {
set src [expr $src | ~ 017777777777]
}
# Tcl "/" uses 'round down' sematics, while C (and PDP11) 'round to 0'
# ddi dri Tcl C/C++
# 34 5 q= 6 r= 4 q= 6 r= 4
# 34 -5 q= 7 r=-1 q=-6 r= 4
# -34 5 q=-7 r= 1 q=-6 r=-4
# -34 -5 q= 6 r=-4 q= 6 r=-4
# Tcl --> r same sign as divisor
# C --> r same sign as divident
# so add correction step to always get C/C++/PDP11 divide semantics
#
set q [expr $src / $src2]
set r [expr ($src - ($src2 * $q))]
if {$r!=0 && (($src<0) ^ ($r<0))} { # divident and remainder diff sign
set r [expr $r - $src2]
set q [expr $q + (($q<0)?1:-1)]
}
if {($q > 32767) || ($q < -32768)} {
return [list $qd $rd $n $z 1 0]
}
set n [expr {$q < 0}]
set z [expr {$q == 0}]
return [list $q $r $n $z 0 0]
}
#
# div_testd3: test division ddh,ddl,,dr + expected result ------------------
#
proc div_testd3 {cpu symName ddh ddl dr q r n z v c} {
upvar 1 $symName sym
set nzvc [expr {($n<<3) | ($z<<2) | ($v<<1) | $c}]
set dr16 [expr {$dr & 0xffff}]
set q16 [expr {$q & 0xffff}]
set r16 [expr {$r & 0xffff}]
# use rw11::div_show_test to enable generation of divtst files
if {[info exists rw11::div_show_test] && $rw11::div_show_test} {
set ddi [expr (($ddh&0xffff)<<16) + ($ddl&0xffff)]
set ddi [rutil::sxt32 $ddi]
set dri [rutil::sxt16 $dr16]
set qi [rutil::sxt16 $q16]
set ri [rutil::sxt16 $r16]
puts [format "%06o %06o %06o : %d%d%d%d %06o %06o # %11d/%6d:%6d,%6d" \
$ddh $ddl $dr16 $n $z $v $c $q16 $r16 $ddi $dri $qi $ri ]
}
rw11::asmrun $cpu sym [list r0 $ddh r1 $ddl r2 $dr16]
rw11::asmwait $cpu sym
if {!$v && !$c} { # test q and r only when V=0 C=0 expected
lappend treglist r0 $q16 r1 $r16
}
lappend treglist r3 $nzvc
set errcnt [rw11::asmtreg $cpu $treglist]
if {$errcnt} {
puts [format \
"div FAIL: dd=%06o,%06o dr=%06o exp: q=%06o r=%06o nzvc=%d%d%d%d" \
$ddh $ddl $dr16 $q16 $r16 $n $z $v $c]
}
return $errcnt
}
#
# div_testd2: test division dd,dr + expected result ------------------------
#
proc div_testd2 {cpu symName dd dr q r n z v c} {
upvar 1 $symName sym
set ddh [expr {($dd>>16) & 0xffff}]
set ddl [expr { $dd & 0xffff}]
return [div_testd3 $cpu sym $ddh $ddl $dr $q $r $n $z $v $c]
}
#
# div_testdqr: test division, give divisor, quotient and remainder ---------
#
proc div_testdqr {cpu symName dri qi ri} {
upvar 1 $symName sym
set dri [rutil::sxt16 $dri]
set qi [rutil::sxt16 $qi]
set ri [rutil::sxt16 $ri]
set ddi [expr {$dri*$qi + $ri}]
set simhres [div_simh $ddi $dri]
set q [lindex $simhres 0]
set r [lindex $simhres 1]
set n [lindex $simhres 2]
set z [lindex $simhres 3]
set v [lindex $simhres 4]
set c [lindex $simhres 5]
return [div_testd2 $cpu sym $ddi $dri $q $r $n $z $v $c]
}
}
# ----------------------------------------------------------------------------
rlc log "test_div: test div instruction"
$cpu ldasm -lst lst -sym sym {
. = 1000
stack:
start: div r2,r0
mov @#177776,r3
bic #177760,r3
halt
stop:
}
rlc log " test basics (via testd2)"
# dd dr q r n z v c
rlc log " dr>0"
rw11::div_testd2 $cpu sym 0 3 0 0 0 1 0 0
rw11::div_testd2 $cpu sym 1 3 0 1 0 1 0 0
rw11::div_testd2 $cpu sym 2 3 0 2 0 1 0 0
rw11::div_testd2 $cpu sym 3 3 1 0 0 0 0 0
rw11::div_testd2 $cpu sym 4 3 1 1 0 0 0 0
rw11::div_testd2 $cpu sym -1 3 0 -1 0 1 0 0
rw11::div_testd2 $cpu sym -2 3 0 -2 0 1 0 0
rw11::div_testd2 $cpu sym -3 3 -1 0 1 0 0 0
rw11::div_testd2 $cpu sym -4 3 -1 -1 1 0 0 0
rlc log " dr<0"
rw11::div_testd2 $cpu sym 0 -3 0 0 0 1 0 0
rw11::div_testd2 $cpu sym 1 -3 0 1 0 1 0 0
rw11::div_testd2 $cpu sym 2 -3 0 2 0 1 0 0
rw11::div_testd2 $cpu sym 3 -3 -1 0 1 0 0 0
rw11::div_testd2 $cpu sym 4 -3 -1 1 1 0 0 0
rw11::div_testd2 $cpu sym -1 -3 0 -1 0 1 0 0
rw11::div_testd2 $cpu sym -2 -3 0 -2 0 1 0 0
rw11::div_testd2 $cpu sym -3 -3 1 0 0 0 0 0
rw11::div_testd2 $cpu sym -4 -3 1 -1 0 0 0 0
rlc log " dr==0"
rw11::div_testd2 $cpu sym 0 0 0 0 0 1 1 1
rw11::div_testd2 $cpu sym 1 0 0 0 0 1 1 1
rw11::div_testd2 $cpu sym -1 0 0 0 0 1 1 1
rlc log " test 4 quadrant basics (via testd2)"
# dd dr q r n z v c
rw11::div_testd2 $cpu sym 34 5 6 4 0 0 0 0
rw11::div_testd2 $cpu sym 34 -5 -6 4 1 0 0 0
rw11::div_testd2 $cpu sym -34 5 -6 -4 1 0 0 0
rw11::div_testd2 $cpu sym -34 -5 6 -4 0 0 0 0
rlc log " test 4 quadrant basics (via testdqr)"
# dr q r
rw11::div_testdqr $cpu sym 5 6 4;
rw11::div_testdqr $cpu sym -5 -6 4;
rw11::div_testdqr $cpu sym 5 -6 -4;
rw11::div_testdqr $cpu sym -5 6 -4;
rlc log " test q=100000 boundary cases (q = max neg value)"
rlc log " case dd>0, dr<0 -- factor 21846"
# dr q r
rw11::div_testdqr $cpu sym -21846 0100000 0; # BAD-R4
rw11::div_testdqr $cpu sym -21846 0100000 1; # BAD-R4
rw11::div_testdqr $cpu sym -21846 0100000 21844; # BAD-R4
rw11::div_testdqr $cpu sym -21846 0100000 21845; # BAD-R4
rw11::div_testdqr $cpu sym -21846 0100000 21846; # v=1
rw11::div_testdqr $cpu sym -21846 0100000 21847; # v=1
rlc log " case dd<0, dr>0 -- factor 21846"
rw11::div_testdqr $cpu sym 21846 0100000 0; # BAD-R4
rw11::div_testdqr $cpu sym 21846 0100000 -1; # BAD-R4
rw11::div_testdqr $cpu sym 21846 0100000 -21844; # BAD-R4
rw11::div_testdqr $cpu sym 21846 0100000 -21845; # BAD-R4
rw11::div_testdqr $cpu sym 21846 0100000 -21846; # v=1
rw11::div_testdqr $cpu sym 21846 0100000 -21847; # v=1
rlc log " case dd>0, dr<0 -- factor 21847"
rw11::div_testdqr $cpu sym -21847 0100000 0; # BAD-R4
rw11::div_testdqr $cpu sym -21847 0100000 1; # BAD-R4
rw11::div_testdqr $cpu sym -21847 0100000 21845; # BAD-R4
rw11::div_testdqr $cpu sym -21847 0100000 21846; # BAD-R4
rw11::div_testdqr $cpu sym -21847 0100000 21847; # v=1
rw11::div_testdqr $cpu sym -21847 0100000 21848; # v=1
rlc log " case dd<0, dr>0 -- factor 21847"
rw11::div_testdqr $cpu sym 21847 0100000 0; # BAD-R4
rw11::div_testdqr $cpu sym 21847 0100000 -1; # BAD-R4
rw11::div_testdqr $cpu sym 21847 0100000 -21845; # BAD-R4
rw11::div_testdqr $cpu sym 21847 0100000 -21846; # BAD-R4
rw11::div_testdqr $cpu sym 21847 0100000 -21847; # v=1
rw11::div_testdqr $cpu sym 21847 0100000 -21848; # v=1
#
#
rlc log " test q=077777 boundary cases (q = max pos value)"
rlc log " case dd>0, dr>0 -- factor 21846"
rw11::div_testdqr $cpu sym 21846 0077777 0; #
rw11::div_testdqr $cpu sym 21846 0077777 1; #
rw11::div_testdqr $cpu sym 21846 0077777 21844; #
rw11::div_testdqr $cpu sym 21846 0077777 21845; #
rw11::div_testdqr $cpu sym 21846 0077777 21846; # v=1
rw11::div_testdqr $cpu sym 21846 0077777 21847; # v=1
rlc log " case dd<0, dr<0 -- factor 21846"
rw11::div_testdqr $cpu sym -21846 0077777 0; #
rw11::div_testdqr $cpu sym -21846 0077777 -1; #
rw11::div_testdqr $cpu sym -21846 0077777 -21844; #
rw11::div_testdqr $cpu sym -21846 0077777 -21845; #
rw11::div_testdqr $cpu sym -21846 0077777 -21846; # v=1
rw11::div_testdqr $cpu sym -21846 0077777 -21847; # v=1
rlc log " case dd>0, dr>0 -- factor 21847"
rw11::div_testdqr $cpu sym 21847 0077777 0; #
rw11::div_testdqr $cpu sym 21847 0077777 1; #
rw11::div_testdqr $cpu sym 21847 0077777 21845; #
rw11::div_testdqr $cpu sym 21847 0077777 21846; #
rw11::div_testdqr $cpu sym 21847 0077777 21847; # v=1
rw11::div_testdqr $cpu sym 21847 0077777 21848; # v=1
rlc log " case dd<0, dr<0 -- factor 21847"
rw11::div_testdqr $cpu sym -21847 0077777 0; #
rw11::div_testdqr $cpu sym -21847 0077777 -1; #
rw11::div_testdqr $cpu sym -21847 0077777 -21845; #
rw11::div_testdqr $cpu sym -21847 0077777 -21846; #
rw11::div_testdqr $cpu sym -21847 0077777 -21846; # v=1
rw11::div_testdqr $cpu sym -21847 0077777 -21847; # v=1
#
#
rlc log " test dr=100000 boundary cases (dr = max neg value)"
rlc log " case dd<0, q>0"
rw11::div_testdqr $cpu sym 0100000 1 0; #
rw11::div_testdqr $cpu sym 0100000 1 -1; #
rw11::div_testdqr $cpu sym 0100000 1 -32767; #
rw11::div_testdqr $cpu sym 0100000 2 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 2 -1; #
rw11::div_testdqr $cpu sym 0100000 2 -32767; #
rw11::div_testdqr $cpu sym 0100000 3 0; #
rw11::div_testdqr $cpu sym 0100000 3 -1; #
rw11::div_testdqr $cpu sym 0100000 3 -32767; #
rw11::div_testdqr $cpu sym 0100000 4 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 4 -1; #
rw11::div_testdqr $cpu sym 0100000 4 -32767; #
rw11::div_testdqr $cpu sym 0100000 6 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 32762 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 32764 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 32765 0; #
rw11::div_testdqr $cpu sym 0100000 32766 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 32766 -1; #
rw11::div_testdqr $cpu sym 0100000 32766 -32767; #
rw11::div_testdqr $cpu sym 0100000 32767 0; #
rw11::div_testdqr $cpu sym 0100000 32767 -1; #
rw11::div_testdqr $cpu sym 0100000 32767 -32767; #
rlc log " case dd>0, q<0"
rw11::div_testdqr $cpu sym 0100000 -1 0; #
rw11::div_testdqr $cpu sym 0100000 -1 1; #
rw11::div_testdqr $cpu sym 0100000 -1 32767; #
rw11::div_testdqr $cpu sym 0100000 -2 0; #
rw11::div_testdqr $cpu sym 0100000 -2 1; #
rw11::div_testdqr $cpu sym 0100000 -2 32767; #
rw11::div_testdqr $cpu sym 0100000 -32767 0; #
rw11::div_testdqr $cpu sym 0100000 -32767 1; #
rw11::div_testdqr $cpu sym 0100000 -32767 32767; #
rw11::div_testdqr $cpu sym 0100000 -32768 0; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 -32768 1; # BAD-R4
rw11::div_testdqr $cpu sym 0100000 -32768 32767; # BAD-R4
#
#
rlc log " test dr=077777 boundary cases (dr = max pos value)"
rlc log " case dd>0, q>0"
rw11::div_testdqr $cpu sym 077777 1 0; #
rw11::div_testdqr $cpu sym 077777 1 1; #
rw11::div_testdqr $cpu sym 077777 1 32766; #
rw11::div_testdqr $cpu sym 077777 2 0; #
rw11::div_testdqr $cpu sym 077777 2 1; #
rw11::div_testdqr $cpu sym 077777 2 32766; #
rw11::div_testdqr $cpu sym 077777 32766 0; #
rw11::div_testdqr $cpu sym 077777 32766 1; #
rw11::div_testdqr $cpu sym 077777 32766 32766; #
rw11::div_testdqr $cpu sym 077777 32767 0; #
rw11::div_testdqr $cpu sym 077777 32767 1; #
rw11::div_testdqr $cpu sym 077777 32767 32766; #
rlc log " case dd<0, q<0"
rw11::div_testdqr $cpu sym 077777 -1 0; #
rw11::div_testdqr $cpu sym 077777 -1 -1; #
rw11::div_testdqr $cpu sym 077777 -1 -32766; #
rw11::div_testdqr $cpu sym 077777 -2 0; #
rw11::div_testdqr $cpu sym 077777 -2 -1; #
rw11::div_testdqr $cpu sym 077777 -2 -32766; #
rw11::div_testdqr $cpu sym 077777 -32767 0; #
rw11::div_testdqr $cpu sym 077777 -32767 -1; #
rw11::div_testdqr $cpu sym 077777 -32767 -32766; #
rw11::div_testdqr $cpu sym 077777 -32768 0; # BAD-R4
rw11::div_testdqr $cpu sym 077777 -32768 -1; # BAD-R4
rw11::div_testdqr $cpu sym 077777 -32768 -32766; # BAD-R4
#
#
rlc log " test dd max cases"
rlc log " case dd>0 dr<0 near nmax*nmax+nmax-1 = +1073774591"
rw11::div_testdqr $cpu sym -32768 -32768 -1; #
rw11::div_testdqr $cpu sym -32768 -32768 0; # BAD-R4
rw11::div_testdqr $cpu sym -32768 -32768 1; # BAD-R4
rw11::div_testdqr $cpu sym -32768 -32768 32766; # BAD-R4
rw11::div_testdqr $cpu sym -32768 -32768 32767; # c.c BAD-R4
rw11::div_testdqr $cpu sym -32768 -32768 32768; # v=1
rw11::div_testdqr $cpu sym -32768 -32768 32769; # v=1
rlc log " case dd>0 dr>0 near pmax*pmax+pmax-1 = +1073709055"
rw11::div_testdqr $cpu sym 32767 32767 -1; #
rw11::div_testdqr $cpu sym 32767 32767 0; #
rw11::div_testdqr $cpu sym 32767 32767 1; #
rw11::div_testdqr $cpu sym 32767 32767 32765; #
rw11::div_testdqr $cpu sym 32767 32767 32766; # c.c
rw11::div_testdqr $cpu sym 32767 32767 32767; # v=1
rw11::div_testdqr $cpu sym 32767 32767 32768; # v=1
rlc log " case dd<0 dr>0 near nmax*pmax+pmax-1 = -1073741822"
rw11::div_testdqr $cpu sym 32767 -32768 1; #
rw11::div_testdqr $cpu sym 32767 -32768 0; # BAD-R4
rw11::div_testdqr $cpu sym 32767 -32768 -1; # BAD-R4
rw11::div_testdqr $cpu sym 32767 -32768 -32765; # BAD-R4
rw11::div_testdqr $cpu sym 32767 -32768 -32766; # c.c BAD-R4
rw11::div_testdqr $cpu sym 32767 -32768 -32767; # v=1
rw11::div_testdqr $cpu sym 32767 -32768 -32768; # v=1
rlc log " case dd<0 dr<0 near pmax*nmax+nmax-1 = -1073741823"
rw11::div_testdqr $cpu sym -32768 32767 1; #
rw11::div_testdqr $cpu sym -32768 32767 0; #
rw11::div_testdqr $cpu sym -32768 32767 -1; #
rw11::div_testdqr $cpu sym -32768 32767 -32766; #
rw11::div_testdqr $cpu sym -32768 32767 -32767; # c.c
rw11::div_testdqr $cpu sym -32768 32767 -32768; # v=1
rw11::div_testdqr $cpu sym -32768 32767 -32769; # v=1
#
#
rlc log " test late div quit cases in 2 quadrant algorithm"
# dd dr q r n z v c
rw11::div_testd2 $cpu sym -32767 -1 32767 0 0 0 0 0; #
rw11::div_testd2 $cpu sym -32768 -1 0 0 0 0 1 0; #
rw11::div_testd2 $cpu sym -32769 -1 0 0 0 0 1 0; #
#
rw11::div_testd2 $cpu sym -65534 -2 32767 0 0 0 0 0; #
rw11::div_testd2 $cpu sym -65535 -2 32767 -1 0 0 0 0; #
rw11::div_testd2 $cpu sym -65536 -2 0 0 0 0 1 0; #
rw11::div_testd2 $cpu sym -65537 -2 0 0 0 0 1 0; #
#
#
rlc log " test big divident overflow cases"
# dd dr q r n z v c
rw11::div_testd2 $cpu sym 0x7fffffff 1 0 0 0 0 1 0; #
rw11::div_testd2 $cpu sym 0x7fffffff 2 0 0 0 0 1 0; #
rw11::div_testd2 $cpu sym 0x7fffffff -1 0 0 1 0 1 0; #
rw11::div_testd2 $cpu sym 0x7fffffff -2 0 0 1 0 1 0; #
rw11::div_testd2 $cpu sym 0x80000000 1 0 0 1 0 1 0; #
rw11::div_testd2 $cpu sym 0x80000000 2 0 0 1 0 1 0; #
rw11::div_testd2 $cpu sym 0x80000000 -1 0 0 0 0 1 0; #
rw11::div_testd2 $cpu sym 0x80000000 -2 0 0 0 0 1 0; #

7
tools/tbench/test_w11a_dsta_flow.tcl
View File

@@ -1,10 +1,11 @@
# $Id: test_w11a_dsta_flow.tcl 552 2014-03-02 23:02:00Z mueller $
# $Id: test_w11a_dsta_flow.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-03-01 552 1.0.1 use stack:; check sp;
# 2013-03-31 502 1.0 Initial version
#
@@ -69,7 +70,7 @@ rw11::asmrun $cpu sym [list r0 $sym(sub00) \
r3 [expr {$sym(sub30)+2}] \
r4 $sym(psub4e) \
r5 $sym(data) ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 $sym(sub00) \
r1 [expr {$sym(sub10)+2}] \
r2 [expr {$sym(psub2)+4}] \
@@ -129,7 +130,7 @@ data: .blkw 2*5.
rw11::asmrun $cpu sym [list r0 [expr {$sym(sub00)-020}] \
r1 [expr {$sym(psub10)-040}] \
r5 $sym(data) ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 [expr {$sym(sub00)-020}] \
r1 [expr {$sym(psub10)-040}] \
r2 0 \

7
tools/tbench/test_w11a_dstm_word_flow.tcl
View File

@@ -1,10 +1,11 @@
# $Id: test_w11a_dstm_word_flow.tcl 552 2014-03-02 23:02:00Z mueller $
# $Id: test_w11a_dstm_word_flow.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-03-01 552 1.0.1 check that unused regs stay 0
# 2013-03-31 502 1.0 Initial version
#
@@ -55,7 +56,7 @@ rw11::asmrun $cpu sym [list r0 010 \
r3 $sym(pdata3) \
r4 $sym(data4e) \
r5 $sym(pdat5e) ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 011 \
r1 $sym(data1) \
r2 [expr {$sym(data2) + 4}] \
@@ -92,7 +93,7 @@ pdata3: .word data3
rw11::asmrun $cpu sym [list r0 [expr {$sym(data0)-020}] \
r1 [expr {$sym(pdata1)-040}] ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 [expr {$sym(data0)-020}] \
r1 [expr {$sym(pdata1)-040}] \
r2 0 \

7
tools/tbench/test_w11a_dstw_word_flow.tcl
View File

@@ -1,10 +1,11 @@
# $Id: test_w11a_dstw_word_flow.tcl 552 2014-03-02 23:02:00Z mueller $
# $Id: test_w11a_dstw_word_flow.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-03-01 552 1.0.1 check that unused regs stay 0
# 2013-03-31 502 1.0 Initial version
#
@@ -54,7 +55,7 @@ rw11::asmrun $cpu sym [list r1 $sym(data1) \
r3 $sym(pdata3) \
r4 $sym(data4e) \
r5 $sym(pdat5e) ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 0100 \
r1 $sym(data1) \
r2 [expr {$sym(data2) + 4}] \
@@ -91,7 +92,7 @@ pdata3: .word data3
rw11::asmrun $cpu sym [list r0 [expr {$sym(data0)-020}] \
r1 [expr {$sym(pdata1)-040}] ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 [expr {$sym(data0)-020}] \
r1 [expr {$sym(pdata1)-040}] \
r2 0 \

5
tools/tbench/test_w11a_inst_traps.tcl
View File

@@ -1,10 +1,11 @@
# $Id: test_w11a_inst_traps.tcl 552 2014-03-02 23:02:00Z mueller $
# $Id: test_w11a_inst_traps.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-03-01 552 1.0.1 check that unused regs stay 0; use stack:; check sp;
# 2013-04-01 502 1.0 Initial version
#
@@ -70,7 +71,7 @@ data: .blkw 6.*5.
}
rw11::asmrun $cpu sym [list r5 $sym(data) ]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 0 \
r1 0 \
r2 0 \

13
tools/tbench/test_w11a_srcr_word_flow.tcl
View File

@@ -1,10 +1,11 @@
# $Id: test_w11a_srcr_word_flow.tcl 552 2014-03-02 23:02:00Z mueller $
# $Id: test_w11a_srcr_word_flow.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# License disclaimer see LICENSE_gpl_v2.txt in $RETROBASE directory
#
# Revision History:
# Date Rev Version Comment
# 2014-07-27 575 1.0.2 drop tout value from asmwait, reply on asmwait_tout
# 2014-03-01 552 1.0.1 check sp
# 2013-03-31 502 1.0 Initial version
#
@@ -31,7 +32,7 @@ stop:
}
rw11::asmrun $cpu sym [list r0 01234]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 01234 \
r1 01234 \
r2 $sym(stack) \
@@ -65,7 +66,7 @@ data: .word 1001
}
rw11::asmrun $cpu sym [list r0 $sym(data)]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 $sym(data) \
r1 001001 \
r2 001001 \
@@ -101,7 +102,7 @@ data1: .word 2002
}
rw11::asmrun $cpu sym [list r0 $sym(pdata)]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 $sym(pdata) \
r1 002001 \
r2 002002 \
@@ -138,7 +139,7 @@ data1: .word 003004
}
rw11::asmrun $cpu sym [list r0 $sym(data)]
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 $sym(data) \
r1 003001 \
r2 003002 \
@@ -171,7 +172,7 @@ data4: .word 004004
}
rw11::asmrun $cpu sym {}
rw11::asmwait $cpu sym 1.0
rw11::asmwait $cpu sym
rw11::asmtreg $cpu [list r0 0 \
r1 004001 \
r2 004002 \

5
tools/tbench/w11a_all.dat
View File

@@ -1,4 +1,4 @@
# $Id: w11a_all.dat 552 2014-03-02 23:02:00Z mueller $
# $Id: w11a_all.dat 569 2014-07-13 14:36:32Z mueller $
#
## steering file for all w11a tests
#
@@ -12,3 +12,6 @@ test_w11a_dstw_word_flow.tcl
test_w11a_dstm_word_flow.tcl
test_w11a_dsta_flow.tcl
test_w11a_inst_traps.tcl
#
test_w11a_div.tcl
#

42
tools/tcl/rutil/util.tcl
View File

@@ -1,6 +1,6 @@
# $Id: util.tcl 517 2013-05-09 21:34:45Z mueller $
# $Id: util.tcl 569 2014-07-13 14:36:32Z mueller $
#
# Copyright 2011-2013 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,7 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-12 569 1.0.2 add sxt16 and sxt32
# 2013-05-09 517 1.0.1 add optlist2arr
# 2011-03-27 374 1.0 Initial version
# 2011-03-19 372 0.1 First draft
@@ -24,7 +25,7 @@ package require rutiltpp
namespace eval rutil {
#
# optlist2arr: process options arguments given as key value list
# optlist2arr: process options arguments given as key value list -----------
#
proc optlist2arr {outarrname refarrname optlist} {
upvar $outarrname outarr
@@ -41,7 +42,7 @@ namespace eval rutil {
}
#
# regdsc: setup a register descriptor
# regdsc: setup a register descriptor --------------------------------------
#
proc regdsc {name args} {
upvar $name rdsc
@@ -82,7 +83,7 @@ namespace eval rutil {
}
#
# regdsc_print: print register descriptor
# regdsc_print: print register descriptor ----------------------------------
#
proc regdsc_print {name} {
upvar $name rdsc
@@ -120,7 +121,7 @@ namespace eval rutil {
}
#
# regbld: build a register value from a list of fields
# regbld: build a register value from a list of fields ---------------------
#
proc regbld {name args} {
upvar $name rdsc
@@ -164,7 +165,7 @@ namespace eval rutil {
}
#
# regget: extract field from a register value
# regget: extract field from a register value ------------------------------
#
proc regget {name val} {
upvar $name fdsc
@@ -175,7 +176,7 @@ namespace eval rutil {
}
#
# regtxt: convert register value to a text string
# regtxt: convert register value to a text string --------------------------
#
proc regtxt {name val} {
upvar $name rdsc
@@ -198,12 +199,35 @@ namespace eval rutil {
return $rval
}
#
# errcnt2txt: returns "PASS" if 0 and "FAIL" otherwise
# errcnt2txt: returns "PASS" if 0 and "FAIL" otherwise ---------------------
#
proc errcnt2txt {errcnt} {
if {$errcnt} {return "FAIL"}
return "PASS"
}
#
# sxt16: 16 bit sign extend ------------------------------------------------
#
proc sxt16 {val} {
if {$val & 0x8000} { # bit 15 set ?
set val [expr $val | ~ 077777]; # --> set bits 15 and higher
}
return $val
}
#
# sxt32: 32 bit sign extend ------------------------------------------------
#
proc sxt32 {val} {
if {$val & 0x80000000} { # bit 31 set ?
set val [expr $val | ~ 017777777777]; # --> set bits 31 and higher
}
return $val
}
#
# ! export reg... procs to global scope ------------------------------------
#
namespace export regdsc
namespace export regdsc_print

18
tools/tcl/rw11/asm.tcl
View File

@@ -1,4 +1,4 @@
# $Id: asm.tcl 552 2014-03-02 23:02:00Z mueller $
# $Id: asm.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -13,6 +13,8 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-26 575 1.0.3 add asmwait_tout variable, use in asmwait
# 2014-07-10 568 1.0.2 add errcnt return for asmtreg and asmtmem
# 2014-03-01 552 1.0.1 BUGFIX: asmwait checks now pc if stop: defined
# 2013-04-26 510 1.0 Initial version (extracted from util.tcl)
#
@@ -24,6 +26,8 @@ package require rwxxtpp
namespace eval rw11 {
variable asmwait_tout 10.
#
# asmrun: run a program loaded with ldasm
#
@@ -66,8 +70,12 @@ namespace eval rw11 {
#
# asmwait: wait for completion of a program loaded with ldasm
#
proc asmwait {cpu symName {tout 10.}} {
proc asmwait {cpu symName {tout 0.}} {
upvar 1 $symName sym
variable asmwait_tout
if {$tout <= 0.} { # if not specified
set tout $asmwait_tout; # use default value
}
set dt [$cpu wtcpu -reset $tout]
if {$dt >= 0 && [info exists sym(stop)]} {
$cpu cp -rpc -edata $sym(stop)
@@ -84,8 +92,9 @@ namespace eval rw11 {
foreach key [lsort [array names defs]] {
append cpcmd " -r$key -edata $defs($key)"
}
set errbeg [rlc errcnt]
eval $cpu cp $cpcmd
return ""
return [expr [rlc errcnt] - $errbeg]
}
#
@@ -96,8 +105,9 @@ namespace eval rw11 {
if {$nw == 0} {
error "asmtreg called with empty list"
}
set errbeg [rlc errcnt]
$cpu cp -wal $base -brm $nw -edata $list
return ""
return [expr [rlc errcnt] - $errbeg]
}
}

12
tools/tcl/rw11/util.tcl
View File

@@ -1,6 +1,6 @@
# $Id: util.tcl 553 2014-03-17 06:40:08Z mueller $
# $Id: util.tcl 575 2014-07-27 20:55:41Z mueller $
#
# Copyright 2013- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
# Copyright 2013-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
@@ -13,6 +13,9 @@
#
# Revision History:
# Date Rev Version Comment
# 2014-07-26 575 1.2.2 run_pdpcp: add tout argument
# 2014-06-27 565 1.2.1 temporarily hide RL11
# 2014-06-08 561 1.2 setup_sys: add RL11
# 2014-03-07 553 1.1.3 move definitions to defs.tcl
# 2013-05-09 517 1.1.2 add setup_(tt|lp|pp|ostr) device setup procs
# 2013-04-26 510 1.1.1 split, asm* and tbench* into separate files
@@ -46,6 +49,7 @@ namespace eval rw11 {
cpu0 add dl11
cpu0 add dl11 -base 0176500 -lam 2
cpu0 add rk11
## cpu0 add rl11
cpu0 add lp11
cpu0 add pc11
rlw start
@@ -152,9 +156,9 @@ namespace eval rw11 {
#
# run_pdpcp: execute pdpcp type command file
#
proc run_pdpcp {fname {cpu "cpu0"}} {
proc run_pdpcp {fname {tout 10.} {cpu "cpu0"}} {
rlc errcnt -clear
set code [exec ticonv_pdpcp $cpu $fname]
set code [exec ticonv_pdpcp --tout=$tout $cpu $fname]
eval $code
set errcnt [rlc errcnt]
if { $errcnt } {